Re: [PATCH 09/10] target/arm: Support 64-bit event counters for FEAT_PMUv3p5

2022-08-22 Thread Peter Maydell
On Sat, 20 Aug 2022 at 19:54, Richard Henderson wrote: > > On 8/11/22 10:16, Peter Maydell wrote: > > +static bool pmevcntr_is_64_bit(CPUARMState *env, int counter) > > +{ > > +/* Return true if the specified event counter is configured to be 64 > > bit */ > > + > > +/* This isn't intende

Re: [PATCH 09/10] target/arm: Support 64-bit event counters for FEAT_PMUv3p5

2022-08-20 Thread Richard Henderson
On 8/11/22 10:16, Peter Maydell wrote: +static bool pmevcntr_is_64_bit(CPUARMState *env, int counter) +{ +/* Return true if the specified event counter is configured to be 64 bit */ + +/* This isn't intended to be used with the cycle counter */ +assert(counter < 31); + +if (!cpu_i

[PATCH 09/10] target/arm: Support 64-bit event counters for FEAT_PMUv3p5

2022-08-11 Thread Peter Maydell
With FEAT_PMUv3p5, the event counters are now 64 bit, rather than 32 bit. (Previously, only the cycle counter could be 64 bit, and other event counters were always 32 bits). For any given event counter, whether the overflow event is noted for overflow from bit 31 or from bit 63 is controlled by a