Re: [PATCH 08/15] hw/riscv: sifive_gpio: Do not blindly trigger output IRQs

On Mon, Jun 8, 2020 at 7:24 AM Bin Meng wrote: > > From: Bin Meng > > At present the GPIO output IRQs are triggered each time any GPIO > register is written. However this is not correct. We should only > trigger the output IRQ when the pin is configured as output enable. > > Signed-off-by: Bin Me

[PATCH 08/15] hw/riscv: sifive_gpio: Do not blindly trigger output IRQs

From: Bin Meng At present the GPIO output IRQs are triggered each time any GPIO register is written. However this is not correct. We should only trigger the output IRQ when the pin is configured as output enable. Signed-off-by: Bin Meng --- hw/riscv/sifive_gpio.c | 4 +++- 1 file changed, 3 i