Re: [PATCH 05/21] hw/dma/zynq: Notify devcfg on FPGA reset via SLCR control

On Fri, 2025-04-25 at 18:11 +0200, Edgar E. Iglesias wrote: > CAUTION: External Email!! > On Tue, Mar 18, 2025 at 02:07:56PM +0100, Corvin Köhne wrote: > > From: YannickV > > > > When the FPGA_RST_CTRL register in the SLCR (System Level Control > > Register) is written to, the devcfg (Device Conf

Re: [PATCH 05/21] hw/dma/zynq: Notify devcfg on FPGA reset via SLCR control

On Tue, Mar 18, 2025 at 02:07:56PM +0100, Corvin Köhne wrote: > From: YannickV > > When the FPGA_RST_CTRL register in the SLCR (System Level Control > Register) is written to, the devcfg (Device Configuration) should > indicate the finished reset. > > Problems occure when Loaders trigger a reset

[PATCH 05/21] hw/dma/zynq: Notify devcfg on FPGA reset via SLCR control

From: YannickV When the FPGA_RST_CTRL register in the SLCR (System Level Control Register) is written to, the devcfg (Device Configuration) should indicate the finished reset. Problems occure when Loaders trigger a reset via SLCR and poll for the done flag in devcfg. Since the flag will never be