Re: [PATCH 03/35] hw/intc/arm_gicv3_cpuif: handle LPIs in in the list registers

2023-12-27 Thread Richard Henderson
On 12/18/23 22:32, Peter Maydell wrote: The hypervisor can deliver (virtual) LPIs to a guest by setting up a list register to have an intid which is an LPI. The GIC has to treat these a little differently to standard interrupt IDs, because LPIs have no Active state, and so the guest will only EO

[PATCH 03/35] hw/intc/arm_gicv3_cpuif: handle LPIs in in the list registers

2023-12-18 Thread Peter Maydell
The hypervisor can deliver (virtual) LPIs to a guest by setting up a list register to have an intid which is an LPI. The GIC has to treat these a little differently to standard interrupt IDs, because LPIs have no Active state, and so the guest will only EOI them, it will not also deactivate them.