On 8/7/23 20:57, Richard Henderson wrote:
On 8/7/23 07:28, Helge Deller wrote:
The tcg uses tgen_arithi(ARITH_AND) during fast CPU TLB lookups,
which e.g. translates to:
0x7ff5b011556a: 48 81 e6 00 f0 ff ff andq $0xf000, %rsi
In case the upper 48 bits are all set, the shor
On 8/7/23 07:28, Helge Deller wrote:
The tcg uses tgen_arithi(ARITH_AND) during fast CPU TLB lookups,
which e.g. translates to:
0x7ff5b011556a: 48 81 e6 00 f0 ff ff andq $0xf000, %rsi
In case the upper 48 bits are all set, the shorter sequence to operate
on the lower 16 bit
The tcg uses tgen_arithi(ARITH_AND) during fast CPU TLB lookups,
which e.g. translates to:
0x7ff5b011556a: 48 81 e6 00 f0 ff ff andq $0xf000, %rsi
In case the upper 48 bits are all set, the shorter sequence to operate
on the lower 16 bits of the target reg (si) can be used, w
