Re: [PATCH] target/riscv: Fix the bug of HLVX/HLV/HSV

2020-12-01 Thread Alistair Francis
On Sun, Nov 29, 2020 at 5:37 PM Yifei Jiang wrote: > > We found that the hypervisor virtual-machine load and store instructions, > included HLVX/HLV/HSV, couldn't access guest userspace memory. > > In the riscv-privileged spec, HLVX/HLV/HSV is defined as follow: > "As usual when V=1, two-stage add

Re: [PATCH] target/riscv: Fix the bug of HLVX/HLV/HSV

2020-11-30 Thread Alistair Francis
On Sun, Nov 29, 2020 at 5:37 PM Yifei Jiang wrote: > > We found that the hypervisor virtual-machine load and store instructions, > included HLVX/HLV/HSV, couldn't access guest userspace memory. > > In the riscv-privileged spec, HLVX/HLV/HSV is defined as follow: > "As usual when V=1, two-stage add

[PATCH] target/riscv: Fix the bug of HLVX/HLV/HSV

2020-11-29 Thread Yifei Jiang
We found that the hypervisor virtual-machine load and store instructions, included HLVX/HLV/HSV, couldn't access guest userspace memory. In the riscv-privileged spec, HLVX/HLV/HSV is defined as follow: "As usual when V=1, two-stage address translation is applied, and the HS-level sstatus.SUM is