Re: [PATCH] target/riscv: Add RVV registers to log

On 2/1/23 04:24, Ivan Klokov wrote: + * @CPU_DUMP_RVV: dump RISC-V RVV registers */ enum CPUDumpFlags { CPU_DUMP_CODE = 0x0001, CPU_DUMP_FPU = 0x0002, CPU_DUMP_CCOP = 0x0004, +CPU_DUMP_RVV = 0x0008, We're certainly not going to call this "RVV", as th

[PATCH] target/riscv: Add RVV registers to log

Added QEMU option 'rvv' to add RISC-V RVV registers to log like regular regs. Signed-off-by: Ivan Klokov --- accel/tcg/cpu-exec.c | 5 + include/hw/core/cpu.h | 2 ++ include/qemu/log.h| 3 ++- target/riscv/cpu.c| 49 ++- util/log.c