Re: [PATCH] target/i386: do not access beyond the low 128 bits of SSE registers

2022-04-13 Thread Paolo Bonzini
On 4/13/22 20:44, Alex Bennée wrote: And: Fixes: b7711471f5 ("target-i386: make xmm_regs 512-bit wide") Resolves:https://gitlab.com/qemu-project/qemu/-/issues/420 It's not really a bug, beyond the possibility of uninitialized data in the migration stream. The reporter was probably using a fo

Re: [PATCH] target/i386: do not access beyond the low 128 bits of SSE registers

2022-04-13 Thread Alex Bennée
Paolo Bonzini writes: > The i386 target consolidates all vector registers so that instead of > XMMReg, YMMReg and ZMMReg structs there is a single ZMMReg that can > fit all of SSE, AVX and AVX512. > > When TCG copies data from and to the SSE registers, it uses the > full 64-byte width. This is

Re: [PATCH] target/i386: do not access beyond the low 128 bits of SSE registers

2022-04-13 Thread Peter Maydell
On Wed, 13 Apr 2022 at 17:09, Paolo Bonzini wrote: > > The i386 target consolidates all vector registers so that instead of > XMMReg, YMMReg and ZMMReg structs there is a single ZMMReg that can > fit all of SSE, AVX and AVX512. > > When TCG copies data from and to the SSE registers, it uses the >

[PATCH] target/i386: do not access beyond the low 128 bits of SSE registers

2022-04-13 Thread Paolo Bonzini
The i386 target consolidates all vector registers so that instead of XMMReg, YMMReg and ZMMReg structs there is a single ZMMReg that can fit all of SSE, AVX and AVX512. When TCG copies data from and to the SSE registers, it uses the full 64-byte width. This is not a correctness issue because TCG