On Fri, Apr 14, 2023 at 8:19 AM Philippe Mathieu-Daudé
wrote:
> Having this patch split in 2 (documentation first, logical change then)
> would ease code review.
>
> > There is one functional change:
> >
> > Before this change, MOVNTPS and MOVNTPD were labeled as Exception Class
> > 4 (only requi
Hi Ricky,
On 12/2/23 09:28, Ricky Zhou wrote:
Fix the exception classes for some SSE/AVX instructions to match what is
documented in the Intel manual.
Most of these changes have no functional effect on the behavior that
qemu implements (primarily >= 16-byte memory alignment checks). For
example
Another ping for this patch:
Patchew link: https://patchew.org/QEMU/20230212082812.55101-1-ri...@rzhou.org/
Thanks,
Ricky
On Mon, Mar 20, 2023 at 6:21 AM Ricky Zhou wrote:
>
> On Sun, Feb 12, 2023 at 12:28 AM Ricky Zhou wrote:
> > Fix the exception classes for some SSE/AVX instructions to matc
On Sun, Feb 12, 2023 at 12:28 AM Ricky Zhou wrote:
> Fix the exception classes for some SSE/AVX instructions to match what is
> documented in the Intel manual.
Friendly ping :-) Does this change seem reasonable to folks?
Patchew link: https://patchew.org/QEMU/20230212082812.55101-1-ri...@rzhou.or
Fix the exception classes for some SSE/AVX instructions to match what is
documented in the Intel manual.
Most of these changes have no functional effect on the behavior that
qemu implements (primarily >= 16-byte memory alignment checks). For
example, since qemu does not implement the AC flag, ther
