Re: [PATCH] hw/riscv: virt: Simplify virt_{get,set}_aclint()

2023-02-06 Thread Alistair Francis
On Mon, Feb 6, 2023 at 6:51 PM Bin Meng wrote: > > There is no need to declare an intermediate "MachineState *ms". > > Signed-off-by: Bin Meng Thanks! Applied to riscv-to-apply.next Alistair > --- > > hw/riscv/virt.c | 6 ++ > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --gi

Re: [PATCH] hw/riscv: virt: Simplify virt_{get,set}_aclint()

2023-02-06 Thread Alistair Francis
On Mon, Feb 6, 2023 at 6:51 PM Bin Meng wrote: > > There is no need to declare an intermediate "MachineState *ms". > > Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Alistair > --- > > hw/riscv/virt.c | 6 ++ > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/hw/ri

Re: [PATCH] hw/riscv: virt: Simplify virt_{get,set}_aclint()

2023-02-06 Thread Philippe Mathieu-Daudé
On 6/2/23 09:50, Bin Meng wrote: There is no need to declare an intermediate "MachineState *ms". Signed-off-by: Bin Meng --- hw/riscv/virt.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

[PATCH] hw/riscv: virt: Simplify virt_{get,set}_aclint()

2023-02-06 Thread Bin Meng
There is no need to declare an intermediate "MachineState *ms". Signed-off-by: Bin Meng --- hw/riscv/virt.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 4a11b4b010..bdb6b93115 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c