Re: [PATCH] hw/riscv: sifive_u: Correct the CLINT timebase frequency

On Tue, Jul 6, 2021 at 8:48 PM Bin Meng wrote: > > From: Bin Meng > > At present the CLINT timebase frequency is set to 10MHz on sifive_u, > but on the real hardware the timebase frequency is 1Mhz. > > Signed-off-by: Bin Meng Thanks! Applied to riscv-to-apply.next Alistair > --- > > hw/risc

Re: [PATCH] hw/riscv: sifive_u: Correct the CLINT timebase frequency

On Tue, Jul 6, 2021 at 8:48 PM Bin Meng wrote: > > From: Bin Meng > > At present the CLINT timebase frequency is set to 10MHz on sifive_u, > but on the real hardware the timebase frequency is 1Mhz. > > Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Alistair > --- > > hw/riscv/sifive_

[PATCH] hw/riscv: sifive_u: Correct the CLINT timebase frequency

From: Bin Meng At present the CLINT timebase frequency is set to 10MHz on sifive_u, but on the real hardware the timebase frequency is 1Mhz. Signed-off-by: Bin Meng --- hw/riscv/sifive_u.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/risc