On Tue, Nov 15, 2022 at 9:56 AM Philippe Mathieu-Daudé
wrote:
>
> On 14/11/22 11:34, Frédéric Pétrot wrote:
> > Le 14/11/2022 à 09:40, Philippe Mathieu-Daudé a écrit :
> >> On 11/11/22 13:19, Frédéric Pétrot wrote:
>
>
> >> Eventually we could unify the style:
> >>
> >> -- >8 --
> >> @@ -476,11 +4
On Fri, Nov 11, 2022 at 10:20 PM Frédéric Pétrot
wrote:
>
> Commit 40244040 changed the way the S irqs are numbered. This breaks when
> using numa configuration, e.g.:
> ./qemu-system-riscv64 -nographic -machine virt,dumpdtb=numa-tree.dtb \
> -m 2G -smp cpus=16 \
>
On 11/11/22 13:19, Frédéric Pétrot wrote:
Commit 40244040 changed the way the S irqs are numbered. This breaks when
40244040a7 in case?
using numa configuration, e.g.:
./qemu-system-riscv64 -nographic -machine virt,dumpdtb=numa-tree.dtb \
-m 2G -smp cpus=16 \
On 14/11/22 11:34, Frédéric Pétrot wrote:
Le 14/11/2022 à 09:40, Philippe Mathieu-Daudé a écrit :
On 11/11/22 13:19, Frédéric Pétrot wrote:
Eventually we could unify the style:
-- >8 --
@@ -476,11 +476,11 @@ DeviceState *sifive_plic_create(hwaddr addr,
char *hart_config,
CPUStat
Le 14/11/2022 à 09:40, Philippe Mathieu-Daudé a écrit :
On 11/11/22 13:19, Frédéric Pétrot wrote:
Commit 40244040 changed the way the S irqs are numbered. This breaks when
40244040a7 in case?
Seems reasonnable, indeed, I'll even align with what git blame shows
(11 chars, so 40244040a7a).
On Fri, Nov 11, 2022 at 10:20 PM Frédéric Pétrot
wrote:
>
> Commit 40244040 changed the way the S irqs are numbered. This breaks when
> using numa configuration, e.g.:
> ./qemu-system-riscv64 -nographic -machine virt,dumpdtb=numa-tree.dtb \
> -m 2G -smp cpus=16 \
>
Commit 40244040 changed the way the S irqs are numbered. This breaks when
using numa configuration, e.g.:
./qemu-system-riscv64 -nographic -machine virt,dumpdtb=numa-tree.dtb \
-m 2G -smp cpus=16 \
-object memory-backend-ram,id=mem0,size=512M \