Re: [PATCH] hw/intc: riscv-imsic: Fix interrupt state updates.

2024-09-09 Thread Alistair Francis
On Sat, Sep 7, 2024 at 6:24 AM Tomasz Jeznach wrote: > > The IMSIC state variable eistate[] is modified by CSR instructions > within a range dedicated to the local CPU and by MMIO writes from any CPU. > Access to eistate from MMIO accessors is protected by the BQL, but > read-modify-write (RMW) se

Re: [PATCH] hw/intc: riscv-imsic: Fix interrupt state updates.

2024-09-08 Thread Alistair Francis
On Sat, Sep 7, 2024 at 6:24 AM Tomasz Jeznach wrote: > > The IMSIC state variable eistate[] is modified by CSR instructions > within a range dedicated to the local CPU and by MMIO writes from any CPU. > Access to eistate from MMIO accessors is protected by the BQL, but > read-modify-write (RMW) se

[PATCH] hw/intc: riscv-imsic: Fix interrupt state updates.

2024-09-06 Thread Tomasz Jeznach
The IMSIC state variable eistate[] is modified by CSR instructions within a range dedicated to the local CPU and by MMIO writes from any CPU. Access to eistate from MMIO accessors is protected by the BQL, but read-modify-write (RMW) sequences from CSRRW do not acquire the BQL, making the RMW sequen