Le 04/12/2024 à 11:17, Daniel P. Berrangé a écrit :
On Tue, Dec 03, 2024 at 07:57:14AM -0600, Richard Henderson wrote:
On 12/3/24 04:35, Peter Maydell wrote:
On Tue, 3 Dec 2024 at 10:19, Daniel P. Berrangé wrote:
Separatley this from patch, we should also consider whether
it is time to do the
On Tue, Dec 03, 2024 at 07:57:14AM -0600, Richard Henderson wrote:
> On 12/3/24 04:35, Peter Maydell wrote:
> > On Tue, 3 Dec 2024 at 10:19, Daniel P. Berrangé wrote:
> > > Separatley this from patch, we should also consider whether
> > > it is time to do the same for aarch64/arm7.
> > >
> > > If
Le 03/12/2024 à 10:47, Andrea Bolognani a écrit :
Currently the script won't generate a configuration file that
sets up qemu-user-riscv32 on riscv64, likely under the
assumption that 64-bit RISC-V machines can natively run 32-bit
RISC-V code.
However this functionality, while theoretically possi
On 12/3/24 04:35, Peter Maydell wrote:
On Tue, 3 Dec 2024 at 10:19, Daniel P. Berrangé wrote:
Separatley this from patch, we should also consider whether
it is time to do the same for aarch64/arm7.
If I look at this page:
https://gpages.juszkiewicz.com.pl/arm-socs-table/arm-socs.html
and
On Tue, Dec 03, 2024 at 10:59:24AM +0100, Philippe Mathieu-Daudé wrote:
> Hi Andrea,
>
> On 3/12/24 10:47, Andrea Bolognani wrote:
> > Currently the script won't generate a configuration file that
> > sets up qemu-user-riscv32 on riscv64, likely under the
> > assumption that 64-bit RISC-V machines
Hi Andrea,
On 3/12/24 10:47, Andrea Bolognani wrote:
Currently the script won't generate a configuration file that
sets up qemu-user-riscv32 on riscv64, likely under the
assumption that 64-bit RISC-V machines can natively run 32-bit
I'm confused by the "machines" description used for user emul
Currently the script won't generate a configuration file that
sets up qemu-user-riscv32 on riscv64, likely under the
assumption that 64-bit RISC-V machines can natively run 32-bit
RISC-V code.
However this functionality, while theoretically possible, in
practice is missing from most commonly avail