Re: [PATCH] arm/gicv3: update virtual irq state after IAR register read

2020-01-16 Thread Peter Maydell
On Mon, 13 Jan 2020 at 15:46, Jeff Kubascik wrote: > > The IAR0/IAR1 register is used to acknowledge an interrupt - a read of the > register activates the highest priority pending interrupt and provides its > interrupt ID. Activating an interrupt can change the CPU's virtual interrupt > state - th

Re: [PATCH] arm/gicv3: update virtual irq state after IAR register read

2020-01-13 Thread Philippe Mathieu-Daudé
On 1/13/20 4:46 PM, Jeff Kubascik wrote: The IAR0/IAR1 register is used to acknowledge an interrupt - a read of the register activates the highest priority pending interrupt and provides its interrupt ID. Activating an interrupt can change the CPU's virtual interrupt state - this change makes sur

[PATCH] arm/gicv3: update virtual irq state after IAR register read

2020-01-13 Thread Jeff Kubascik
The IAR0/IAR1 register is used to acknowledge an interrupt - a read of the register activates the highest priority pending interrupt and provides its interrupt ID. Activating an interrupt can change the CPU's virtual interrupt state - this change makes sure the virtual irq state is updated. Signed