On Fri, 17 Feb 2023 07:14:59 PST (-0800), ivan.klo...@syntacore.com wrote:
Due to typo in opcode list, ctzw is disassembled as clzw instruction.
Signed-off-by: Ivan Klokov
---
disas/riscv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/disas/riscv.c b/disas/riscv.c
index
Hello, Palmer!
Thanks for your reviewing
I'm sorry, I sent V2 patch, but forgot to add the appropriate tag.
Please see
https://lists.nongnu.org/archive/html/qemu-devel/2023-02/msg05278.html
It was also reviewed by Daniel Henrique Barboza and weiwei
02.03.2023 3:32, Palmer Dabbelt пишет:
On
On Fri, 17 Feb 2023 07:45:14 PST (-0800), dbarb...@ventanamicro.com wrote:
On 2/17/23 12:14, Ivan Klokov wrote:
Due to typo in opcode list, ctzw is disassembled as clzw instruction.
The code was added by 02c1b569a15b4b06a so I believe a "Fixes:" tag is in
order:
Fixes: 02c1b569a15b ("disas
On 2023/2/18 00:10, Ivan Klokov wrote:
Due to typo in opcode list, ctzw is disassembled as clzw instruction.
Fixes: 02c1b569a15b ("disas/riscv: Add Zb[abcs] instructions")
Signed-off-by: Ivan Klokov
---
v2:
- added fixes line
Reviewed-by: Weiwei Li
Weiwei Li
---
disas/riscv.c | 2 +
On 2/17/23 13:10, Ivan Klokov wrote:
Due to typo in opcode list, ctzw is disassembled as clzw instruction.
Fixes: 02c1b569a15b ("disas/riscv: Add Zb[abcs] instructions")
Signed-off-by: Ivan Klokov
---
Reviewed-by: Daniel Henrique Barboza
v2:
- added fixes line
---
disas/riscv.c |
Due to typo in opcode list, ctzw is disassembled as clzw instruction.
Fixes: 02c1b569a15b ("disas/riscv: Add Zb[abcs] instructions")
Signed-off-by: Ivan Klokov
---
v2:
- added fixes line
---
disas/riscv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/disas/riscv.c b/disa
On 2/17/23 12:14, Ivan Klokov wrote:
Due to typo in opcode list, ctzw is disassembled as clzw instruction.
The code was added by 02c1b569a15b4b06a so I believe a "Fixes:" tag is in
order:
Fixes: 02c1b569a15b ("disas/riscv: Add Zb[abcs] instructions")
Signed-off-by: Ivan Klokov
---
dis
Due to typo in opcode list, ctzw is disassembled as clzw instruction.
Signed-off-by: Ivan Klokov
---
disas/riscv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/disas/riscv.c b/disas/riscv.c
index ddda687c13..d0639cd047 100644
--- a/disas/riscv.c
+++ b/disas/riscv.c
@@ -164