** Changed in: qemu
Status: Fix Committed => Fix Released
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https://bugs.launchpad.net/bugs/1925512
Title:
UNDEFINED case for instruction BLX
Status in QEMU:
Fix Released
Bug
The patches from Richard have now been merged (see https://gitlab.com
/qemu-project/qemu/-/commit/c1438d6c02eae03c and the following commits).
Thus marking this as "Fix committed" now.
** Changed in: qemu
Status: In Progress => Fix Committed
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Proposed patch:
https://patchew.org/QEMU/20210423165413.338259-1-richard.hender...@linaro.org/
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Title:
UNDEFINED case for instruction BLX
Statu
Thanks for the test case.
The problem is that we have raised the UDEF exception,
and then the qemu kernel emulation code has decided that
we should emulate the instruction as an FPE11 instruction.
Which seems clearly incorrect, given we're in thumb mode.
** Changed in: qemu
Status: Invali
Hi
Thanks for your reply. I don't think return false is the right behavior
here. H is related to decoding rather than encoding phase. The value of
symbol *H* should not be used to check whether the (encoding) pattern is
matched or not. In other words, whatever value H is, if the bytecode
meet the
The complete imm32 is computed by
%imm24 26:s1 13:1 11:1 16:10 0:11 !function=t32_branch24
so that H appears at bit 1 in a->imm in trans_BLX_i.
Returning false from any trans_* function means that the trans
function did not match. In some cases, this means that the next
possible match
Hi
I still feel QEMU's implementation is not right. Could you please check
it again.
According to https://developer.arm.com/documentation/ddi0406/c
/Application-Level-Architecture/Instruction-Details/Alphabetical-list-
of-instructions/BL--BLX--immediate-?lang=en
The encoding T2 for BLX is below:
It's right there in trans_BLX_i:
if (s->thumb && (a->imm & 2)) {
return false;
}
** Changed in: qemu
Status: New => Invalid
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** Tags added: arm tcg
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https://bugs.launchpad.net/bugs/1925512
Title:
UNDEFINED case for instruction BLX
Status in QEMU:
New
Bug description:
Hi
I refer to the instruction BL
