** Changed in: qemu
Status: Fix Committed => Fix Released
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https://bugs.launchpad.net/bugs/1863685
Title:
ARM: HCR.TSW traps are not implemented
Status in QEMU:
Fix Released
Fixed here:
https://git.qemu.org/?p=qemu.git;a=commitdiff;h=1803d2713b29
** Changed in: qemu
Status: In Progress => Fix Committed
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Title:
Makes sense. Debugging is on me then :) Both patches behave as expected,
thanks!
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Title:
ARM: HCR.TSW traps are not implemented
Status in QEMU:
I can't think of any reason that DACR would have an incorrect
register value. It would be treated as any other system register,
and there's only one code path involved.
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https://bugs.lau
Sorry, I meant the operation is a write (TVM is on). The result of the
operation is setting DACR to 0 so the guest stops progressing after
that.
Anyway, since the issue could also be on my side, I don't want to block
you with this.
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Thanks for the quick turn around! I tested both your patches together
(it's useful to have both to emulate set/way flushing inside a guest)
and I am getting something unexpected. At some point, we are trapping on
an access to DACR but ESR_EL2 doesn't seem to make a lot of sense:
0xfe00dc0. I am run
Patch posted:
https://patchew.org/QEMU/20200218164717.12842-1-richard.hender...@linaro.org/
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https://bugs.launchpad.net/bugs/1863685
Title:
ARM: HCR.TSW traps are not implemented
Stat
** Changed in: qemu
Status: New => In Progress
** Changed in: qemu
Assignee: (unassigned) => Richard Henderson (rth)
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Title:
ARM: H
