On Mon, Dec 03, 2012 at 10:51:49PM +0400, Igor Mitsyanko wrote:
>On 12/02/2012 06:57 AM, Andreas Färber wrote:
>>It uses a different capsbase and opregbase than the Xilinx device.
>>
>>Signed-off-by: Liming Wang
>>Signed-off-by: Andreas Färber
>>Cc: Igor Mitsyanko
>>---
>> hw/usb/hcd-ehci-sysbu
On Tue, Dec 04, 2012 at 03:16:09PM +1000, Peter Crosthwaite wrote:
>Hi Liming, Gerd,
>
>On Tue, Dec 4, 2012 at 12:50 AM, walimis wrote:
>> On Mon, Dec 03, 2012 at 01:51:00PM +0100, Gerd Hoffmann wrote:
>>> Hi,
>>>
>>>> As said in another mail, I
On Mon, Dec 03, 2012 at 10:51:49PM +0400, Igor Mitsyanko wrote:
>On 12/02/2012 06:57 AM, Andreas Färber wrote:
>>It uses a different capsbase and opregbase than the Xilinx device.
>>
>>Signed-off-by: Liming Wang
>>Signed-off-by: Andreas Färber
>>Cc: Igor Mitsyanko
>>---
>> hw/usb/hcd-ehci-sysbu
On Mon, Dec 03, 2012 at 01:51:00PM +0100, Gerd Hoffmann wrote:
> Hi,
>
>> As said in another mail, I found that the root cause is that xilinx_zynq has
>> two EHCI controller. If we use usb-storage disk, the disk will be attached to
>> the second EHCI controller, which the kernel uses the first EHC
On Mon, Dec 03, 2012 at 12:10:02PM +, Peter Maydell wrote:
>On 3 December 2012 11:58, walimis wrote:
>> For example, xilinx_zynq has two EHCI controllers. If I specify a usb
>> device of type "usb-storage", the question is: which EHCI controller does the
>> usb
On Thu, Nov 29, 2012 at 12:05:14PM +1000, Peter Crosthwaite wrote:
>On Thu, Nov 29, 2012 at 12:00 PM, walimis wrote:
>> On Thu, Nov 29, 2012 at 11:43:18AM +1000, Peter Crosthwaite wrote:
>>>This was left as NULL on the initial merge due to debate on the mailing list
>>
On Mon, Dec 03, 2012 at 07:59:55AM +0100, Gerd Hoffmann wrote:
> Hi,
>
>> Gerd: In order for me to use this with the new-style Tegra2 model we
>> will need to further move EHCISysBusState and the accompanying macros
>> that this series adds into the hcd-ehci.h header so that it can be
>> embedded
On Sun, Dec 02, 2012 at 05:27:16PM +0100, Andreas F鋜ber wrote:
>Am 02.12.2012 11:34, schrieb walimis:
>> On Sun, Dec 02, 2012 at 03:57:17AM +0100, Andreas F鋜ber wrote:
>>> Appended is Liming's patch to add an EHCI device to Exynos 4 as well as a
>>> new patch o
On Sun, Dec 02, 2012 at 03:57:17AM +0100, Andreas Färber wrote:
>Hello,
>
>Some review comments for SysBus EHCI were ignored in favor of merging into 1.3.
>As requested by Gerd, this now follows up with the cleanups I had requested
>from Peter C. Apart from using the new-style QOM casts it also ach
On Tue, Nov 20, 2012 at 02:32:33PM +1000, Peter Crosthwaite wrote:
>Hi Liming,
>
>On Mon, Nov 19, 2012 at 11:03 PM, Liming Wang wrote:
>> The jedec id of "n25q128" should be 0x20bb18, not 0x20ba18.
>>
>> Signed-off-by: Liming Wang
>> ---
>> hw/m25p80.c |2 +-
>> 1 file changed, 1 insertion(+
On Thu, Nov 29, 2012 at 11:43:18AM +1000, Peter Crosthwaite wrote:
>This was left as NULL on the initial merge due to debate on the mailing list on
>how to handle DMA contexts for sysbus devices. Patch
>9e11908f12f92e31ea94dc2a4c962c836cba9f2a was later merged to fix OHCI. This is
>the,
>equivalen
On Sat, Nov 24, 2012 at 11:03:13PM +0100, Stefan Weil wrote:
>There are several ARM and MIPS boards which are manufactured with
>either Intel (pflash_cfi01.c) or AMD (pflash_cfi02.c) flash memory.
>
>The Linux kernel supports both and first probes for AMD flash which
>resulted in one or two warning
Hi, Peter
On Mon, Oct 29, 2012 at 04:45:00PM +1000, Peter Crosthwaite wrote:
>Added the QSPI controller to the Zynq. 4 SPI devices are attached to allow
>modelling of the different geometries. E.G. Dual parallel and dual stacked
>mode can both be tested with this one arrangement.
>
>Signed-off-by:
On Tue, Nov 20, 2012 at 02:32:33PM +1000, Peter Crosthwaite wrote:
>Hi Liming,
>
>On Mon, Nov 19, 2012 at 11:03 PM, Liming Wang wrote:
>> The jedec id of "n25q128" should be 0x20bb18, not 0x20ba18.
>>
>> Signed-off-by: Liming Wang
>> ---
>> hw/m25p80.c |2 +-
>> 1 file changed, 1 insertion(+
On Wed, Mar 21, 2012 at 12:43:49AM +0100, Stefan Weil wrote:
>Am 20.03.2012 15:48, schrieb Liming Wang:
>>Linux guest os often writes invalid cmd data to reset into read mode,
>>which leads many qemu complaint. Here we place all the debug
>>message into macro PFLASH_DEBUG. We can turn on the all de
On Tue, Mar 20, 2012 at 04:13:43PM +, Peter Maydell wrote:
>On 20 March 2012 16:00, walimis wrote:
>> On Tue, Mar 20, 2012 at 03:13:33PM +, Peter Maydell wrote:
>>>On 20 March 2012 14:57, Liming Wang wrote:
>>>> Vexpress motherboard has two 2x16 NOR flash,
On Tue, Mar 20, 2012 at 03:13:33PM +, Peter Maydell wrote:
>On 20 March 2012 14:57, Liming Wang wrote:
>> Vexpress motherboard has two 2x16 NOR flash, but pflash_cfi01
>> doesn't support interleaving, so here only models two 1x32 flash.
>> Although it's not exactly modeled, it works fine for r
17 matches
Mail list logo
