Re:[RFC PATCH v5 2/4] target/riscv: smstateen check for h/senvcfg

At 2022-06-04 00:04:23, "Mayuresh Chitale" wrote: >Accesses to henvcfg, henvcfgh and senvcfg are allowed >only if corresponding bit in mstateen0/hstateen0 is >enabled. Otherwise an illegal instruction trap is >generated. > >Signed-off-by: Mayuresh Chitale >--- > target/riscv/csr.c | 84 +

Re:[RFC PATCH v5 1/4] target/riscv: Add smstateen support

At 2022-06-04 00:04:22, "Mayuresh Chitale" wrote: >Smstateen extension specifies a mechanism to close >the potential covert channels that could cause security issues. > >This patch adds the CSRs defined in the specification and >the corresponding predicates and read/write functions. > >Signed-off

Re: [RFC 4/5] target/riscv: Add *envcfg* CSRs support

在 2022/1/29 上午9:28, Atish Patra 写道: On Wed, Jan 26, 2022 at 12:37 AM Weiwei Li > wrote: 在 2022/1/21 上午4:07, Atish Patra 写道: > The RISC-V privileged specification v1.12 defines few execution > environment configuration CSRs that can be used enable/dis