[PATCH v3] vfio: Introduce helper vfio_pci_from_vfio_device()

Introduce helper vfio_pci_from_vfio_device() to transform from VFIODevice to VFIOPCIDevice, also to hide low level VFIO_DEVICE_TYPE_PCI type check. Suggested-by: Cédric Le Goater Signed-off-by: Zhenzhong Duan --- v3: add one line comment to the helper v2: move helper to hw/vfio/pci.[hc

[PATCH v2] vfio: Introduce helper vfio_pci_from_vfio_device()

Introduce helper vfio_pci_from_vfio_device() to transform from VFIODevice to VFIOPCIDevice, also to hide low level VFIO_DEVICE_TYPE_PCI type check. Suggested-by: Cédric Le Goater Signed-off-by: Zhenzhong Duan --- v2: move helper to hw/vfio/pci.[hc] rename with vfio_pci_ prefix hw/vfio

[PATCH] vfio: Introduce helper vfio_device_to_vfio_pci()

Introduce helper vfio_device_to_vfio_pci() to transform from VFIODevice to VFIOPCIDevice, also to hide low level VFIO_DEVICE_TYPE_PCI type check. Suggested-by: Cédric Le Goater Signed-off-by: Zhenzhong Duan --- include/hw/vfio/vfio-device.h | 1 + hw/vfio/container.c | 4 ++-- hw

[PATCH v4 11/20] intel_iommu: Handle PASID entry addition

: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 2 + hw/i386/intel_iommu.c | 176 - 2 files changed, 175 insertions(+), 3 deletions(-) diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386

[PATCH v4 16/20] intel_iommu: Propagate PASID-based iotlb invalidation to host

U will cache first level page table related mappings during DMA address translation. Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 6 +++ hw/i386/intel_iommu.c | 95 +- 2 files chang

[PATCH v4 20/20] intel_iommu: Enable host device when x-flts=on in scalable mode

Now that all infrastructures of supporting passthrough device running with stage-1 translation are there, enable it now. Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index d2442ff28d

[PATCH v4 19/20] Workaround for ERRATA_772415_SPR17

stage mappings." Signed-off-by: Zhenzhong Duan --- hw/vfio/iommufd.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c index 61a548f13f..8156d81488 100644 --- a/hw/vfio/iommufd.c +++ b/hw/vfio/iommufd.c @@ -325,6 +325,7 @@ s

[PATCH v4 13/20] intel_iommu: Stick to system MR for IOMMUFD backed host device when x-fls=on

-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 34 ++ 1 file changed, 34 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 2d8588d9fe..7c41fd76a8 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -1773,6 +1773,28 @@ sta

[PATCH v4 06/20] intel_iommu: Introduce a new structure VTDHostIOMMUDevice

Introduce a new structure VTDHostIOMMUDevice which replaces HostIOMMUDevice to be stored in hash table. It includes a reference to HostIOMMUDevice and IntelIOMMUState, also includes BDF information which will be used in future patches. Signed-off-by: Zhenzhong Duan Reviewed-by: Eric Auger

[PATCH v4 18/20] vfio: Add a new element bypass_ro in VFIOContainerBase

When bypass_ro is true, read only memory section is bypassed from mapping in the container. This is a preparing patch to workaround Intel ERRATA_772415. Signed-off-by: Zhenzhong Duan --- include/hw/vfio/vfio-container-base.h | 1 + hw/vfio/listener.c| 13 + 2

[PATCH v4 17/20] intel_iommu: Replay all pasid bindings when either SRTP or TE bit is changed

vices to update host side bindings. Signed-off-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 27bd8c4c89..d2442ff28d 100644 --- a/hw/i386/intel_iommu.c +++ b/h

[PATCH v4 07/20] intel_iommu: Check for compatibility with IOMMUFD backed device when x-flts=on

, vIOMMU supports stage-1 1GB huge page mapping, but host does not, then this IOMMUFD backed device should fail. Even of the checks pass, for now we willingly reject the association because all the bits are not there yet. Signed-off-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw/i386

[PATCH v4 10/20] intel_iommu: Handle PASID entry removal and update

latest guest pasid entry and compare it with cached PASID entry. Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 27 - include/hw/i386/intel_iommu.h | 6 + hw/i386/intel_iommu.c | 196

[PATCH v4 15/20] intel_iommu: Replay pasid bindings after context cache invalidation

Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 2 ++ hw/i386/intel_iommu.c | 42 ++ hw/i386/trace-events | 1 + 3 files changed, 45 insertions(+) diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index

[PATCH v4 14/20] intel_iommu: Bind/unbind guest page table to host

OTLB_EVENTS since the MR is switched to IOMMU MR. So it is able to support shadowing the guest IO page table. Co-Authored-by: Yi Liu Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 14 ++- include/hw/i386/intel_iommu.h | 1

[PATCH v4 05/20] hw/pci: Export pci_device_get_iommu_bus_devfn() and return bool

Returns true if PCI device is aliased or false otherwise. This will be used in following patch to determine if a PCI device is under a PCI bridge. Signed-off-by: Zhenzhong Duan Reviewed-by: Eric Auger --- include/hw/pci/pci.h | 2 ++ hw/pci/pci.c | 12 2 files changed, 10

[PATCH v4 12/20] intel_iommu: Introduce a new pasid cache invalidation type FORCE_RESET

y: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 9 + hw/i386/intel_iommu.c | 25 + hw/i386/trace-events | 1 + 3 files changed, 35 insertions(+) diff --git a/hw/i386/intel_iommu_internal.h b/hw

[PATCH v4 08/20] intel_iommu: Fail passthrough device under PCI bridge if x-flts=on

an be hotplugged under same bridge. To simplify, just forbid passthrough device under PCI bridge no matter if there is, or will be emulated devices under same bridge. This is acceptable because PCIE bridge is more popular than PCI bridge now. Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan Reviewed-by:

[PATCH v4 04/20] vfio/iommufd: Force creating nested parent domain

support passthrough device with x-flts=on. Suggested-by: Nicolin Chen Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan Reviewed-by: Eric Auger --- hw/vfio/iommufd.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c index 48c590b6a9..61a548f13f

[PATCH v4 09/20] intel_iommu: Introduce two helpers vtd_as_from/to_iommu_pasid_locked

_as->pasid. vtd_as_to_iommu_pasid_locked() translates from BDF+vtd_as->pasid to iommu_pasid. Signed-off-by: Zhenzhong Duan Reviewed-by: Eric Auger --- hw/i386/intel_iommu.c | 58 +++ 1 file changed, 58 insertions(+) diff --git a/hw/i386/intel_i

[PATCH v4 01/20] intel_iommu: Rename vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_entry

In early days vtd_ce_get_rid2pasid_entry() was used to get pasid entry of rid2pasid, then it was extended to get any pasid entry. So a new name vtd_ce_get_pasid_entry is better to match what it actually does. No functional change intended. Signed-off-by: Zhenzhong Duan Reviewed-by: Clément

[PATCH v4 03/20] intel_iommu: Implement get_viommu_cap() callback

Implement get_viommu_cap() callback and expose stage-1 capability for now. VFIO uses it to create nested parent domain which is further used to create nested domain in vIOMMU. All these will be implemented in following patches. Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan Reviewed-by

[PATCH v4 02/20] hw/pci: Introduce pci_device_get_viommu_cap()

reate hiod set_iommu_device(hiod) Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan --- MAINTAINERS | 1 + include/hw/iommu.h | 17 + include/hw/pci/pci.h | 25 + hw/pci/pci.c | 11 +++ 4 files changed, 54 insertions(+) create m

[PATCH v4 00/20] intel_iommu: Enable stage-1 translation for passthrough device

u: Replay pasid bindings after context cache invalidation intel_iommu: Propagate PASID-based iotlb invalidation to host intel_iommu: Replay all pasid bindings when either SRTP or TE bit is changed Zhenzhong Duan (17): intel_iommu: Rename vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_

[PATCH] vfio/pci: Fix regression due to unexisting property use-legacy-x86-rom

6: Add the ramfb romfile compatibility") Signed-off-by: Zhenzhong Duan --- hw/vfio/types.h | 2 ++ hw/core/machine.c | 2 +- hw/i386/microvm.c | 2 +- hw/i386/pc_piix.c | 2 +- hw/i386/pc_q35.c | 2 +- hw/vfio/pci.c | 2 -- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/

[PATCH] vfio/pci: Recover sub-page BAR size when base address is not aligned

: Zhenzhong Duan --- hw/vfio/pci.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 1093b28df7..0455e6ce30 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -1348,9 +1348,7 @@ static void vfio_sub_page_bar_update_mapping(PCIDevice *pdev, int bar

[PATCH] i386/tdx: Fix the report of gpa in QAPI

ned-off-by: Zhenzhong Duan --- target/i386/kvm/tdx.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c index e809e4b2df..370a9b6e65 100644 --- a/target/i386/kvm/tdx.c +++ b/target/i386/kvm/tdx.c @@ -1269,7 +1269

[PATCH v3 09/20] intel_iommu: Introduce two helpers vtd_as_from/to_iommu_pasid_locked

_as->pasid. vtd_as_to_iommu_pasid_locked() translates from BDF+vtd_as->pasid to iommu_pasid. Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 58 +++ 1 file changed, 58 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu

[PATCH v3 17/20] intel_iommu: Replay all pasid bindings when either SRTP or TE bit is changed

vices to update host side bindings. Signed-off-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index d8b4296fe4..0a86bd47b2 100644 --- a/hw/i386/intel_iommu.c +++ b/h

[PATCH v3 18/20] vfio: Add a new element bypass_ro in VFIOContainerBase

When bypass_ro is true, read only memory section is bypassed from mapping in the container. This is a preparing patch to workaround Intel ERRATA_772415. Signed-off-by: Zhenzhong Duan --- hw/vfio/listener.c| 13 + include/hw/vfio/vfio-container-base.h | 1 + 2

[PATCH v3 08/20] intel_iommu: Fail passthrough device under PCI bridge if x-flts=on

an be hotplugged under same bridge. For simplify, just forbid passthrough device under PCI bridge no matter if there is, or will be emulated devices under same bridge. This is acceptable because PCIE bridge is more popular than PCI bridge now. Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw

[PATCH v3 00/20] intel_iommu: Enable stage-1 translation for passthrough device

bindings after context cache invalidation intel_iommu: Propagate PASID-based iotlb invalidation to host intel_iommu: Replay all pasid bindings when either SRTP or TE bit is changed Zhenzhong Duan (17): intel_iommu: Rename vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_entry hw/pci: I

[PATCH v3 02/20] hw/pci: Introduce pci_device_get_viommu_cap()

pci_device_get_viommu_cap() call pci_device_get_iommu_bus_devfn() to get iommu_bus->iommu_ops and call get_viommu_cap() callback to get a bitmap with each bit represents a vIOMMU exposed capability. Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan --- MAINTAINERS | 1 + hw/

[PATCH v3 12/20] intel_iommu: Introduce a new pasid cache invalidation type FORCE_RESET

y: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 25 + hw/i386/intel_iommu_internal.h | 9 + hw/i386/trace-events | 1 + 3 files changed, 35 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c

[PATCH v3 03/20] intel_iommu: Implement get_viommu_cap() callback

Implement get_viommu_cap() callback and expose stage-1 capability for now. VFIO uses it to create nested parent domain which is further used to create nested domain in vIOMMU. All these will be implemented in following patches. Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw/i386

[PATCH v3 15/20] intel_iommu: Replay pasid bindings after context cache invalidation

Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 42 ++ hw/i386/intel_iommu_internal.h | 2 ++ hw/i386/trace-events | 1 + 3 files changed, 45 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index c35673eb58

[PATCH v3 06/20] intel_iommu: Introduce a new structure VTDHostIOMMUDevice

Introduce a new structure VTDHostIOMMUDevice which replaces HostIOMMUDevice to be stored in hash table. It includes a reference to HostIOMMUDevice and IntelIOMMUState, also includes BDF information which will be used in future patches. Signed-off-by: Zhenzhong Duan Reviewed-by: Eric Auger

[PATCH v3 11/20] intel_iommu: Handle PASID entry adding

-present pasid entry moved to present This handles c) by going through each passthrough device and each pasid. When a new valid pasid entry is founded, find or create a vtd_as and cache pasid entry in it. Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386

[PATCH v3 19/20] Workaround for ERRATA_772415_SPR17

stage mappings." Signed-off-by: Zhenzhong Duan --- hw/vfio/iommufd.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c index c172c177fc..a28641b5f5 100644 --- a/hw/vfio/iommufd.c +++ b/hw/vfio/iommufd.c @@ -325,6 +325,7 @@ s

[PATCH v3 14/20] intel_iommu: Bind/unbind guest page table to host

OTLB_EVENTS since the MR is switched to IOMMU MR. So it is able to support shadowing the guest IO page table. Co-Authored-by: Yi Liu Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 221 +++

[PATCH v3 20/20] intel_iommu: Enable host device when x-flts=on in scalable mode

Now that all infrastructures of supporting passthrough device running with stage-1 translation are there, enable it now. Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 0a86bd47b2

[PATCH v3 07/20] intel_iommu: Check for compatibility with IOMMUFD backed device when x-flts=on

, vIOMMU supports stage-1 1GB huge page mapping, but host does not, then this IOMMUFD backed device should fail. Even of the checks pass, for now we willingly reject the association because all the bits are not there yet. Signed-off-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c

[PATCH v3 16/20] intel_iommu: Propagate PASID-based iotlb invalidation to host

U will cache first level page table related mappings during DMA address translation. Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 95 +- hw/i386/intel_iommu_internal.h | 6 +++ 2 files chang

[PATCH v3 01/20] intel_iommu: Rename vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_entry

In early days vtd_ce_get_rid2pasid_entry() was used to get pasid entry of rid2pasid, then it was extended to get any pasid entry. So a new name vtd_ce_get_pasid_entry is better to match what it actually does. No functional change intended. Signed-off-by: Zhenzhong Duan Reviewed-by: Clément

[PATCH v3 10/20] intel_iommu: Handle PASID entry removing and updating

-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 194 +++-- hw/i386/intel_iommu_internal.h | 27 - hw/i386/trace-events | 3 + include/hw/i386/intel_iommu.h | 6 + 4 files changed, 218 insertions

[PATCH v3 13/20] intel_iommu: Stick to system MR for IOMMUFD backed host device when x-fls=on

-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 34 ++ 1 file changed, 34 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index cf263498db..030862fb2f 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -1773,6 +1773,28 @@ sta

[PATCH v3 05/20] hw/pci: Export pci_device_get_iommu_bus_devfn() and return bool

Returns true if PCI device is aliased or false otherwise. This will be used in following patch to determine if a PCI device is under a PCI bridge. Signed-off-by: Zhenzhong Duan --- hw/pci/pci.c | 12 include/hw/pci/pci.h | 2 ++ 2 files changed, 10 insertions(+), 4

[PATCH v3 04/20] vfio/iommufd: Force creating nested parent domain

through device with x-flts=on. Suggested-by: Nicolin Chen Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw/vfio/iommufd.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c index 48c590b6a9..c172c177fc 100644 --- a/hw/vfio/iommufd.c +

[PATCH v2 1/2] vfio/container: Fix potential SIGSEGV when recover from unmap-all-vaddr failure

re Signed-off-by: Zhenzhong Duan --- hw/vfio/cpr-legacy.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/vfio/cpr-legacy.c b/hw/vfio/cpr-legacy.c index a84c3247b7..0a5d1bd480 100644 --- a/hw/vfio/cpr-legacy.c +++ b/hw/vfio/cpr-legacy.c @@ -180,9 +180

[PATCH v2 0/2] Some trivial live update fixes

Steve) - s/DMA_MAP_FUNC/dma_map_fn (Steve) Zhenzhong Duan (2): vfio/container: Fix potential SIGSEGV when recover from unmap-all-vaddr failure vfio/container: Fix vfio_container_post_load() include/hw/vfio/vfio-cpr.h | 7 --- hw/vfio/cpr-legacy.c | 23 +-

[PATCH v2 2/2] vfio/container: Fix vfio_container_post_load()

eless and is removed. Fixes: 7e9f21411302 ("vfio/container: restore DMA vaddr") Signed-off-by: Zhenzhong Duan --- include/hw/vfio/vfio-cpr.h | 7 --- hw/vfio/cpr-legacy.c | 23 +-- 2 files changed, 13 insertions(+), 17 deletions(-) diff --git a/include/h

[PATCH 2/4] vfio/container: fails mdev hotplug if add migration blocker failed

It's aggressive to abort a running QEMU process when hotplug a mdev and it fails migration blocker adding. Fix by just failing mdev hotplug itself. Signed-off-by: Zhenzhong Duan --- hw/vfio/container.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw

[PATCH 0/4] Some trivial live update fixes

Hi These are trivial VFIO live update fixes in corner cases. 1) open /dev/vfio/vfio fail trigger SIGSEGV 2) mdev hotplug trigger qemu abort 3) potential SIGSEGV when unmap-all-vaddr failed 3) potential vfio_container_post_load failure Thanks Zhenzhong Zhenzhong Duan (4): vfio/container: Fix

[PATCH 3/4] vfio/container: Fix potential SIGSEGV when recover from unmap-all-vaddr failure

cpr.saved_dma_map isn't initialized in source qemu which lead to vioc->dma_map assigned a NULL value, this will trigger SIGSEGV. Fix it by save and restore vioc->dma_map locally. Fixes: eba1f657cbb1 ("vfio/container: recover from unmap-all-vaddr failure") Signed-o

[PATCH 4/4] vfio/container: Fix vfio_container_post_load()

eless and is removed. Fixes: 7e9f21411302 ("vfio/container: restore DMA vaddr") Signed-off-by: Zhenzhong Duan --- include/hw/vfio/vfio-cpr.h | 1 - hw/vfio/cpr-legacy.c | 20 +++- 2 files changed, 7 insertions(+), 14 deletions(-) diff --git a/include/hw/vfio/vfio

[PATCH 1/4] vfio/container: Fix SIGSEGV when open container file fails

When open /dev/vfio/vfio fails, SIGSEGV triggers because vfio_listener_unregister() doesn't support a NULL bcontainer pointer. Fixes: a1f267a7d4d9 ("vfio/container: reform vfio_container_connect cleanup") Signed-off-by: Zhenzhong Duan --- hw/vfio/container.c | 4 +++- 1

[PATCH v2 11/19] intel_iommu: Handle PASID entry adding

-present pasid entry moved to present This handles c). Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 1 + hw/i386/intel_iommu.c | 169 - 2 files changed, 169 insertions(+), 1 deletion

[PATCH v2 15/19] intel_iommu: Replay pasid binds after context cache invalidation

Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 1 + hw/i386/intel_iommu.c | 51 -- hw/i386/trace-events | 1 + 3 files changed, 51 insertions(+), 2 deletions(-) diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386

[PATCH v2 16/19] intel_iommu: Propagate PASID-based iotlb invalidation to host

U will cache first level page table related mappings during DMA address translation. Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 6 ++ hw/i386/intel_iommu.c | 113 - 2 files change

[PATCH v2 07/19] intel_iommu: Check for compatibility with IOMMUFD backed device when x-flts=on

, vIOMMU supports stage-1 1GB huge page mapping, but host does not, then this IOMMUFD backed device should be failed. Signed-off-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 1 + hw/i386/intel_iommu.c | 28 2 files changed, 29

[PATCH v2 14/19] intel_iommu: Bind/unbind guest page table to host

OTLB_EVENTS since the MR is switched to IOMMU MR. So it is able to support shadowing the guest IO page table. Co-Authored-by: Yi Liu Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 11 ++ hw/i386/intel_iommu.c

[PATCH v2 09/19] intel_iommu: Introduce two helpers vtd_as_from/to_iommu_pasid_locked

_as->pasid. vtd_as_to_iommu_pasid_locked() translates from BDF+vtd_as->pasid to iommu_pasid. Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 58 +++ 1 file changed, 58 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu

[PATCH v2 05/19] hw/pci: Export pci_device_get_iommu_bus_devfn() and return bool

Returns true if PCI device is aliased or false otherwise. This will be used in following patch to determine if a PCI device is under a PCI bridge. Signed-off-by: Zhenzhong Duan --- include/hw/pci/pci.h | 2 ++ hw/pci/pci.c | 12 2 files changed, 10 insertions(+), 4

[PATCH v2 19/19] intel_iommu: Enable host device when x-flts=on in scalable mode

Now that all infrastructures of supporting passthrough device running with stage-1 translation are there, enable it now. Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 0b322078cc

[PATCH v2 13/19] intel_iommu: Stick to system MR for IOMMUFD backed host device when x-fls=on

-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 24 1 file changed, 24 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index ed71bb8ec7..be01f8885f 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -1779,6 +1779,7 @@ static b

[PATCH v2 17/19] intel_iommu: Refresh pasid bind when either SRTP or TE bit is changed

From: Yi Liu When either 'Set Root Table Pointer' or 'Translation Enable' bit is changed, the pasid bindings on host side become stale and need to be updated. Introduce a helper function vtd_refresh_pasid_bind() for that purpose. Signed-off-by: Yi Liu Signed-off-by: Zhe

[PATCH v2 00/19] intel_iommu: Enable stage-1 translation for passthrough device

devid/hwpt_id to vIOMMU instead of iommufd/devid/ioas_id - add vtd_as_[from|to]_iommu_pasid() helper to translate between vtd_as and iommu pasid, this is important for dropping VTDPASIDAddressSpace Yi Liu (3): intel_iommu: Replay pasid binds after context cache invalidation intel_iommu: Propagat

[PATCH v2 10/19] intel_iommu: Handle PASID entry removing and updating

Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 27 include/hw/i386/intel_iommu.h | 6 + hw/i386/intel_iommu.c | 265 +++-- hw/i386/trace-events | 3 + 4 files changed, 291 insertions(+), 10 deletions

[PATCH v2 18/19] Workaround for ERRATA_772415_SPR17

, Errata Details, SPR17. https://www.intel.com/content/www/us/en/content-details/772415/content-details.html Signed-off-by: Zhenzhong Duan --- include/hw/vfio/vfio-container-base.h | 1 + hw/vfio/iommufd.c | 8 +++- hw/vfio/listener.c| 13

[PATCH v2 06/19] intel_iommu: Introduce a new structure VTDHostIOMMUDevice

Introduce a new structure VTDHostIOMMUDevice which replaces HostIOMMUDevice to be stored in hash table. It includes a reference to HostIOMMUDevice and IntelIOMMUState, also includes BDF information which will be used in future patches. Signed-off-by: Zhenzhong Duan Reviewed-by: Eric Auger

[PATCH v2 12/19] intel_iommu: Introduce a new pasid cache invalidation type FORCE_RESET

y: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 2 ++ hw/i386/intel_iommu.c | 28 hw/i386/trace-events | 1 + 3 files changed, 31 insertions(+) diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_inter

[PATCH v2 01/19] intel_iommu: Rename vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_entry

In early days vtd_ce_get_rid2pasid_entry() was used to get pasid entry of rid2pasid, then it was extended to get any pasid entry. So a new name vtd_ce_get_pasid_entry is better to match what it actually does. No functional change intended. Signed-off-by: Zhenzhong Duan Reviewed-by: Clément

[PATCH v2 04/19] vfio/iommufd: Force creating nested parent domain

Call pci_device_get_viommu_cap() to get if vIOMMU supports VIOMMU_CAP_STAGE1, if yes, create nested parent domain which could be reused by vIOMMU to create nested domain. Suggested-by: Nicolin Chen Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw/vfio/iommufd.c | 14 ++ 1

[PATCH v2 08/19] intel_iommu: Fail passthrough device under PCI bridge if x-flts=on

e now. Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 1c79efc1cb..9d4adc9458 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_io

[PATCH v2 02/19] hw/pci: Introduce pci_device_get_viommu_cap()

pci_device_get_viommu_cap() call pci_device_get_iommu_bus_devfn() to get iommu_bus->iommu_ops and call get_viommu_cap() callback to get a bitmap with each bit represents a vIOMMU exposed capability. Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan --- include/hw/pci/pci.h |

[PATCH v2 03/19] intel_iommu: Implement get_viommu_cap() callback

Implement get_viommu_cap() callback and expose stage-1 capability for now. VFIO uses it to create nested parent domain which is further used to create nested domain in vIOMMU. All these will be implemented in following patches. Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan

[PATCH] vfio/pci: Fix instance_size of VFIO_PCI_BASE

Fixes: d4e392d0a99b ("vfio: add vfio-pci-base class") Signed-off-by: Zhenzhong Duan --- hw/vfio/pci.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 92562898e4..03f52a9b8f 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -3478,7 +3

[PATCH] vfio/container: Fix vfio_listener_commit()

It's wrong to call into listener_begin callback in vfio_listener_commit(). Currently this impacts vfio-user. Fixes: d9b7d8b6993b ("vfio/container: pass listener_begin/commit callbacks") Signed-off-by: Zhenzhong Duan --- hw/vfio/listener.c | 2 +- 1 file changed, 1 insertion

[PATCH v4 4/5] hw/char/sh_serial: Remove dummy definition of SH_SERIAL class

/msg00586.html Suggested-by: David Hildenbrand Signed-off-by: Zhenzhong Duan --- hw/char/sh_serial.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c index 6abd80386f..8ccc2234ba 100644 --- a/hw/char/sh_serial.c +++ b/hw/char/sh_serial.c

[PATCH v1 04/15] intel_iommu: Introduce a new structure VTDHostIOMMUDevice

Introduce a new structure VTDHostIOMMUDevice which replaces HostIOMMUDevice to be stored in hash table. It includes a reference to HostIOMMUDevice and IntelIOMMUState, also includes BDF information which will be used in future patches. Signed-off-by: Zhenzhong Duan --- hw/i386

[PATCH v1 00/15] intel_iommu: Enable stage-1 translation for passthrough device

nt for dropping VTDPASIDAddressSpace Yi Liu (3): intel_iommu: Replay pasid binds after context cache invalidation intel_iommu: Propagate PASID-based iotlb invalidation to host intel_iommu: Refresh pasid bind when either SRTP or TE bit is changed Zhenzhong Duan (12): intel_iommu: Rename vt

[PATCH v1 09/15] intel_iommu: Bind/unbind guest page table to host

ce | | (iommufd0)| | (iommufd0)| | (non-CC) | | | | | | (iommufd0) | .---. .---. .. Co-Authored-by: Yi Liu Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h

[PATCH v1 06/15] intel_iommu: Handle PASID entry removing and updating

Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 26 include/hw/i386/intel_iommu.h | 6 + hw/i386/intel_iommu.c | 252 +++-- hw/i386/trace-events | 3 + 4 files changed, 277 insertions(+), 10 deletions

[PATCH v1 05/15] intel_iommu: Introduce two helpers vtd_as_from/to_iommu_pasid_locked

lue. vtd_as_from_iommu_pasid_locked() translates from BDF+iommu_pasid to vtd_as which contains PCI's pasid vtd_as->pasid. vtd_as_to_iommu_pasid_locked() translates from BDF+vtd_as->pasid to iommu_pasid. Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 50 +++

[PATCH v1 11/15] intel_iommu: Replay pasid binds after context cache invalidation

Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 1 + hw/i386/intel_iommu.c | 51 -- hw/i386/trace-events | 1 + 3 files changed, 51 insertions(+), 2 deletions(-) diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386

[PATCH v1 02/15] intel_iommu: Optimize context entry cache utilization

it. So introduce a helper function vtd_as_to_context_entry() to fetch from cache before trying with vtd_dev_to_context_entry(). Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 36 +++- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/hw/i

[PATCH v1 08/15] intel_iommu: Introduce a new pasid cache invalidation type FORCE_RESET

FORCE_RESET is different from GLOBAL_INV which updates pasid cache if underlying pasid entry is still valid, it drops all the pasid caches. FORCE_RESET isn't a VTD spec defined invalidation type for pasid cache, only used internally in system level reset. Signed-off-by: Zhenzhong Duan --

[PATCH v1 15/15] intel_iommu: Enable host device when x-flts=on in scalable mode

Now that all infrastructures of supporting passthrough device running with stage-1 translation are there, enable it now. Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 165998896c

[PATCH v1 12/15] intel_iommu: Propagate PASID-based iotlb invalidation to host

U will cache first level page table related mappings during DMA address translation. Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 6 ++ hw/i386/intel_iommu.c | 118 - 2 files change

[PATCH v1 07/15] intel_iommu: Handle PASID entry adding

-present pasid entry moved to present This handles c). Signed-off-by: Yi Liu Signed-off-by: Yi Sun Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 1 + hw/i386/intel_iommu.c | 167 - 2 files changed, 167 insertions(+), 1 deletion

[PATCH v1 03/15] intel_iommu: Check for compatibility with IOMMUFD backed device when x-flts=on

, vIOMMU supports stage-1 1GB huge page mapping, but host does not, then this IOMMUFD backed device should be failed. Signed-off-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 1 + hw/i386/intel_iommu.c | 28 2 files changed, 29

[PATCH v1 14/15] intel_iommu: Bypass replay in stage-1 page table mode

VFIO utilizes replay to setup initial shadow iommu mappings. But when stage-1 page table is configured, it is passed to host to construct nested page table, there is no replay needed. Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 8 1 file changed, 8 insertions(+) diff

[PATCH v1 13/15] intel_iommu: Refresh pasid bind when either SRTP or TE bit is changed

From: Yi Liu When either 'Set Root Table Pointer' or 'Translation Enable' bit is changed, the pasid bindings on host side become stale and need to be updated. Introduce a helper function vtd_refresh_pasid_bind() for that purpose. Signed-off-by: Yi Liu Signed-off-by: Zhe

[PATCH v1 01/15] intel_iommu: Rename vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_entry

In early days vtd_ce_get_rid2pasid_entry() was used to get pasid entry of rid2pasid, then it was extended to get any pasid entry. So a new name vtd_ce_get_pasid_entry is better to match what it actually does. No functional change intended. Signed-off-by: Zhenzhong Duan Reviewed-by: Clément

[PATCH v1 10/15] intel_iommu: ERRATA_772415 workaround

0) | | (iommufd0) | .---. .---. .. .. Changed to pass VTDHostIOMMUDevice pointer to vtd_check_hdev() so errata could be saved. Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_internal.h | 1 + include/hw/i386/intel_iommu.h

[PATCH v4 2/5] virtio-pmem: Fix definition of VirtIOPMEMClass

l/2025-06/msg00586.html Reported-by: David Hildenbrand Reviewed-by: David Hildenbrand Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Zhenzhong Duan --- include/hw/virtio/virtio-pmem.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/virtio/virtio-pmem.h b/include/

[PATCH v4 1/5] virtio-mem: Fix definition of VirtIOMEMClass

Parent of VirtIOMEMClass is VirtioDeviceClass rather than VirtIODevice. This isn't catastrophic only because sizeof(VirtIODevice) > sizeof(VirtioDeviceClass). Fixes: 910b25766b33 ("virtio-mem: Paravirtualized memory hot(un)plug") Signed-off-by: Zhenzhong Duan Reviewed-by:

[PATCH v4 5/5] hw/riscv/riscv-iommu: Remove definition of RISCVIOMMU[Pci|Sys]Class

eally necessary. Signed-off-by: Zhenzhong Duan Reviewed-by: Daniel Henrique Barboza --- include/hw/riscv/iommu.h | 6 ++ hw/riscv/riscv-iommu-pci.c | 6 -- hw/riscv/riscv-iommu-sys.c | 6 -- 3 files changed, 2 insertions(+), 16 deletions(-) diff --git a/include/hw/riscv/iommu.h b/inclu

[PATCH v4 3/5] hw/gpio/aspeed: Fix definition of AspeedGPIOClass

u.org/archive/html/qemu-devel/2025-06/msg00586.html Suggested-by: David Hildenbrand Reviewed-by: Cédric Le Goater Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Zhenzhong Duan --- include/hw/gpio/aspeed_gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/gpio/

[PATCH v4 0/5] Fix definition of classes with wrong parent

x27;t take effect, so no Fixes tag for them. Thanks Zhenzhong Changelog: v4: - add comments 'this isn't catastrophic only because sizeof(VirtIODevice) > sizeof(VirtioDeviceClass).' to patch1/2/3 (Markus) - collect RB for patch5 v3: - s/Suggested-by/Reported-by on patch2 (David) -

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