Re: [PATCH] intel-iommu: fix Read DMAR IQA REG DW

2024-07-23 Thread Yee Li
> So you found it by checking the debugfs output, and it looks to miss > the DW bit. is it? Put a clearer commit message would be helpful. Yes, it is. So, "dropped the value of DW field" is indeed a bug? > Please address Michael's comment, add a "Fixes: xxx" tag and resend. OK, I will.

Re: [PATCH] intel-iommu: fix Read DMAR IQA REG DW

2024-07-22 Thread Yee Li
> or devmem2 read the reg: > > "devmem2 0xfed90090" > "/dev/mem opened." > "Memory mapped at address 0x7f983014f000." > "Value at address 0xFED90090 (0x7f983014f000): 0x0" Sorry, correct the devmem2 read value. "Value at address 0xFED90090 (0x7f983014f000): 0x1DA801"

Re: [PATCH] intel-iommu: fix Read DMAR IQA REG DW

2024-07-22 Thread Yee Li
> > When dmar_readq or devmem2 read the DW of IQA always 0UL because > > "& VTD_IQA_QS". So, try to fix it. > > > > case: > > after vtd_mem_write > > IQA val: 0x100206801 > > > > after vtd_mem_read > > IQA val: 0x100206001 > > > > Signed-off-by: yeeli > > > how was this tested? If VT-D hardware s

Re: [PATCH] intel-iommu: fix Read DMAR IQA REG DW

2024-07-03 Thread Yee Li
Sorry, the patch missing "(( ))" Replace "& VTD_IQA_QS" with "& (VTD_IQA_QS | VTD_IQA_DW_MASK))" is correct. Revised patch as follows, Signed-off-by: yeeli --- hw/i386/intel_iommu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu