Re: [Qemu-devel] Could not boot a guest vm from kvm mode based on APM X-Gene Host and latest qemu

2015-09-16 Thread Tushar Jagad
Hi, On Mon, Sep 14, 2015 at 06:03:48PM -0600, liang yan wrote: > Hello, All, > > I am trying to enable kvm for a guest vm on an APM X-Gene Host with > latest qemu, but could not make it work. > > The host is APM X-Gene 8-core, Linux kernel is 4.1.0-rc7-1-arm64, > > Guest kernel is linux-3.16rc3 >

Re: [Qemu-devel] [PATCH RFC 2/4] arm64: kvm: enable trapping of read access to regs in TID3 group

2015-09-15 Thread Tushar Jagad
Hi Shannon, On Tue, Sep 15, 2015 at 12:23:57PM +0800, Shannon Zhao wrote: > > > On 2015/9/9 16:38, Tushar Jagad wrote: > > This patch modifies the HCR_GUEST_FLAGS to enable trapping of > > non secure read to registers under the HCR_EL2.TID3 group to EL2. > > >

[Qemu-devel] [PATCH RFC 0/4] arm64: cross cpu support

2015-09-09 Thread Tushar Jagad
: add MIDR_EL1 switching Tushar Jagad (3): arm64: kvm: enable trapping of read access to regs in TID3 group arm64: kvm: Setup MIDR as per target vcpu arm/arm64: kvm: Disable comparision of cpu and vcpu target Documentation/virtual/kvm/api.txt |8 + arch/arm/kvm/arm.c

[Qemu-devel] [PATCH RFC 0/3] arm64: cross cpu support

2015-09-09 Thread Tushar Jagad
lease note that the supporting patches for KVM have not been merged into the mainline tree yet. These patches are on top of qemu tag v2.4.0. Tushar Jagad (3): linux-headers: sync'd kernel headers for arm/arm64 arm: cross cpu: add new properties for arm cpu arm64: pass breakpoint/watc

[Qemu-devel] [PATCH RFC 2/3] arm: cross cpu: add new properties for arm cpu

2015-09-09 Thread Tushar Jagad
guest kernel to a specific count considering different mix of hardware platforms in the datacenter. This patch adds new properties for defining hardware in terms of number of breakpoints, watchpoints and pmu counters supported in the guest. Signed-off-by: Tushar Jagad --- target-arm/cpu.c | 2

[Qemu-devel] [PATCH RFC 1/3] linux-headers: sync'd kernel headers for arm/arm64

2015-09-09 Thread Tushar Jagad
Sync arm/arm64 headers for bringing in support for cross cpu. Signed-off-by: Tushar Jagad --- linux-headers/asm-arm64/kvm.h | 9 + 1 file changed, 9 insertions(+) diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h index c8abf25..94d1fc9 100644 --- a/linux

[Qemu-devel] [PATCH RFC 3/4] arm64: kvm: Setup MIDR as per target vcpu

2015-09-09 Thread Tushar Jagad
For Cross CPU targets guest kernel should see MIDR value as per the target specified. This patch adds support to construct the value for MIDR register based on the target vcpu. Signed-off-by: Tushar Jagad --- arch/arm64/kvm/sys_regs.c | 43 +++ 1 file

[Qemu-devel] [PATCH RFC 2/4] arm64: kvm: enable trapping of read access to regs in TID3 group

2015-09-09 Thread Tushar Jagad
emulated values are constructed at runtime from the trap handler. Signed-off-by: Tushar Jagad --- Documentation/virtual/kvm/api.txt |8 + arch/arm/kvm/arm.c| 50 - arch/arm64/include/asm/kvm_arm.h |2 +- arch/arm64/include/asm/kvm_asm.h | 38 +++- arch/arm64

[Qemu-devel] [PATCH RFC 3/3] arm64: pass breakpoint/watchpoint info for target cpu

2015-09-09 Thread Tushar Jagad
available and the guest cpu needs to be different from the host cpu. Qemu passes this information to the host kernel which reflects these properties accordingly in the guest vcpu. Signed-off-by: Tushar Jagad --- hw/arm/virt.c| 23 ++- target-arm/cpu-qom.h | 6

[Qemu-devel] [PATCH RFC 4/4] arm/arm64: kvm: Disable comparision of cpu and vcpu target

2015-09-09 Thread Tushar Jagad
This patch disables comparison of physical cpu and vcpu for supporting cross cpu guests. Signed-off-by: Tushar Jagad --- arch/arm/kvm/arm.c |5 - 1 file changed, 5 deletions(-) diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c index 8907d37..b3214b2 100644 --- a/arch/arm/kvm/arm.c

[Qemu-devel] [PATCH RFC 1/4] arm64: KVM: add MIDR_EL1 switching

2015-09-09 Thread Tushar Jagad
From: Marc Zyngier Move MIDR_EL1 to be a world-switched register, instead of being unchanged from the host. The behaviour is preserved by using the host's MIDR_EL1 as a reset value for the guest's register. Signed-off-by: Marc Zyngier Signed-off-by: Tushar Jagad --- arch/arm64/i