Re: [PATCH v3 0/7] physmem: teach cpu_memory_rw_debug() to write to more memory regions

Sorry for the delayed engagement, I failed to apply the patch set from the mailing list and had to remember that David had published this change set on GitHub. Tested-by: Stefan Zabka This addresses my initial use case of being able to write to a single MMIO device. I have not set up a

Re: [PATCH v2] physmem: allow cpu_memory_rw_debug to write to MMIO devices

On 21/12/2024 15:55, David Hildenbrand wrote: > Let's wait for opinions from others first. states that two weeks is a reasonable amount of time for follow-up. Should I also ping the origin

[PATCH v2] physmem: allow cpu_memory_rw_debug to write to MMIO devices

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/213 Signed-off-by: Stefan Zabka --- Addressed initial review by David Hildenbrand The other change made more sense to me, so I'd like to write a test to verify that an AddressSpace like 0x00..0x0F MMIO Device A 0x10..0x1F ROM 0x20..0x2F

[PATCH] physmem: allow cpu_memory_rw_debug to write to MMIO devices

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/213 Signed-off-by: Stefan Zabka --- system/physmem.c | 22 ++ 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/system/physmem.c b/system/physmem.c index dc1db3a384..53cdccefcb 100644 --- a/system/physmem.c