Re: CXL volatile memory is not listed

Once the cxl memory is online, how does Operating system know whether to malloc in the cxl memory or socket attached DDR memory? [https://static1.squarespace.com/static/60dbbd6d597c966b91a3b27b/t/6104415e6177af1589fb05e4/1627668830393/elastics-cloud-logo-120.png] Sh

RE: Follow-up on the CXL discussion at OFTC

Hi Ben Are you planning to add the CXL2.0 switch inside QEMU or already added in one of the version? Regards, Shreyas -Original Message- From: Ben Widawsky Sent: Thursday, November 18, 2021 5:48 PM To: Shreyas Shah Cc: Saransh Gupta1 ; Jonathan Cameron ; linux-...@vger.kernel.org;

RE: Follow-up on the CXL discussion at OFTC

Hello Folks, Any plan to add CXL2.0 switch ports in QEMU? Regards, Shreyas -Original Message- From: Saransh Gupta1 Sent: Thursday, November 18, 2021 2:21 PM To: Jonathan Cameron ; Ben Widawsky Cc: linux-...@vger.kernel.org; qemu-devel@nongnu.org Subject: RE: Follow-up on the CXL dis