port on the KVM
> side");
> + exit(EXIT_FAILURE);
> + }
> }
>
> pci_setup_iommu(bus, &amdvi_iommu_ops, s);
>
>
> It's admittedly a bit brittle, but it's already done in the neighboring
> hw/i386/intel_iommu.c so I guess it's okay.
>
Same proposed at
https://lore.kernel.org/qemu-devel/cebca38a-5896-e2a5-8a68-5edad5dc9...@amd.com/
and I think Phil confirmed that it works.
Thanks,
Santosh
> Paolo
>
On 11/14/2024 12:09 AM, Paolo Bonzini wrote:
> On Wed, Nov 13, 2024 at 7:25 PM Shukla, Santosh
> wrote:
>> Same proposed at
>> https://lore.kernel.org/qemu-devel/cebca38a-5896-e2a5-8a68-5edad5dc9...@amd.com/
>> and I think Phil confirmed that it works.
>
> T
2:10, Michael S. Tsirkin wrote:
>>
>> From: Suravee Suthikulpanit
>>
>> The XTSup mode enables x2APIC support for AMD IOMMU, which is needed
>> to support vcpu w/ APIC ID > 255.
>>
>> Reviewed-by: Alejandro Jimenez
>> Signed-off-by: Suravee Suthikul
Hi there,
Ping? Appreciate any further review comment or series is OK to pull, Please let
me know.
Thank you!
Santosh
On 10/9/2024 11:35 AM, Shukla, Santosh wrote:
>
> Ping?
> Gentle reminder.
>
> Thanks,
> Santosh
>
> On 9/27/2024 10:59 PM, Santosh Shukla wrote:
Ping?
Gentle reminder.
Thanks,
Santosh
On 9/27/2024 10:59 PM, Santosh Shukla wrote:
> Series adds following feature support for emulated amd vIOMMU
> 1) Pass Through(PT) mode
> 2) Interrupt Remapping(IR) mode
>
> 1) PT mode
> Introducing the shared 'nodma' memor
From: Suravee Suthikulpanit
Rename the MMIO memory region variable 'mmio' to 'mr_mmio'
so to correctly name align with struct AMDVIState::variable type.
No functional change intended.
Reviewed-by: Alejandro Jimenez
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: San
From: Suravee Suthikulpanit
Introduce 'nodma' shared memory region to support PT mode
so that for each device, we only create an alias to shared memory
region when DMA-remapping is disabled.
Reviewed-by: Alejandro Jimenez
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Sant
From: Suravee Suthikulpanit
Use shared memory region for interrupt remapping which can be
aliased by all devices.
Reviewed-by: Alejandro Jimenez
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
hw/i386/amd_iommu.c | 22 ++
hw/i386/amd_iommu.h | 1
From: Suravee Suthikulpanit
The XTSup mode enables x2APIC support for AMD IOMMU, which is needed
to support vcpu w/ APIC ID > 255.
Reviewed-by: Alejandro Jimenez
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
v3:
- Fixed the typos: s/xt/xtsup at error_report()
update
the shadowed interrupt remapping table in the host IOMMU.
Therefore, send notification when guest IOMMU emulates the IRT
invalidation commands.
Reviewed-by: Alejandro Jimenez
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
v3:
- Fixed the typos in patch
Series adds following feature support for emulated amd vIOMMU
1) Pass Through(PT) mode
2) Interrupt Remapping(IR) mode
1) PT mode
Introducing the shared 'nodma' memory region that can be aliased
by all the devices in the PT mode. Shared memory with aliasing
approach will help run VM faster when lo
On 9/21/2024 1:56 AM, Alejandro Jimenez wrote:
> Hi Santosh,
>
> On 9/16/24 10:31, Santosh Shukla wrote:
>> From: Suravee Suthikulpanit
>>
>> Introduce 'nodma' shared memory region to support PT mode
>> so that for each device, we only create a
On 9/21/2024 1:56 AM, Alejandro Jimenez wrote:
> In subject:
> s/invaldate/invalidate/
>
> On 9/16/24 10:31, Santosh Shukla wrote:
>> From: Suravee Suthikulpanit
>>
>> In order to support AMD IOMMU interrupt remapping emulation with PCI
>> pass-through dev
Hi Alejandro,
On 9/21/2024 2:09 AM, Alejandro Jimenez wrote:
> Hi Santosh,
>
>
> On 9/16/24 10:31, Santosh Shukla wrote:
>> Series adds following feature support for emulated amd vIOMMU
>> 1) Pass Through(PT) mode
>> 2) Interrupt Remapping(IR) mode
>>
>
On 9/21/2024 1:56 AM, Alejandro Jimenez wrote:
>
>
> On 9/16/24 10:31, Santosh Shukla wrote:
>> From: Suravee Suthikulpanit
>>
>> The XTSup mode enables x2APIC support for AMD IOMMU, which is needed
>> to support vcpu w/ APIC ID > 255.
>>
>>
Series adds following feature support for emulated amd vIOMMU
1) Pass Through(PT) mode
2) Interrupt Remapping(IR) mode
1) PT mode
Introducing the shared 'nodma' memory region that can be aliased
by all the devices in the PT mode. Shared memory with aliasing
approach will help run VM faster when lo
From: Suravee Suthikulpanit
Use shared memory region for interrupt remapping which can be
aliased by all devices.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
hw/i386/amd_iommu.c | 22 ++
hw/i386/amd_iommu.h | 1 +
2 files changed, 15 insertions
update
the shadowed interrupt remapping table in the host IOMMU.
Therefore, send notification when guet IOMMU emulates the IRT invalidation
commands.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
hw/i386/amd_iommu.c | 12
1 file changed, 12 insertions
From: Suravee Suthikulpanit
The XTSup mode enables x2APIC support for AMD IOMMU, which is needed
to support vcpu w/ APIC ID > 255.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
v2:
- Fixed non-kvm build issue by adding a check for kvm_irqchip_is_split()
hw/i
From: Suravee Suthikulpanit
Introduce 'nodma' shared memory region to support PT mode
so that for each device, we only create an alias to shared memory
region when DMA-remapping is disabled.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
hw/i386/amd_io
From: Suravee Suthikulpanit
Rename the MMIO memory region variable 'mmio' to 'mr_mmio'
so to correctly name align with struct AMDVIState::variable type.
No functional change intended.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
hw/i386/acpi-
Hi Michael,
On 9/11/2024 1:44 AM, Michael S. Tsirkin wrote:
> On Wed, Sep 04, 2024 at 05:02:52AM -0500, Santosh Shukla wrote:
>> Series adds following feature support for emulated amd vIOMMU
>> 1) Pass Through(PT) mode
>> 2) Interrupt Remapping(IR) mode
>>
>> 1)
Series adds following feature support for emulated amd vIOMMU
1) Pass Through(PT) mode
2) Interrupt Remapping(IR) mode
1) PT mode
Introducing the shared 'nodma' memory region that can be aliased
by all the devices in the PT mode. Shared memory with aliasing
approach will help run VM faster when lo
From: Suravee Suthikulpanit
The XTSup mode enables x2APIC support for AMD IOMMU, which is needed
to support vcpu w/ APIC ID > 255.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
hw/i386/amd_iommu.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a
From: Suravee Suthikulpanit
Use shared memory region for interrupt remapping which can be
aliased by all devices.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
hw/i386/amd_iommu.c | 22 ++
hw/i386/amd_iommu.h | 1 +
2 files changed, 15 insertions
From: Suravee Suthikulpanit
Rename the MMIO memory region variable 'mmio' to 'mr_mmio'
so to correctly name align with struct AMDVIState::variable type.
No functional change intended.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
hw/i386/acpi-
update
the shadowed interrupt remapping table in the host IOMMU.
Therefore, send notification when guet IOMMU emulates the IRT invalidation
commands.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
hw/i386/amd_iommu.c | 12
1 file changed, 12 insertions
From: Suravee Suthikulpanit
Introduce 'nodma' shared memory region to support PT mode
so that for each device, we only create an alias to shared memory
region when DMA-remapping is disabled.
Signed-off-by: Suravee Suthikulpanit
Signed-off-by: Santosh Shukla
---
hw/i386/amd_io
On 11/9/2023 8:12 PM, Bui Quang Minh wrote:
> On 11/9/23 21:32, Joao Martins wrote:
>> On 09/11/2023 14:10, Bui Quang Minh wrote:
>>> On 11/9/23 17:11, Santosh Shukla wrote:
>>>> On 10/24/2023 8:51 PM, Bui Quang Minh wrote:
>>>>> Hi everyone,
>
can be an improvement in the future.
>
> FAIL: nmi-after-sti
> FAIL: multiple nmi
>
> These errors are in the way we handle CPU_INTERRUPT_NMI in core TCG.
>
> FAIL: TMCCT should stay at zero
>
> This error is related to APIC timer which should be addressed in separate
> patch.
>
> Version 9 changes,
Hi Bui,
I have tested v9 on EPYC-Genoa system with kvm acceleration mode on, I could
see > 255 vCPU for Linux and Windows Guest.
Tested-by: Santosh Shukla
Thanks,
Santosh
On Thu, Jul 2, 2015 at 12:37 AM, Vlad Yasevich wrote:
> On 07/01/2015 02:50 PM, Santosh R wrote:
> > Since the vxlan UDP header checksum is 0, udp_tunnel_gro_complete (called
> > via vxlan_gro_complete) is setting SKB_GSO_UDP_TUNNEL in
> > skb_shinfo(skb)->gso_type.
>
not change any device features
# ethtool -k tap0 | grep -i tnl
tx-udp_tnl-segmentation: off [fixed]
On Tue, Jun 30, 2015 at 12:24 PM, Santosh R wrote:
>
> On Mon, Jun 29, 2015 at 9:24 PM, Santosh R wrote:
>
>>
>> On Mon, Jun 29, 2015 at 9:04 PM, Vlad Yasevich
>> wrote:
On Mon, Jun 29, 2015 at 9:24 PM, Santosh R wrote:
>
> On Mon, Jun 29, 2015 at 9:04 PM, Vlad Yasevich
> wrote:
>
>> On 06/29/2015 01:46 AM, Santosh R wrote:
>> > All,
>> >
>> >I am testing VxLAN performance in VM. For this I am using below
&g
On Mon, Jun 29, 2015 at 9:04 PM, Vlad Yasevich wrote:
> On 06/29/2015 01:46 AM, Santosh R wrote:
> > All,
> >
> >I am testing VxLAN performance in VM. For this I am using below
> command
> > to bring up the VM.
> > # qemu-system-x86_64 -m 4096 -smp 4 -boot
ixed]
rx-fcs: off [fixed]
rx-all: off [fixed]
tx-vlan-stag-hw-insert: on
rx-vlan-stag-hw-parse: off [fixed]
rx-vlan-stag-filter: off [fixed]
l2-fwd-offload: off [fixed]
busy-poll: off [fixed]
Thanks
-Santosh
On Wed, Jun 11, 2014 at 3:24 PM, Michael S. Tsirkin wrote:
> On Wed, Jun 11, 2014 at 03:05:07PM +0530, Santosh Shukla wrote:
> >
> >
> >
> > On Wed, Jun 11, 2014 at 1:38 PM, Michael S. Tsirkin
> wrote:
> >
> > On Wed, Jun 11, 2014 at 12:43:03PM +053
On Wed, Jun 11, 2014 at 1:38 PM, Michael S. Tsirkin wrote:
> On Wed, Jun 11, 2014 at 12:43:03PM +0530, Santosh Shukla wrote:
> > Hi Igor,
> >
> > I tried building your repository and got build break on ssdt-mem.hex,
> have you
> > face this problem or Its just m
Hi Igor,
I tried building your repository and got build break on ssdt-mem.hex, have
you face this problem or Its just me (:-
No rule to make target `hw/i386/ssdt-mem.hex', needed by
`hw/i386/acpi-build.o'. Stop
using this rule to qemu config: ../configure --enable-kvm --enable-debug
--target-l
Hi folks,
I like to know that - can qemu able to emulate pci e1000 card for arm
processor? I see that qemu support emulated model for pci-nic card, so Is
it possible one enable them in qemu source (or minimal port) for other
architecture like arm? did anyone tried similar exercise in past?
apprec
Hello,
Will QEMU arm target support Cortex-M4 FPU, ARMv7-M Floating-Point
Extension FPv4?
I don't see cortex-m4 in the cpu list. Is there any plan to support it?
Thanks,
Santosh
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