s
> starting with version 6 of the interface.
>
> Signed-off-by: Michael Tokarev
Reviewed-by: Samuel Thibault
Thanks!
> ---
> v2: update other callbacks too, use version 6 of the interface
> v3: commit the changes before sending (*_sock => *_socket)
> v4: version is 4.9
; 4.9.0, but is not available with 4.8.0 yet?
Yes. None of these are defined in 4.8.0
> ... so you might need to split
> the #if into two parts, one for 4.8.0 and one for 4.9.0 ?
This is just defining what is in 4.9.0 but never before, so it should be
fine with just a ≥ 4.9.0 sec
Michael Tokarev, le jeu. 30 janv. 2025 13:12:39 +0300, a ecrit:
> 30.01.2025 13:09, Thomas Huth wrote:
> > On 30/01/2025 03.13, Samuel Thibault wrote:
> > > Hello,
> > >
> > > Samuel Thibault, le jeu. 10 oct. 2024 01:06:47 +0200, a ecrit:
> > > >
Hello,
Samuel Thibault, le jeu. 10 oct. 2024 01:06:47 +0200, a ecrit:
> Michael Tokarev, le sam. 05 oct. 2024 10:07:53 +0300, a ecrit:
> > libslirp introduced new typedef after 4.8.0, slirp_os_socket, which
> > is defined to SOCKET on windows, which, in turn, is a 64bit number.
&g
Philippe Mathieu-Daudé writes:
> When instanciating the machine model, the machine_init()
> implementations usually create the CPUs, so have access
> to its first CPU. Use that rather then the &first_cpu
> global.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Samuel Tardieu
Hello,
Michael Tokarev, le sam. 05 oct. 2024 10:07:53 +0300, a ecrit:
> libslirp introduced new typedef after 4.8.0, slirp_os_socket, which
> is defined to SOCKET on windows, which, in turn, is a 64bit number.
> qemu uses int, so callback function prorotypes changed.
I have fixed the code in upst
ners file: from now on,
> Samuel Tardieu who is behind the project will be taking up the role of
> maintainer.
>
> This commit updates maintainers and the list of files, and places the
> two devices in alphabetical order.
>
> Signed-off-by: Inès Varhol
Signed-off-by: Samuel Tardieu
0x8000.
Signed-off-by: Samuel Holland
---
hw/riscv/boot.c| 11 ++-
hw/riscv/microchip_pfsoc.c | 2 +-
hw/riscv/opentitan.c | 3 ++-
hw/riscv/shakti_c.c| 13 ++---
hw/riscv/sifive_u.c| 4 ++--
hw/riscv/spike.c | 5 +++--
hw/riscv
Samuel Thibault, le dim. 28 avril 2024 19:23:03 +0200, a ecrit:
> Thomas Weißschuh, le jeu. 22 févr. 2024 11:44:13 +0100, a ecrit:
> > On Tue, Mar 22, 2022 at 06:58:36PM -0700, Nicholas Ngai wrote:
> > > Pinging this. It’s a bit old, though the patch still applies cleanly to
>
The following changes since commit 03555199b63aa1fbce24d16287e141c33f572a24:
net/slirp: Use newer slirp_*_hostxfwd API (2024-04-29 02:04:58 +0200)
are available in the Git repository at:
https://people.debian.org/~sthibault/qemu.git tags/samuel-thibault
for you to fetch changes up to
From: Nicholas Ngai
libslirp provides a newer slirp_*_hostxfwd API meant for
address-agnostic forwarding instead of the is_udp parameter which is
limited to just TCP/UDP.
This paves the way for IPv6 and Unix socket support.
Signed-off-by: Nicholas Ngai
Signed-off-by: Samuel Thibault
Tested
ION(4,5,0)
(the hostxfwd interface was added in 4.5.0, not 4.6.0 ; the unix socket
part was added in 4.7.0)
Samuel
Felipe Balbi writes:
> +qdev_prop_set_uint8(armv7m, "num-prio-bits", 4);
Hi Felipe.
This should be 2, not 4. From RM0454 section 11.1 on page 250: "4 programmable
priority levels (2 bits of interrupt priority are used)".
Sam
--
Samuel Tardieu
t; > are encountering errors.
>
> Looking at the code:
>
> https://gitlab.com/qemu-project/qemu/-/blob/v8.2.0/net/slirp.c#L824
>
> it seems like QEMU is only using inet_aton() here, which means IPv4 only,
> sorry, but this likely needs some additional changes first to support IPv6
> addresses here.
Nicholas Ngai's work is still pending integration:
https://lists.gnu.org/archive/html/qemu-devel/2022-03/msg05643.html
https://gitlab.com/qemu-project/qemu/-/issues/347
Samuel
jump.c:11:3: warning: ‘foo’ may be used uninitialized
[-Wmaybe-uninitialized]
11 | free(foo);
| ^
jump.c:8:9: note: ‘foo’ was declared here
8 | char *foo = malloc(30);
| ^~~
Best.
Sam
--
Samuel Tardieu
stay in their original positions. I even opened
an issue on b4 a few weeks ago because of this
<https://github.com/mricon/b4/issues/16>, and I reverted to using
git-publish. But if this is ok to use an arbitrary order for
non-S-o-b headers, I can get back to b4.
Sam
--
Samuel Tardieu
un :)
When there is something suspicious, it's useful to fix it.
> In the long term the Hurd is going to implement copy_file_range
Yes and by just fixing the prototype, we'll keep qemu able to
automatically use it when it becomes available.
Really, please, no tinkering, rather fix bugs.
Samuel
ed int, unsigned int)'}
> 1142 | ssize_t copy_file_range (int __infd, __off64_t *__pinoff,
> | ^~~
>
> the current patch fixes this compilation error.
Yes, but by ignoring the difference :)
The prototype of copy_file_range in glibc really does say that it
returns an ssize_t, not an off_t, so that should be fixed so.
Samuel
; qemu on the Hurd.
But how do things work without the qemu stub?
Or put another way: what problem exactly the presence of the qemu stub
makes?
Samuel
> On Wed, Jan 17, 2024 at 2:56 PM Philippe Mathieu-Daudé
> wrote:
> >
> > Hi Manolo,
> >
> > On 17/1/24 13:31, Man
Arnaud Minier writes:
+ * The procedure is taken from a program by Samuel Tardieu.
You may drop this line as I used the same procedure which is used
in other tests, this does not deserve a mention here.
Sam
--
Samuel Tardieu
Signed-off-by: Samuel Tardieu
Fixes: ff68dacbc786 ("armv7m: Split systick out from NVIC")
---
hw/timer/trace-events | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/timer/trace-events b/hw/timer/trace-events
index 3eccef83858..8145e18e3da 100644
--- a/hw/timer/tr
Samuel Tardieu writes:
The shix machine was a research project started around 2003 at
Télécom Paris. Preliminary support in QEMU was added in 2005
back when the QEMU architecture was less structured than it is
now. Unfortunately, the support for the shix machine and its
peripherals, such as
The 16MiB flash device is only used by the deprecated shix machine.
Its code it old and unmaintained, and has never been adapted to the
QOM architecture. It still contains debug statements and uses global
variables. It is time to deprecate it.
Signed-off-by: Samuel Tardieu
Reviewed-by: Cédric Le
The shix machine has been designed and used at Télécom Paris from 2003
to 2010. It had been added to QEMU in 2005 and has not been maintained
since. Since nobody is using the physical board anymore nor interested
in maintaining the QEMU port, it is time to deprecate it.
Signed-off-by: Samuel
QOM model and still
contains debug fprintf statements.
Samuel Tardieu (2):
target/sh4: Deprecate the shix machine
hw/block: Deprecate the TC58128 block device
docs/about/deprecated.rst | 5 +
hw/block/tc58128.c| 1 +
hw/sh4/shix.c | 1 +
3 files changed, 7 insertions
ned"?
You're right. I removed the extra part in both the shix and the
tc58128 deprecation messages.
Sam
--
Samuel Tardieu
The 16MiB flash device is only used by the deprecated shix machine.
Its code it old and unmaintained, and has never been adapted to the
QOM architecture. It still contains debug statements and uses global
variables. It is time to deprecate it.
Signed-off-by: Samuel Tardieu
---
docs/about
The shix machine has been designed and used at Télécom Paris from 2003
to 2010. It had been added to QEMU in 2005 and has not been maintained
since. Since nobody is using the physical board anymore nor interested
in maintaining the QEMU port, it is time to deprecate it.
Signed-off-by: Samuel
QOM model and still
contains debug fprintf statements.
Samuel Tardieu (2):
target/sh4: Deprecate the shix machine
hw/block: Deprecate the TC58128 block device
docs/about/deprecated.rst | 5 +
hw/block/tc58128.c| 1 +
hw/sh4/shix.c | 1 +
3 files changed, 7 insertions
A SoC will not have a direct access to the NVIC embedded in its ARM
core. By aliasing the "num-prio-bits" property similarly to what is
done for the "num-irq" one, a SoC can easily configure it on its
armv7m instance.
Signed-off-by: Samuel Tardieu
Reviewed-by: Peter Maydell
e). Unless a SOC
specifies the number of bits to use, the previous behavior is
maintained for backward compatibility.
Signed-off-by: Samuel Tardieu
Suggested-by: Anton Kochkov
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1122
Reviewed-by: Peter Maydell
---
hw/intc/armv7m_n
the Based-on: trailer
in the cover letter.
- Fix a typo in one of the commit messages ("compatibility")
Based-on: <20240106163905.42027-1-ines.var...@telecom-paris.fr>
([PATCH v5 0/2] Add minimal support for the B-L475E-IOT01A board)
Samuel Tardieu (3):
hw/intc/armv7m_nvic: ad
Update the number of priority bits for a number of existing
SoCs according to their technical documentation:
- STM32F100/F205/F405/L4x5: 4 bits
- Stellaris (Sandstorm/Fury): 3 bits
Signed-off-by: Samuel Tardieu
Reviewed-by: Peter Maydell
---
hw/arm/stellaris.c | 2 ++
hw/arm
An apparent copy-paste error tests for the presence of the
virtio-rng-ccw device in order to perform tests on the virtio-scsi-ccw
device.
Signed-off-by: Samuel Tardieu
---
tests/qtest/virtio-ccw-test.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qtest/virtio-ccw
ange after Inès has submitted an updated version of
her "Add minimal support for the B-L475E-IOT01A board" serie on
which this one is based.
Best.
Sam
--
Samuel Tardieu
On 04/01/2024 14:40, Philippe Mathieu-Daudé wrote:
On 4/1/24 14:23, Samuel Tardieu wrote:
Philippe Mathieu-Daudé writes:
This doesn't build:
../../hw/misc/stm32l4x5_exti.c:172:9: error: expected expression
const uint32_t set1 = value & ~DIRECT_LINE_MASK1;
[…]
I could bu
mpiler or option do you use for
checking? I have no problem building this using "./configure
--target-list=arm-softmmu" with GCC 12.3.0.
Sam
--
Samuel Tardieu
Télécom Paris - Institut Polytechnique de Paris
If "busses" might be encountered as a plural of "bus" (5 instances),
the correct spelling is "buses" (26 instances). Fixing those 5
instances makes the doc more consistent.
Signed-off-by: Samuel Tardieu
---
docs/system/arm/palm.rst| 2 +-
docs/system/arm/x
guest-exec invocation does not need the full path of the executable to
execute. Using only the command names ensures correct execution of the
test on systems not adhering to the FHS.
Signed-off-by: Samuel Tardieu
---
tests/unit/test-qga.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions
e). Unless a SOC
specifies the number of bits to use, the previous behavior is
maintained for backward compatibility.
Signed-off-by: Samuel Tardieu
Suggested-by: Anton Kochkov
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1122
---
hw/intc/armv7m_nvic.c | 23 +
A SoC will not have a direct access to the NVIC embedded in its ARM
core. By aliasing the "num-prio-bits" property similarly to what is
done for the "num-irq" one, a SoC can easily configure it on its
armv7m instance.
Signed-off-by: Samuel Tardieu
---
hw/arm/armv7m.c | 2 +
Update the number of priority bits for a number of existing
SoCs according to their technical documentation:
- STM32F100/F205/F405/L4x5: 4 bits
- Stellaris (Sandstorm/Fury): 3 bits
Signed-off-by: Samuel Tardieu
---
hw/arm/stellaris.c | 2 ++
hw/arm/stm32f100_soc.c | 1 +
hw/arm
("compatibility")
Based-on: <20231221213838.54944-1-ines.var...@telecom-paris.fr>
([PATCH v4 0/2] Add minimal support for the B-L475E-IOT01A board)
Samuel Tardieu (3):
hw/intc/armv7m_nvic: add "num-prio-bits" property
hw/arm/armv7m: alias the NVIC "num-prio-bits&quo
stall directory:
/data/dictionary.txt
This works correctly on my NixOS system using a non-FHS layout and
properly locates the codespell file.
This patch made me find a typo in one of my commit messages.
Tested-by: Samuel Tardieu
Sam
--
Samuel Tardieu
Télécom Paris - Institut Polytechnique de Paris
ain "env", such as
"/usr/bin/env application" works. This is the case for example on
NixOS, which is more and more used in research environments for
their easily reproducible build environments.
Sam
--
Samuel Tardieu
Télécom Paris - Institut Polytechnique de Paris
the
"Based-on:" tag so that patchew gets it right?
Anyway, I just wanted to say that this patchset is on my
todo list to review but I'm not going to be able to get to
it before I break for Christmas, so I'll get back to it
in January. Thanks for the contribution!
Noted!
Best.
Sam
--
Samuel Tardieu
By calling `error_setg_errno()` before jumping to the cleanup-on-error
path at the `fail` label, the cleanup path is clearer.
Signed-off-by: Samuel Tardieu
---
tcg/region.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tcg/region.c b/tcg/region.c
index 467e51cf6f
preserves the fall-through
case while avoiding testing an always false condition.
Changes from v1:
- Add a comment explaining that `buf_rx` does not require cleanup
- Use a unique cleanup path for the function by setting `errno` before
jumping to the cleanup block.
Samuel Tardieu (2):
tcg: Remove
The `fail_rx`/`fail` block is only entered while `buf_rx` is equal to
its initial value `MAP_FAILED`. The `munmap(buf_rx, size);` was never
executed.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2030
Signed-off-by: Samuel Tardieu
Reviewed-by: Peter Maydell
---
tcg/region.c | 4
r jump to `fail`
- calling `error_setg_errno()` at the right place before jumping
to `fail`
I will produce a v2 to make this proposal clearer.
Sam
--
Samuel Tardieu
Samuel Tardieu (3):
hw/intc/armv7m_nvic: add "num-prio-bits" property
hw/arm/armv7m: alias the NVIC "num-prio-bits" property
hw/arm/socs: configure priority bits for existing SOCs
Any idea to why patchew fails to apply thoses patches? The mbox at
<h
Update the number of priority bits for a number of existing
SOCsaccording to their technical documentation:
- STM32F100/F205/F405: 4 bits
- Stellaris (Sandstorm/Fury): 3 bits
Signed-off-by: Samuel Tardieu
---
hw/arm/stellaris.c | 2 ++
hw/arm/stm32f100_soc.c | 1 +
hw/arm/stm32f205_soc.c
to preserve
backward compatibility.
Based-on: <20220813112559.1974427-1-anton.koch...@proton.me>
([PATCH] hw/arm/nvic: implement "num-prio-bits" property)
Samuel Tardieu (3):
hw/intc/armv7m_nvic: add "num-prio-bits" property
hw/arm/armv7m: alias the NVIC "num-pr
e). Unless a SOC
specifies the number of bits to use, the previous behavior is
maintained for backward compatibiltiy.
Signed-off-by: Samuel Tardieu
Suggested-by: Anton Kochkov
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1122
---
hw/intc/armv7m_nvic.c | 23 +
Signed-off-by: Samuel Tardieu
---
hw/arm/armv7m.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index d10abb36a8..4fda2d1d47 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -256,6 +256,8 @@ static void armv7m_instance_init(Object *obj
`buf_rw` is always `NULL` when jumping to the `fail` label. Move the
label `down` after the `if (buf_rw) { ... }` statement.
Signed-off-by: Samuel Tardieu
---
tcg/region.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/region.c b/tcg/region.c
index 6d657e8c33
The `fail_rx`/`fail` block is only entered while `buf_rx` is equal to
its initial value `MAP_FAILED`. The `munmap(buf_rx, size);` was never
executed.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2030
Signed-off-by: Samuel Tardieu
---
tcg/region.c | 3 ---
1 file changed, 3 deletions
preserves the fall-through
case while avoiding testing an always false condition.
Samuel Tardieu (2):
tcg: Remove unreachable code
tcg: Jump after always false condition
tcg/region.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
--
2.42.0
Signed-off-by: Samuel Tardieu
---
docs/tools/qemu-img.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/tools/qemu-img.rst b/docs/tools/qemu-img.rst
index 4459c065f1..3653adb963 100644
--- a/docs/tools/qemu-img.rst
+++ b/docs/tools/qemu-img.rst
@@ -406,7 +406,7
uld be the same as
today without the patch.
Other problem is the __tune_i386__ is also set when -mtune=i386
(but with -march=i686).
Indeed, this is the case for GCC (not clang).
Sam
--
Samuel Tardieu
Télécom Paris - Institut Polytechnique de Paris
h GCC and LLVM when using -march=i386.
Sam
--
Samuel Tardieu
Télécom Paris - Institut Polytechnique de Paris
This file is the only one involved in the compilation process which
still uses the /bin/bash path.
Signed-off-by: Samuel Tardieu
---
target/hexagon/idef-parser/prepare | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hexagon/idef-parser/prepare
b/target/hexagon/idef
CVE-2020-24165 was assigned to this:
https://nvd.nist.gov/vuln/detail/CVE-2020-24165
I had no involvement in the assignment, posting here for reference only.
** CVE added: https://cve.mitre.org/cgi-bin/cvename.cgi?name=2020-24165
--
You received this bug notification because you are a member of
Henrik Carlqvist, le jeu. 03 août 2023 01:26:02 +0200, a ecrit:
> On Thu, 3 Aug 2023 01:13:24 +0200
> Samuel Thibault wrote:
>
> > Henrik Carlqvist, le jeu. 03 août 2023 01:09:09 +0200, a ecrit:
> > > On Wed, 2 Aug 2023 21:53:56 +0200
> > > Samuel Thiba
Henrik Carlqvist, le jeu. 03 août 2023 01:09:09 +0200, a ecrit:
> On Wed, 2 Aug 2023 21:53:56 +0200
> Samuel Thibault wrote:
>
> > Henrik Carlqvist, le mar. 01 août 2023 23:27:25 +0200, a ecrit:
> > > @@ -950,10 +953,11 @@ static int slirp_smb(SlirpState* s, const
x shares = 0\n"
> -"[qemu]\n"
> -"path=%s\n"
> "read only=no\n"
> "guest ok=yes\n"
> + "%s"
> + "[qemu]\n"
> +"path=%s\n"
?This is moving read only and guest ok to the global section?
Samuel
et_recv(Slirp *slirp, struct in_addr guest_addr, int guest_port,
const uint8_t *buf, int size);
Samuel
x27;s address 2 within the prefix, i.e. fec0::2 with the
default fec0::/64 network.
Samuel
Thanks to everyone.
Ok , so I need to run QEMU in Full System Emulation mode to run the
Solaris binary.
Is the *qemu-kvm* , the only package required to be installed ( on RHEL
machine) to launch QEMU or there are some packages also.
Also I would need the Solars OS image, right?
Regards,
Ginu
Hi,
I have a requirement to run a Solaris binary ( 32 bit ) on linux (64
bit).
Since some of the sources for the binary are not available, recompilation
on linux is not possible.
So we are trying to run on linux using QEMU
the uname output on solaris box is -
#uname -sip
SunOS sparc sun4v
t
Users have reported not to understand the documentation. This completes
it to give an explicit example how one is supposed to set up a virtual
braille USB device.
Signed-off-by: Samuel Thibault
---
docs/system/devices/usb.rst | 16 ++--
1 file changed, 14 insertions(+), 2 deletions
The following changes since commit 3e01455edd5fce06c14e2926b6ef408d9a94c9fb:
usb-braille: Better explain that one also has to create a chardev backend
(2022-09-06 00:09:50 +0200)
are available in the Git repository at:
https://people.debian.org/~sthibault/qemu.git tags/samuel-thibault
for
Peter Delevoryas, le jeu. 25 août 2022 16:15:26 -0700, a ecrit:
> On Fri, Aug 26, 2022 at 12:56:10AM +0200, Samuel Thibault wrote:
> > Peter Delevoryas, le jeu. 25 août 2022 15:38:53 -0700, a ecrit:
> > > It seems like there's support for an IPv6 dns proxy, and the
0; /* option-len high byte */
*resp++ = 16; /* option-len low byte */
memcpy(resp, &slirp->vnameserver_addr6, 16);
resp += 16;
}
Samuel
n up the related tests and finally remove the submodule now.
Acked-by: Samuel Thibault
Thanks!
> v2:
> - Added patches to clean up and adapt the tests
> - Rebased the removal patch to the latest version of the master branch
>
> Thomas Huth (6):
> tests/docker: Update the d
t; oob_eth_addr.a,
> + errp);
>
> while (slirp_configs) {
> config = slirp_configs;
> diff --git a/qapi/net.json b/qapi/net.json
> index efc5cb3fb6..7b2c3c205c 100644
> --- a/qapi/net.json
> +++ b/qapi/net.json
> @@ -169,6 +169,8 @@
>
Peter Delevoryas, le mer. 15 juin 2022 18:05:25 -0700, a ecrit:
> This lets you set the manufacturer's ID for a slirp netdev, which can be
> queried from the guest through the Get Version ID NC-SI command. For
> example, by setting the manufacturer's ID to 0x8119:
>
> wget
> https://github.co
Hello,
Peter Delevoryas, le mer. 15 juin 2022 18:05:24 -0700, a ecrit:
> I think we probably need a new Slirp release
> (4.8.0) and a switch statement here instead, right?
>
> So that we can preserve the behavior for 4.7.0?
Yes, that's the idea.
Samuel
ort the new API so that CFI can be made compatible with using a system
> libslirp.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Samuel Thibault
> ---
> net/slirp.c | 41 -
> 1 file changed, 40 insertions(+), 1 deletion(-)
>
>
Paolo Bonzini, le mar. 12 avril 2022 14:13:35 +0200, a ecrit:
> Replace slirp_init with slirp_new, so that a more recent cfg.version
> can be specified.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Samuel Thibault
> ---
> net/slirp.c | 27 +--
>
tem libslirp.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Samuel Thibault
> ---
> meson.build | 24
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/meson.build b/meson.build
> index 861de93c4f..92a83580a3 100644
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Samuel Thibault
> ---
> net/slirp.c | 19 ++-
> 1 file changed, 14 insertions(+), 5 deletions(-)
>
> diff --git a/net/slirp.c b/net/slirp.c
> index bc5e9e4f77..f1e25d741f 100644
> --- a/net/slirp.c
> +++ b/n
Note: fdt is *not* changed accordingly since this affects the targets
> that we can build, so disabling fdt automatically here might have
> unexpected side-effects for the users.
>
> Signed-off-by: Thomas Huth
Acked-by: Samuel Thibault
> ---
> I thought I sent out that patch a
if not primary
> core". I think this is because the BROM is mapped at the reset vector, so
> upon SMP firmware releasing the reset line it always starts in ROM, then
> gets diverted to the actual entry point.
Yes, I believe this is an accurate explanation.
> Maybe Samuel can con
Ping?
Samuel Thibault, le mar. 24 août 2021 12:43:44 +0200, a ecrit:
> The LBA28 capacity (at offsets 60/61 of identification) is supposed to
> express the maximum size supported by LBA28 commands. If the device is
> larger than this, we have to cap it to 2^28-1.
>
> At least Ne
*_hostxfwd API meant for
> > address-agnostic forwarding instead of the is_udp parameter which is
> > limited to just TCP/UDP.
> >
> > Signed-off-by: Nicholas Ngai
Reviewed-by: Samuel Thibault
> > ---
> > net/slirp.c | 64 +
Ping?
Samuel Thibault, le mar. 24 août 2021 12:43:44 +0200, a ecrit:
> The LBA28 capacity (at offsets 60/61 of identification) is supposed to
> express the maximum size supported by LBA28 commands. If the device is
> larger than this, we have to cap it to 2^28-1.
>
> At least Ne
, using LBA28 for sectors that don't need
LBA48. This commit thus fixes NetBSD access to disks larger than 128GiB.
Signed-off-by: Samuel Thibault
---
hw/ide/core.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/hw/ide/core.c b/hw/ide/core.c
index fd69ca3167..e28f8
Hello,
Alexander Bulekov, le lun. 03 mai 2021 16:09:33 -0400, a ecrit:
> Forwarding this along to the list, so it doesn't get burried during the
> gitlab issue migration.
Thanks!
Pushed a proposed fix on
https://gitlab.freedesktop.org/slirp/libslirp/-/merge_requests
(zero, 0, sizeof(zero));
> + memset(zero, 0, baum->x * baum->y);
>
>
> eh, I would have left the sizeof(zero)..
I was wondering too, but below this it's clear that only
baum->x * baum->y is getting used.
Samuel
Philippe Mathieu-Daudé, le mer. 05 mai 2021 23:10:28 +0200, a ecrit:
> Use autofree heap allocation instead of variable-length
> array on the stack.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Samuel Thibault
> ---
> chardev/baum.c | 3 ++-
> 1 file change
maximum 'x * y'.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Samuel Thibault
> ---
> chardev/baum.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/chardev/baum.c b/chardev/baum.c
> index adc3d7b3b56..0822e9ed5f
Philippe Mathieu-Daudé, le mer. 05 mai 2021 23:10:26 +0200, a ecrit:
> Replace '84' magic value by the X_MAX definition, and '1' by Y_MAX.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Samuel Thibault
> ---
> chardev/baum.c | 11 +++
&g
Laurent Vivier, le ven. 30 avril 2021 18:48:29 +0200, a ecrit:
> CC: +Samuel
I don't know the smb code at all.
> Le 23/02/2021 à 03:41, Niklas Hambüchen a écrit :
> > As the added commend and `man smb.conf` explain, starting
> > with that samba version, `force user` mu
Gerd Hoffmann, le jeu. 11 mars 2021 12:37:38 +0100, a ecrit:
> Which would also drop support for serial braille devices. Not sure
> how much of a problem that would be these days.
It is an important concern: we also need to be able to test braille
devices connected through serial.
Samuel
Peter Maydell, le mer. 10 mars 2021 17:18:11 +, a ecrit:
> On Wed, 10 Mar 2021 at 16:08, Samuel Thibault
> wrote:
> >
> > When Braille output is not available, the backend properly reports being
> > unable to be created, but 5f8e93c3e262 ("util/qemu-timer
calling it on baum->cellCount_timer.
Signed-off-by: Samuel Thibault
---
chardev/baum.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/chardev/baum.c b/chardev/baum.c
index 5deca778bc..aca5bf12fb 100644
--- a/chardev/baum.c
+++ b/chardev/baum.c
@@ -631,7 +631,9 @
Daniel P. Berrangé, le mer. 10 mars 2021 15:31:48 +, a ecrit:
> On Wed, Mar 10, 2021 at 04:26:46PM +0100, Paolo Bonzini wrote:
> > On 10/03/21 16:02, Samuel Thibault wrote:
> > > > > When trying to remove the -usbdevice option, there were complaints
> > &g
m. Put another
way, it does not even make sense to build anything different from what
you wrote: using another chardev backend with usb-braille frontend
doesn't make sense, and exposing the braille chardev backend on another
usb frontend doesn't make sense either.
> If users need more time, we can extend the grace period.
They don't need time, they need things that are simple to use. That
three-option black magic really isn't.
Samuel
Allows slirp smb feature to be disabled manually as well.
> > >
> > > Signed-off-by: Joelle van Dyne
> > > ---
> > > configure | 26 +++---
> > > meson.build | 2 +-
> > > net/slirp.c | 16
> > > 3 f
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