On Wed, Sep 28, 2016 at 12:42:41PM +0200, Edgar E. Iglesias wrote:
> I've applied these except patch #7 "ignore prefix insns in
> singlestep". Patch #8 had an issue with checkpatch that I fixed up.
Oops, thank you.
On Tue, Sep 13, 2016 at 12:59:51AM +0200, Edgar E. Iglesias wrote:
> On Mon, Sep 05, 2016 at 01:54:09PM +0200, Rabin Vincent wrote:
> > @@ -3363,14 +3371,16 @@ void cris_cpu_dump_state(CPUState *cs, FILE *f,
> > fprintf_function cpu_fprintf,
> >
On Tue, Sep 13, 2016 at 12:18:00AM +0200, Edgar E. Iglesias wrote:
> On Mon, Sep 05, 2016 at 01:54:11PM +0200, Rabin Vincent wrote:
> > diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c
> > index a3da425..33d86eb 100644
> > --- a/target-cris/translate_v
From: Rabin Vincent
The CRIS tests expect that functions marked inline are always inline.
With newer versions of GCC, building them results warnings like the
following and spurious failures when they are run.
In file included from tests/tcg/cris/check_moveq.c:5:0:
tests/tcg/cris/crisutils.h:66
On Tue, Sep 06, 2016 at 11:53:46PM +0200, Edgar E. Iglesias wrote:
> On Mon, Sep 05, 2016 at 01:54:04PM +0200, Rabin Vincent wrote:
> > From: Rabin Vincent
> >
> > The CRIS tests expect that functions marked inline are always inline.
> > With newer versions of GCC, bui
From: Rabin Vincent
Add the appropriate register constraints for the inline asm for the
write and exit system calls. Without the correct constraints for the
write() function, correct failure messages are not printed succesfully
on newer version of GCC.
Signed-off-by: Rabin Vincent
---
v2
From: Rabin Vincent
This test, borrowed from the GDB simulator test suite, checks that every
syscall increments the time returned by gettimeofday() by exactly 1 ms.
This is not guaranteed or even desirable on QEMU so remove this test.
Signed-off-by: Rabin Vincent
---
tests/tcg/cris/Makefile
From: "Edgar E. Iglesias"
Icount may choose to abort and recompile a TB at any load/store. We
need to sync the CC state at these insns.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Rabin Vincent
---
target-cris/translate.c | 9 +
target-cris/translate_v10.c | 3 ++
From: Rabin Vincent
Add a test for the newly implemented ADDC instruction in the v17 CRIS
CPU.
Signed-off-by: Rabin Vincent
---
tests/tcg/cris/Makefile| 19 ++--
tests/tcg/cris/check_addcv17.s | 65 ++
2 files changed, 82 insertions
From: Hans-Peter Nilsson
Use the correct register names for v10 and don't dump support function
registers for pre-v32.
Signed-off-by: Hans-Peter Nilsson
Signed-off-by: Rabin Vincent
---
target-cris/translate.c | 36 +++-
1 file changed, 23 insertions(+
From: Rabin Vincent
Add the clobbered registeres to the inline asm for the write and exit
system calls. Without the correct clobbers for the write() function,
correct failure messages are not printed succesfully on newer version of
GCC.
Signed-off-by: Rabin Vincent
---
tests/tcg/cris/sys.c
8 $pc=1ad4
Signed-off-by: Hans-Peter Nilsson
Signed-off-by: Rabin Vincent
---
target-cris/translate.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-cris/translate.c b/target-cris/translate.c
index a4512b5..c9b1e65 100644
--- a/target-cris/translate.c
+++ b/target
From: Rabin Vincent
In the CRIS v17 CPU an ADDC (add with carry) instruction has been added
compared to the v10 instruction set.
Assembler syntax:
ADDC [Rs],Rd
ADDC [Rs+],Rd
Size: Dword
Description:
The source data is added together with the carry flag to the
destination register
From: Rabin Vincent
This test, borrowed from the GDB simulator test suite, is meant to test
the GDB simulator's --sysroot feature and always fails in QEMU. Remove
it. openpf3 tests the same sequence of system calls (without assuming
the precence of --sysroot).
Signed-off-by: Rabin Vi
From: Rabin Vincent
The CRIS tests expect that functions marked inline are always inline.
With newer versions of GCC, building them results warnings like the
following and spurious failures when they are run.
In file included from tests/tcg/cris/check_moveq.c:5:0:
tests/tcg/cris/crisutils.h:66
(to: Kevin and cc: qemu-block)
On Fri, Nov 13, 2015 at 02:17:28PM +0100, Ricard Wanderlöf wrote:
>
> For the "main area on file, oob in memory" case, fix the shifts so that
> we erase the correct number of pages.
>
> Signed-off-by: Ricard Wanderlöf
> ---
> hw/block/nand.c |2 +-
> 1 file c
The shifts of the address mask and value shift beyond 32 bits when there
are 5 address cycles.
Signed-off-by: Rabin Vincent
---
hw/block/nand.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/block/nand.c b/hw/block/nand.c
index 61d2cec..a68266f 100644
--- a/hw
On Tue, Dec 23, 2014 at 11:45:00PM +, Peter Maydell wrote:
> On 23 December 2014 at 23:29, Rabin Vincent wrote:
> > +static size_t round4(size_t size)
> > +{
> > +return ((size + 3) / 4) * 4;
> > +}
>
> Is this different from ROUND_UP(size, 4) ?
> I
Enable support for the dump-guest-memory command on ARM and AArch64.
The dumped files can be analyzed with crash or similar tools.
Signed-off-by: Rabin Vincent
---
target-arm/Makefile.objs | 2 +-
target-arm/arch_dump.c | 148 +++
target-arm/cpu
On Wed, Oct 22, 2014 at 11:59:06AM +0200, Gerd Hoffmann wrote:
> syntax error
> ## Error: "catX" not defined
> syntax error
> ## Error: "catX" not defined
> No kernel provides dtb named vexpress-v2p-ca9.dtb
> No value for u_kernel. Getting help.
> [ ... ]
>
> Google finds me this:
>
> https://fe
Add support for the EFM32GG990 MCU and its development board
EFM32GG-DK3750. This is a Cortex-M3 platform supported
by mainline Linux.
Signed-off-by: Rabin Vincent
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/Makefile.objs| 1 +
hw/arm/efm32.c | 71
Add support for the TIMER block on the EFM32GG.
Signed-off-by: Rabin Vincent
---
hw/timer/Makefile.objs | 1 +
hw/timer/efm32-timer.c | 204 +
2 files changed, 205 insertions(+)
create mode 100644 hw/timer/efm32-timer.c
diff --git a/hw/timer
Add support for the UART block on the EFM32GG.
Signed-off-by: Rabin Vincent
---
hw/char/Makefile.objs | 1 +
hw/char/efm32-uart.c | 217 ++
2 files changed, 218 insertions(+)
create mode 100644 hw/char/efm32-uart.c
diff --git a/hw/char
cp15.c0_cpuid is never initialized for ARMv7-M; take the value directly
from cpu->midr instead.
Signed-off-by: Rabin Vincent
---
hw/intc/armv7m_nvic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 6066fa6..f5b0c3b 100
2013/3/25 Andreas Färber
> This still does not address the architectural issue that I brought up.
I guess you mean the CPUArchState stuff? AFAICS Wen Congyang (the
author of the dump code) had some answers/questions for you:
http://lists.gnu.org/archive/html/qemu-devel/2012-07/msg00382.html
htt
2013/3/24 Peter Maydell :
> On 24 March 2013 17:27, Rabin Vincent wrote:
>> /**
>> + * memory_region_get_addr: Get the address of a memory region
>> + *
>> + * @mr: the memory region
>> + */
>> +hwaddr memory_region_get_addr(MemoryRegion *mr);
&g
2013/3/24 Peter Maydell :
> On 24 March 2013 17:27, Rabin Vincent wrote:
>> --- /dev/null
>> +++ b/target-arm/arch_dump.c
>> @@ -0,0 +1,61 @@
>> +#include "cpu.h"
>> +#include "sysemu/dump.h"
>> +#include "elf.h"
>> +
>
Enable support for the dump-guest-memory monitor command for ARM.
Cc: Peter Maydell
Signed-off-by: Rabin Vincent
---
configure|2 +-
target-arm/Makefile.objs |2 +-
target-arm/arch_dump.c | 61 ++
3 files changed, 63
RAMBlock.offset does not provide the physical address of the memory
region. This is available in the MemoryRegion's address. The wrong
usage leads to incorrect physical addreses in the ELF. Fix it.
Signed-off-by: Rabin Vincent
---
dump.c| 19 +++
in
ference to `memory_mapping_list_init'
dump.c:827: undefined reference to `memory_mapping_filter'
Allow memory_mapping-stub.c to instead be used for targets which do not
set CONFIG_HAVE_GET_MEMORY_MAPPING.
Signed-off-by: Rabin Vincent
---
Makefile.target |3 +--
memory_mapping-stub.c |5 -
Make a common helper function out of the x86 code to add ELF notes.
Signed-off-by: Rabin Vincent
---
dump.c | 51
include/sysemu/dump.h |4 +
target-i386/arch_dump.c | 208 +++
3 files changed, 104 insertions
Extract out the ELF note size function from i386 so we can use it from
other targets.
Signed-off-by: Rabin Vincent
---
dump.c | 15 +++
include/sysemu/dump.h |2 ++
target-i386/arch_dump.c | 14 ++
3 files changed, 19 insertions(+), 12
write permissions set. If someone requires
read-only files to be created, they can achieve it by setting umask.
Signed-off-by: Rabin Vincent
---
dump.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/dump.c b/dump.c
index a25f509..8dd86b4 100644
--- a/dump.c
+++ b/dump.c
in dump_write_elf_note()
- Save CPSR in ARM prstatus
- set correct ELF endianness for ARM BE
Rabin Vincent (6):
dump: create writable files
dump: extract out note helper
dump: extract out get note size function
dump: fix up memory mapping dependencies / stub
target-arm: add dump-guest
On Thu, Jun 28, 2012 at 05:46:02PM +0100, Peter Maydell wrote:
> On 20 June 2012 18:28, Rabin Vincent wrote:
> > Add a minimal dump-guest-memory support for ARM. The -p option is not
> > supported and we don't add any QEMU-specific notes.
>
> So what does this patch gi
Extract out the ELF note size function from i386 so we can use it from
other targets.
Signed-off-by: Rabin Vincent
---
dump.c | 15 +++
dump.h |2 ++
target-i386/arch_dump.c | 14 ++
3 files changed, 19 insertions(+), 12
Add a minimal dump-guest-memory support for ARM. The -p option is not
supported and we don't add any QEMU-specific notes.
Signed-off-by: Rabin Vincent
---
configure|4 +--
target-arm/Makefile.objs |2 +-
target-arm/arch_dump.c |
Make a common helper function to add ELF notes.
Signed-off-by: Rabin Vincent
---
dump.c | 49 +++
dump.h |4 +
target-i386/arch_dump.c | 206 +++
3 files changed, 100 insertions(+), 159 deletions
Make dump-guest-memory not create read-only files, so that it can
overwrite a file created by a previous invocation without having it to
be removed externally.
Signed-off-by: Rabin Vincent
---
dump.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/dump.c b/dump.c
index
.
To fix this, allow the enable bits to be enabled per-cpu. For SPIs,
always enable/disable ALL_CPU_MASK.
Cc: Peter Maydell
Signed-off-by: Rabin Vincent
---
hw/arm_gic.c | 35 ---
1 files changed, 20 insertions(+), 15 deletions(-)
diff --git a/hw/arm_gic.c b/hw
On Sun, May 02, 2010 at 03:20:51PM +0530, Rabin Vincent wrote:
> Reload the timer when TimerControl is written, if the timer is to be
> enabled. Otherwise, if an earlier write to TimerLoad was done while
> periodic mode was not set, s->delta may incorrectly still have the value
>
for the first timer tick.
Signed-off-by: Rabin Vincent
---
hw/arm_timer.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/arm_timer.c b/hw/arm_timer.c
index 9fef191..5b6947a 100644
--- a/hw/arm_timer.c
+++ b/hw/arm_timer.c
@@ -113,7 +113,7 @@ static void arm_timer_wr
In oneshot mode, the delta needs to come from the TimerLoad register,
not the maximum limit.
Signed-off-by: Rabin Vincent
---
hw/arm_timer.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/arm_timer.c b/hw/arm_timer.c
index 5b6947a..9073ffc 100644
--- a/hw
Don't set PAGE_EXEC for XN pages, to avoid a bypass of XN protection
checking if the page is already in the TLB.
Signed-off-by: Rabin Vincent
---
target-arm/helper.c | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
On Wed, Sep 23, 2009 at 02:30:01PM +0200, Crooks (Rigante) wrote:
> I was wondering what level of support there is for Thumb-2. (Qemu 0.11 RC2)
> I've compiled two linux-kernels, one with Thumb-2, and one without Thumb-2,
> using the codesourcery compilers. I've then tried to boot these kernels wit
When handling an exception, switch to the correct mode based on the
Thumb Exception (TE) bit in the SCTLR.
Signed-off-by: Rabin Vincent
---
target-arm/helper.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 27001e8
The Thumb CPS currently does not work correctly: CPSID touches more bits
than the instruction wants to, and CPSIE does nothing. Fix it by
passing the correct mask (the "affect" bits) and value.
Signed-off-by: Rabin Vincent
---
target-arm/translate.c |2 +-
1 files changed, 1
Support the "subs pc, lr" Thumb-2 exception return instruction.
Signed-off-by: Rabin Vincent
---
target-arm/translate.c | 13 +++--
1 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 10a516b..f0667e5 10
This series adds Thumb exception support and fixes a couple of instructions
related to it.
With these patches, QEMU can boot a Linux kernel built with Thumb-2.
Rabin Vincent (3):
target-arm: fix thumb CPS
target-arm: implement Thumb-2 exception return
target-arm: support thumb exception
On Fri, Oct 23, 2009 at 12:50:03PM +0200, Boyapati, Anitha wrote:
> We have a proposal to add support for AVR32 target emulation in Qemu.
I've been working on and off on AVR32 target support for a little while
now. It's still far from being complete or mergeable, but enough of the
architecture ha
On Thu, Oct 22, 2009 at 10:25:59AM -0700, Jay Schulist wrote:
> I have an issue with perl and qemu that I'm hoping someone knows what
> is happening. I'm using qemu-i386 on a fedora 11 intel system and the
> following command fails:
>
> $ qemu-i386 -L / /usr/bin/perl -e 'print `perl -v`'
[...]
>
51 matches
Mail list logo
