On Wed, May 7, 2014 at 3:20 PM, Alexey Kardashevskiy wrote:
> On 05/07/2014 04:51 PM, Liu Ping Fan wrote:
>> In current code, we use phb->msi_table[ndev].nvec to indicate whether
>> this msi entries are used by a device or not. So when unplug a pci
>> device, we s
In current code, we use phb->msi_table[ndev].nvec to indicate whether
this msi entries are used by a device or not. So when unplug a pci
device, we should reset nvec to zero.
Signed-off-by: Liu Ping Fan
---
hw/ppc/spapr_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/
Add the emulation of insn "nap" for hypervisor
Signed-off-by: Liu Ping Fan
---
target-ppc/excp_helper.c | 4
target-ppc/helper.h | 1 +
target-ppc/translate.c | 6 ++
3 files changed, 11 insertions(+)
diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_help
When nap, clear no persistent register as ISA spec says.
Signed-off-by: Liu Ping Fan
---
target-ppc/excp_helper.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
index a9712bc..5dbb166 100644
--- a/target-ppc/excp_helper.c
inversion inside the hpet logic.
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 2eb75ea..0aee2c1 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -198,13 +198,23 @@ static
I see the open of 2.0 development window, and rebase V8 with a small fix
v9:
use PC_Q35_1_8_MACHINE_OPTIONS in pc_q35_machine_v1_8
v8:
make piix/q35 compat diverge
simplify the code, use hpet_irqs to pass "intcap" value
Liu Ping Fan (2):
hpet: inverse polarity when
Each slirp instance has its own GFuncs, so we can driver slirp by glib main
loop.
Signed-off-by: Liu Ping Fan
---
For easing the review, This patch does not obey coding guide. Will fix
it later
---
main-loop.c | 6 ---
net/slirp.c | 3 ++
slirp/TFX7d70.tmp | 0
slirp
This series make slirp drivern directly by glib, so we can clean up
the hooks for slrip in mainloop and stub
Liu Ping Fan (2):
slirp: introduce gsource event abstraction
slirp: make slirp event dispatch based on slirp instance
main-loop.c | 6 ---
net/slirp.c | 3
Introduce struct SlirpGSource. It will ease the usage of GSource
associated with a group of files, which are dynamically allocated
and release for slirp.
Signed-off-by: Liu Ping Fan
---
slirp/Makefile.objs | 2 +-
slirp/slirp_gsource.c | 94
ping? Any further comment?
Thanks
On Fri, Oct 18, 2013 at 12:00 PM, Liu Ping Fan wrote:
> v8:
> make piix/q35 compat diverge
> simplify the code, use hpet_irqs to pass "intcap" value
>
> v7:
> use macro to define "intcap" in pc.h
> (as to 3/
finally have the following
value for intcap: For piix, hpet's intcap is hard coded as IRQ2.
For pc-q35-1.7 and earlier, we use IRQ2 for compat reason. Otherwise
IRQ2, IRQ8, and IRQ16~23 are allowed.
Signed-off-by: Liu Ping Fan
---
hw/i386/pc.c | 19 ---
hw/i386/pc_piix.c
inversion inside the hpet logic.
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index fcd22ae..8429eb3 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -198,13 +198,23 @@ static
pat property to fix hpet intcap
v3:
change hpet interrupt capablity on board's demand
Liu Ping Fan (2):
hpet: inverse polarity when pin above ISA_NUM_IRQS
hpet: enable to entitle more irq pins for hpet
hw/i386/pc.c | 19 ---
hw/i386/pc_piix.c| 3 ++-
hw/i386/pc_
On Thu, Oct 17, 2013 at 1:44 PM, Michael S. Tsirkin wrote:
> On Thu, Oct 17, 2013 at 11:16:05AM +0800, Liu Ping Fan wrote:
>> For pc-piix-*, hpet's intcap is always hard coded as IRQ2.
>> For q35, if it is pc-q35-1.7 and earlier, we use IRQ2 for compat
>> reason, other
On q35, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23
of ioapic can be dynamically assigned to hpet as guest chooses.
So we introduce intcap property to do that. (currently, its value
is IRQ2. Later, it should be set by board.)
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c
For pc-piix-*, hpet's intcap is always hard coded as IRQ2.
For q35, if it is pc-q35-1.7 and earlier, we use IRQ2 for compat
reason, otherwise IRQ2, IRQ8, and IRQ16~23 are allowed.
Signed-off-by: Liu Ping Fan
---
hw/i386/pc.c | 20 +++-
hw/i386/pc_piix.c
inversion inside the hpet logic.
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index fcd22ae..8429eb3 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -198,13 +198,23 @@ static
sysbus_create_xx func does not allow us to set a device's extra
properties. While hpet need to set its compat property before
initialization, so we abandon the wrapper function, and spread
its logic "inline"
Signed-off-by: Liu Ping Fan
---
hw/i386/pc.c| 11 +--
hw/ti
e an extra hpet property "compat" to tell PC version
v5:
use stand compat property to fix hpet intcap on pc-q35, while on pc-piix,
hard code intcap as IRQ2
v4:
use stand compat property to fix hpet intcap
v3:
change hpet interrupt capablity on board's demand
Liu Ping Fan (4):
On Mon, Oct 14, 2013 at 10:18 PM, Michael S. Tsirkin wrote:
> On Fri, Oct 11, 2013 at 10:59:40AM +0800, liu ping fan wrote:
>> On Thu, Oct 10, 2013 at 7:41 PM, Michael S. Tsirkin wrote:
>> > On Thu, Oct 10, 2013 at 11:46:42AM +0200, Paolo Bonzini wrote:
>> >>
On Fri, Oct 11, 2013 at 4:38 PM, Paolo Bonzini wrote:
> Il 11/10/2013 04:59, liu ping fan ha scritto:
>> On Thu, Oct 10, 2013 at 7:41 PM, Michael S. Tsirkin wrote:
>>> On Thu, Oct 10, 2013 at 11:46:42AM +0200, Paolo Bonzini wrote:
>>>> Il 10/10/2013 11:41,
On Thu, Oct 10, 2013 at 5:11 PM, Paolo Bonzini wrote:
> Il 10/10/2013 09:56, Liu Ping Fan ha scritto:
>> On q35, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23
>> of ioapic can be dynamically assigned to hpet as guest chooses.
>> So we introduce intcap property t
On Thu, Oct 10, 2013 at 7:41 PM, Michael S. Tsirkin wrote:
> On Thu, Oct 10, 2013 at 11:46:42AM +0200, Paolo Bonzini wrote:
>> Il 10/10/2013 11:41, Michael S. Tsirkin ha scritto:
>> >> > Are you sure? This is not done for any other compat property.
>> >> >
>> >> > Paolo
>> > It's done if we use t
For guest bug compat, we need to limit hpet's intcap on IRQ2
for pc-q35-1.7 and earlier. We use hpet's compat property to
indicate the PC version.
Signed-off-by: Liu Ping Fan
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index c6042c7..90f1ea4 100644
--- a/hw/i386/pc_piix.c
+++
sysbus_create_xx func does not allow us to set a device's extra
properties. While hpet need to set its compat property before
initialization, so we abandon the wrapper function, and spread
its logic "inline"
Signed-off-by: Liu Ping Fan
---
hw/i386/pc.c| 11 +--
hw/ti
For pc-piix-*, hpet's intcap is always hard coded as IRQ2.
For q35, if it is pc-q35-1.7 and earlier, we use IRQ2 for compat
reason, otherwise IRQ2, IRQ8, and IRQ16~23 are allowed.
Signed-off-by: Liu Ping Fan
---
hw/i386/pc.c | 21 -
hw/i386/pc_piix.c| 3 ++
inversion inside the hpet logic.
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index fcd22ae..8429eb3 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -198,13 +198,23 @@ static
On q35, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23
of ioapic can be dynamically assigned to hpet as guest chooses.
So we introduce intcap property to do that. (currently, its value
is IRQ2. Later, it should be set by board.)
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c | 10
ap as IRQ2
v4:
use stand compat property to fix hpet intcap
v3:
change hpet interrupt capablity on board's demand
Liu Ping Fan (5):
hpet: inverse polarity when pin above ISA_NUM_IRQS
hpet: enable to entitle more irq pins for hpet
PC: use qdev_xx to create hpet instead of sysbus
On Mon, Sep 30, 2013 at 11:58 PM, Michael S. Tsirkin wrote:
> On Mon, Sep 30, 2013 at 05:48:03PM +0200, Paolo Bonzini wrote:
>> Il 30/09/2013 11:30, Michael S. Tsirkin ha scritto:
>> > I was really only talking about q35 here.
>> > I thought it's ugly that users can control intcap
>> > directly. C
On Sun, Sep 29, 2013 at 12:20 PM, Michael S. Tsirkin wrote:
> On Sun, Sep 29, 2013 at 11:25:24AM +0800, liu ping fan wrote:
>> On Sun, Sep 29, 2013 at 3:52 AM, Michael S. Tsirkin wrote:
>> > On Thu, Sep 12, 2013 at 11:25:14AM +0800, Liu Ping Fan wrote:
>> >> Accor
On Sun, Sep 29, 2013 at 12:15 PM, Michael S. Tsirkin wrote:
> On Sun, Sep 29, 2013 at 11:49:41AM +0800, liu ping fan wrote:
>> On Sun, Sep 29, 2013 at 3:56 AM, Michael S. Tsirkin wrote:
>> > On Thu, Sep 12, 2013 at 11:25:15AM +0800, Liu Ping Fan wrote:
>> >> On
On Sun, Sep 29, 2013 at 3:56 AM, Michael S. Tsirkin wrote:
> On Thu, Sep 12, 2013 at 11:25:15AM +0800, Liu Ping Fan wrote:
>> On PC, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23
>> of ioapic can be dynamically assigned to hpet as guest chooses.
>> (Will enable t
On Sun, Sep 29, 2013 at 3:52 AM, Michael S. Tsirkin wrote:
> On Thu, Sep 12, 2013 at 11:25:14AM +0800, Liu Ping Fan wrote:
>> According to hpet spec, hpet irq is high active. But according to
>> ICH spec, there is inversion before the input of ioapic. So the OS
>> will expe
On Wed, Sep 25, 2013 at 2:20 PM, Liu Ping Fan wrote:
> From: Paolo Bonzini
>
> This emulates Win32 manual-reset events using futexes or conditional
> variables. Typical ways to use them are with multi-producer,
> single-consumer data structures, to test for a complex condition w
On Wed, Sep 25, 2013 at 2:20 PM, Liu Ping Fan wrote:
> From: Paolo Bonzini
>
> Seqlock implementation for QEMU. Usage idiom
>
> reader:
> do{
> start = seqlock_read_begin()
>
> }while(seqlock_read_try(start))
>
> writer:
> seqlock_write_loc
BQL
Lock rule: private lock innermost, ie BQL->"this lock"
Signed-off-by: Liu Ping Fan
---
cpus.c | 41 +
include/qemu/timer.h | 2 ++
2 files changed, 35 insertions(+), 8 deletions(-)
diff --git a/cpus.c b/cpus.c
index e56
Hi, is hpet orphan? Or who can help me to merge this patch-set if my
patch is fine.
Thanks.
On Thu, Sep 12, 2013 at 11:25 AM, Liu Ping Fan wrote:
> v5:
> use stand compat property to fix hpet intcap on pc-q35, while on pc-piix,
> hard code intcap as IRQ2
>
> v4:
> use sta
From: Paolo Bonzini
This emulates Win32 manual-reset events using futexes or conditional
variables. Typical ways to use them are with multi-producer,
single-consumer data structures, to test for a complex condition whose
elements come from different threads:
for (;;) {
qemu_event_re
From: Paolo Bonzini
Seqlock implementation for QEMU. Usage idiom
reader:
do{
start = seqlock_read_begin()
}while(seqlock_read_try(start))
writer:
seqlock_write_lock()
...
seqlock_write_unlock()
initialization:
seqlock_init(QemuSeqLock *sl, QemuMutex *mutex)
where mutex could
.
And the callers of qemu_clock_enable() should be sync by themselves,
not protected by this patch.
Signed-off-by: Liu Ping Fan
---
include/qemu/timer.h | 6 ++
qemu-timer.c | 21 -
2 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/include/qemu/time
nd discard private lock around
"qemu_event_wait(tl->ev)".
v2:
1. fix comment in commit and code
2. fix race issue for qemu_clock_enable(foo,disable)
Liu Ping Fan (2):
timer: protect timers_state's clock with seqlock
timer: make qemu_clock_enable sync between disable and
On Mon, Sep 23, 2013 at 2:21 PM, Jan Kiszka wrote:
> On 2013-09-22 10:11, Liu Ping Fan wrote:
>> QEMU_CLOCK_VIRTUAL may be read outside BQL. This will make its
>> foundation, i.e. timers_state exposed to race condition.
>> Using private lock to protect it.
>>
&
On Mon, Sep 23, 2013 at 2:26 PM, Jan Kiszka wrote:
> On 2013-09-22 10:11, Liu Ping Fan wrote:
>> After disabling the QemuClock, we should make sure that no QemuTimers
>> are still in flight. To implement that with light overhead, we resort
>> to QemuEvent. The caller of d
On Mon, Sep 23, 2013 at 2:21 PM, Jan Kiszka wrote:
> On 2013-09-22 10:11, Liu Ping Fan wrote:
>> This lets the read-side access run outside the BQL.
>
> In fact, not only BQL. Didn't the original commit provide a changlog
> about the content of this patch? Otherwise, bri
On Mon, Sep 23, 2013 at 9:59 AM, Alexey Kardashevskiy wrote:
> On 09/22/2013 09:47 PM, Liu Ping Fan wrote:
>> This is useful when pci assignment happens on sPAPR.
>
>
> I have almost the same patch in my queue already, it will enable irqfd for
> both INTX and MSI, I am just w
On Mon, Sep 23, 2013 at 4:02 AM, Alexander Graf wrote:
>
> Am 22.09.2013 um 13:47 schrieb Liu Ping Fan :
>
>> This is useful when pci assignment happens on sPAPR.
>
> This patch doesn't sound useful on its own to me, thus probably belongs in a
> greater patch se
This is useful when pci assignment happens on sPAPR.
Signed-off-by: Liu Ping Fan
---
This patch will apply on patches which enable xics in kernel.
---
hw/intc/xics.c| 5 +
hw/ppc/spapr_pci.c| 14 ++
include/hw/ppc/xics.h | 1 +
3 files changed, 20 insertions
This emulates Win32 manual-reset events using futexes or conditional
variables. Typical ways to use them are with multi-producer,
single-consumer data structures, to test for a complex condition whose
elements come from different threads:
for (;;) {
qemu_event_reset(ev);
... t
.
And the callers of qemu_clock_enable() should be sync by themselves,
not protected by this patch.
Signed-off-by: Liu Ping Fan
---
include/qemu/timer.h | 4
qemu-timer.c | 20 +++-
2 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/include/qemu/time
This lets the read-side access run outside the BQL.
Signed-off-by: Paolo Bonzini
---
include/qemu/seqlock.h | 72 ++
1 file changed, 72 insertions(+)
create mode 100644 include/qemu/seqlock.h
diff --git a/include/qemu/seqlock.h b/include/qemu/seq
This lets the read-side access run outside the BQL.
Signed-off-by: Paolo Bonzini
---
include/qemu/seqlock.h | 72 ++
1 file changed, 72 insertions(+)
create mode 100644 include/qemu/seqlock.h
diff --git a/include/qemu/seqlock.h b/include/qemu/seq
Lock rule: private lock innermost, ie BQL->"this lock"
Signed-off-by: Liu Ping Fan
---
cpus.c | 36 ++--
1 file changed, 30 insertions(+), 6 deletions(-)
diff --git a/cpus.c b/cpus.c
index e566297..870a832 100644
--- a/cpus.c
+++ b/cpus.c
@
mment in commit and code
2. fix race issue for qemu_clock_enable(foo,disable)
Liu Ping Fan (2):
timer: protect timers_state's clock with seqlock
timer: make qemu_clock_enable sync between disable and timer's cb
Paolo Bonzini (2):
seqlock: introduce read-write seqlock
On Wed, Sep 18, 2013 at 9:54 PM, Stefan Hajnoczi wrote:
> On Tue, Aug 27, 2013 at 11:20:59AM +0800, Liu Ping Fan wrote:
>> Saw the Alex's patches has been merged, rebase mine onto his.
>>
>> v3:
>> 1. rename seqlock_read_check as seqlock_read_retry
>> 2
On Thu, Sep 12, 2013 at 4:17 PM, Stefan Hajnoczi wrote:
> On Thu, Sep 12, 2013 at 11:10:01AM +0800, liu ping fan wrote:
>> Do you think this series is ready to be merged?
>> I have some code to run hpet on a dedicated thread, and in theory it
>> will rely on this.
>
>
On Thu, Sep 12, 2013 at 2:29 PM, Paolo Bonzini wrote:
> Il 12/09/2013 05:25, Liu Ping Fan ha scritto:
>> v5:
>> use stand compat property to fix hpet intcap on pc-q35, while on pc-piix,
>> hard code intcap as IRQ2
>>
>> v4:
>> use stand comp
Nowadays, irqfd can emulate trigger mode, but it can not emulate
trigger polarity. While in some cases, ioapic ioredtbl[x] expects
_low_ active. So equipping irqfd with the ability. Correspondingly,
resamplefd will have the same polarity as irqfd.
Signed-off-by: Liu Ping Fan
---
This helps to
Running hpet in iothread, there could be variable payload, which
will finally affect the accurate of timing. So we want to run
hpet on dedicated thread.
For hpet, almost of the things can run out of BQL, except interrupt.
We step around interrupt by using irqfd.
Signed-off-by: Liu Ping Fan
migration is not supported yet.
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index ae54b87..8e32e36 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
tep around the irq system in
qemu, and forward irq directly to kernel where re-entrance is already
allowed.
Signed-off-by: Liu Ping Fan
---
hw/core/irq.c| 39 +++
include/hw/irq.h | 5 +
2 files changed, 44 insertions(+)
diff --git a/hw/core/ir
Equip irqfd with polarity, so it can emulate the low-active interrupt.
We take one extra bit in flags to pass this info to kernel and keep
the default value "zero" as high-active.
Signed-off-by: Liu Ping Fan
---
The kernel will extend this interface correspondingly
---
hw/m
-safe patches for timers.
And it is just for discussion. And code is premature.
Liu Ping Fan (5):
irq: introduce route method in IRQState to get gsi
irq: implement route method of ioapic
irqfd: equip irqfd with polarity
hpet: deliver irq by irqfd when in dedicated thread mode
hpet: r
Implement the routing of PC's interrupt gpio to intc, and
retrieve the gsi.
Signed-off-by: Liu Ping Fan
---
hw/core/qdev.c | 8
hw/i386/kvm/i8259.c| 8 +++-
hw/i386/kvm/ioapic.c | 21 -
hw/i386/pc_q35.c | 4 ++--
include/hw/qdev-c
For guest bug compat, we limit hpet's interrupt compatibility on
ioapic's IRQ2 for pc-q35-1.6. As to pc-35-1.7 and newer, IRQ2, IRQ8,
and IRQ16~23 are allowed.
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c | 7 ++-
include/hw/i386/pc.h | 4
2 files changed, 6 insert
For pc-piix-*, hpet's intcap is always hard coded as IRQ2. While
for pc-q35-*, we resort to compat property to fix it (a later patch).
Signed-off-by: Liu Ping Fan
---
hw/i386/pc.c | 12
hw/i386/pc_piix.c| 3 ++-
hw/i386/pc_q35.c | 2 +-
include/hw/i386/pc.h
sysbus_create_xx func does not allow us to set a device's extra
properties. While hpet need to set its compat property before
initialization, so we abandon the wrapper function, and spread
its logic "inline"
Signed-off-by: Liu Ping Fan
---
hw/i386/pc.c | 11 +--
1
Ping Fan
---
hw/timer/hpet.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index fcd22ae..8429eb3 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -198,13 +198,23 @@ static void update_irq(struct HPETTimer *timer, int set
On PC, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23
of ioapic can be dynamically assigned to hpet as guest chooses.
(Will enable them after introducing pc 1.6 compat)
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions
v5:
use stand compat property to fix hpet intcap on pc-q35, while on pc-piix,
hard code intcap as IRQ2
v4:
use stand compat property to fix hpet intcap
v3:
change hpet interrupt capablity on board's demand
Liu Ping Fan (5):
hpet: inverse polarity when pin above ISA_NUM_IRQS
Hi Stefan,
Do you think this series is ready to be merged?
I have some code to run hpet on a dedicated thread, and in theory it
will rely on this.
Thanks and regards,
Pingfan
On Thu, Aug 29, 2013 at 10:42 PM, Stefan Hajnoczi wrote:
> v3:
> * Squashed Paolo's fixes and added his patch to avoid
On Wed, Sep 4, 2013 at 3:03 PM, Paolo Bonzini wrote:
> Il 04/09/2013 07:29, liu ping fan ha scritto:
>> On Tue, Sep 3, 2013 at 7:17 PM, Paolo Bonzini wrote:
>>> Il 02/09/2013 09:06, Liu Ping Fan ha scritto:
>>>> note: I rebase it onto Stefan's net-next tree,
On Tue, Sep 3, 2013 at 7:17 PM, Paolo Bonzini wrote:
> Il 02/09/2013 09:06, Liu Ping Fan ha scritto:
>> note: I rebase it onto Stefan's net-next tree, since pc-1.7 has already been
>> defined there.
>>
>> v4:
>> use standard compat property to set h
For guest bug compat, we limit hpet's interrupt compatibility on
ioapic's IRQ2 for pc-*-1.6. As to pc-*-1.7 and newer, IRQ2, IRQ8,
and IRQ16~23 are allowed.
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c | 6 +-
include/hw/i386/pc.h | 4
2 files changed, 5 insert
On PC, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23
of ioapic can be dynamically assigned to hpet as guest chooses.
(Will enable them after introducing pc 1.6 compat)
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions
Ping Fan
---
hw/timer/hpet.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 648b383..1139448 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -198,13 +198,23 @@ static void update_irq(struct HPETTimer *timer, int set
note: I rebase it onto Stefan's net-next tree, since pc-1.7 has already been
defined there.
v4:
use standard compat property to set hpet's interrupt compatibility
v3:
change hpet interrupt capablity on board's demand
Liu Ping Fan (3):
hpet: inverse polarity when pin abo
On Fri, Aug 30, 2013 at 8:32 PM, Andreas Färber wrote:
> Am 30.08.2013 10:17, schrieb Paolo Bonzini:
>> Il 30/08/2013 09:53, Liu Ping Fan ha scritto:
>>> qdev's property can not be set after realized, but there is a
>>> requirement of adjusting device's be
On Fri, Aug 30, 2013 at 4:17 PM, Paolo Bonzini wrote:
> Il 30/08/2013 09:53, Liu Ping Fan ha scritto:
>> qdev's property can not be set after realized, but there is a
>> requirement of adjusting device's behavior on different mother
>> boards
On q35 machine, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23
of ioapic can be dynamically assigned to hpet as guest chooses.
Signed-off-by: Liu Ping Fan
---
hw/i386/pc.c| 8 +++-
hw/timer/hpet.c | 12 ++--
2 files changed, 17 insertions(+), 3 deletions(-)
diff
Ping Fan
---
hw/timer/hpet.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 648b383..1139448 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -198,13 +198,23 @@ static void update_irq(struct HPETTimer *timer, int set
which changes hpet's intcap
property)
Signed-off-by: Liu Ping Fan
---
hw/core/sysbus.c| 5 -
hw/i386/pc.c| 2 +-
include/hw/sysbus.h | 8 +---
3 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c
index 9004d8c..e894bbb 1006
v3:
change hpet interrupt capablity on board's demand
Liu Ping Fan (3):
hpet: inverse polarity when pin above ISA_NUM_IRQS
qdev: interface for SysBusDevice to change property on requirement
hpet: entitle more irq pins for hpet
hw/core/sysbus.c| 5 -
hw/i386/pc.c
On Tue, Aug 27, 2013 at 11:18 PM, Alex Bligh wrote:
>
> On 27 Aug 2013, at 04:21, Liu Ping Fan wrote:
>
>> Note in tcg mode, vm_clock still read inside BQL, so icount is
>
> Should refer to QEMU_CLOCK_VIRTUAL if after my patches
>
Will change the log.
>> left without
On Tue, Aug 27, 2013 at 11:32 PM, Alex Bligh wrote:
>
> On 27 Aug 2013, at 04:21, Liu Ping Fan wrote:
>
>> After disabling the QemuClock, we should make sure that no QemuTimers
>> are still in flight. To implement that with light overhead, we resort
>> to QemuEvent. T
On Tue, Aug 27, 2013 at 4:45 PM, Paolo Bonzini wrote:
> Il 27/08/2013 10:10, Liu Ping Fan ha scritto:
>> On q35 machine, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23
>> of ioapic can be dynamically assigned to hpet as guest chooses.
>
> First of all, the bac
On q35 machine, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23
of ioapic can be dynamically assigned to hpet as guest chooses.
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer
On different machines, the device can has different properties.
Export machine type's check interface to devices, so the device
can decide its behavior at runtime.
Signed-off-by: Liu Ping Fan
---
include/hw/boards.h | 1 +
vl.c| 8
2 files changed, 9 insertions(+)
Ping Fan
---
hw/timer/hpet.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 648b383..1139448 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -198,13 +198,23 @@ static void update_irq(struct HPETTimer *timer, int set
.
And the callers of qemu_clock_enable() should be sync by themselves,
not protected by this patch.
Signed-off-by: Liu Ping Fan
---
include/qemu/timer.h | 4
qemu-timer.c | 20 +++-
2 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/include/qemu/time
e, it is still protected by BQL.
Lock rule: private lock innermost, ie BQL->"this lock"
Signed-off-by: Liu Ping Fan
---
cpus.c | 36 ++--
1 file changed, 30 insertions(+), 6 deletions(-)
diff --git a/cpus.c b/cpus.c
index b9e5685..bcead3b 100644
From: Paolo Bonzini
This emulates Win32 manual-reset events using futexes or conditional
variables. Typical ways to use them are with multi-producer,
single-consumer data structures, to test for a complex condition whose
elements come from different threads:
for (;;) {
qemu_event_re
From: Paolo Bonzini
This lets the read-side access run outside the BQL.
Signed-off-by: Paolo Bonzini
---
include/qemu/seqlock.h | 72 ++
1 file changed, 72 insertions(+)
create mode 100644 include/qemu/seqlock.h
diff --git a/include/qemu/seqloc
fix race issue for qemu_clock_enable(foo,disable)
Liu Ping Fan (2):
timer: protect timers_state's clock with seqlock
timer: make qemu_clock_enable sync between disable and timer's cb
Paolo Bonzini (2):
seqlock: introduce read-write seqlock
qemu-thread: add QemuEvent
cpus.
On Mon, Aug 26, 2013 at 3:59 PM, Paolo Bonzini wrote:
> Il 26/08/2013 04:53, liu ping fan ha scritto:
>> On Sun, Aug 25, 2013 at 2:45 PM, Paolo Bonzini wrote:
>>> Il 25/08/2013 04:16, Liu Ping Fan ha scritto:
>>>> On PC, IRQ2/8 can be reserved for hpet timer 0/1. An
On Sun, Aug 25, 2013 at 2:45 PM, Paolo Bonzini wrote:
> Il 25/08/2013 04:16, Liu Ping Fan ha scritto:
>> On PC, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23 of
>> ioapic can be dynamically assigned to hpet as guest chooses.
>>
>> Signed-off-by: Liu Ping Fan
On Sun, Aug 25, 2013 at 2:44 PM, Paolo Bonzini wrote:
> Il 25/08/2013 04:16, Liu Ping Fan ha scritto:
>> According to hpet spec, hpet irq is high active. But according to
>> ICH spec, there is inversion before the input of ioapic. So the OS
>> will expect low active on this
On PC, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23 of
ioapic can be dynamically assigned to hpet as guest chooses.
Signed-off-by: Liu Ping Fan
---
hw/timer/hpet.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index
Ping Fan
---
kernel has a bug with ioapic, refer to
https://lkml.org/lkml/2013/8/23/98
With all these patch, linux-2.6/Documentation/timers/hpet_example.c can work
on qemu
---
hw/timer/hpet.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw
If slirp needs to emulate tcp timeout, then the timeout value
for mainloop should be more precise, which is determined by
slirp's fasttimo or slowtimo. Achieve this by swap the logic
sequence of slirp_pollfds_fill and slirp_update_timeout.
Signed-off-by: Liu Ping Fan
---
main-loop.c
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