ed
interrupt that is disabled does not get pending. Thus we have to retain
the get-pending-on-enable logic just for this model. For GICv2 and
later, the pending status is fully handled by gic_test_pending() and
does not need any special treatment when enabling the level interrupt.
Signed-off-by:
On Fri, 2024-09-06 at 13:50 +0100, Peter Maydell wrote:
> On Mon, 2 Sept 2024 at 13:32, Jan Klötzke
> wrote:
> >
> > Level triggered interrupts are pending when either the interrupt line
> > is asserted or the interrupt was made pending by a GICD_ISPENDRn write.
>
c_test_pending() and does not need any special treatment
when enabling the level interrupt.
Signed-off-by: Jan Klötzke
---
hw/intc/arm_gic.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index 806832439b..10fc9bfd14 100644
--- a/hw/intc/arm
Debug exceptions that target AArch32 Hyp mode are reported differently
than on AAarch64. Internally, Qemu uses the AArch64 syndromes. Therefore
such exceptions need to be either converted to a prefetch abort
(breakpoints, vector catch) or a data abort (watchpoints).
Signed-off-by: Jan Klötzke
On Tue, 2024-01-23 at 17:58 +, Peter Maydell wrote:
> On Fri, 19 Jan 2024 at 22:40, Jan Klötzke
> wrote:
>
> > ---
> > target/arm/helper.c | 20
> > 1 file changed, 20 insertions(+)
> >
> > diff --git a/target/arm/helper.c b/t
Debug exceptions that target AArch32 Hyp mode are reported differently
than on AAarch64. Internally, Qemu uses the AArch64 syndromes. Therefore
such exceptions need to be either converted to a prefetch abort
(breakpoints, vector catch) or a data abort (watchpoints).
Signed-off-by: Jan Klötzke
