/block/nvme: fix pin-based interrupt behavior")
Reported-by: Jakub Jermář
Signed-off-by: Klaus Jensen
---
hw/nvme/nvme.h | 1 +
hw/nvme/ctrl.c | 15 ++-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h
index 93a7e0e5380e..60250b579464 100644
On 6/14/21 8:19 PM, Klaus Jensen wrote:
On Jun 14 15:54, Jakub Jermář wrote:
An IRQ vector used by a completion queue cannot be deasserted without
first checking if the same vector does not need to stay asserted for
some other completion queue. To this end the controller structure is
extended
An IRQ vector used by a completion queue cannot be deasserted without
first checking if the same vector does not need to stay asserted for
some other completion queue. To this end the controller structure is
extended by a counter of asserted completion queues.
To prevent incrementing the counter f
On 6/10/21 8:14 PM, Klaus Jensen wrote:
On Jun 10 13:46, Jakub Jermář wrote:
An IRQ vector used by a completion queue cannot be deasserted without
first checking if the same vector does not need to stay asserted for
some other completion queue.
Signed-off-by: Jakub Jermar
---
hw/nvme/ctrl.c
An IRQ vector used by a completion queue cannot be deasserted without
first checking if the same vector does not need to stay asserted for
some other completion queue.
Signed-off-by: Jakub Jermar
---
hw/nvme/ctrl.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
dif
result, pages that have the XI bit set in the TLB and are accessed
for read/write, don't suddenly end up being executable.
Signed-off-by: Jakub Jermář
---
Changes since v2:
This is the same patch as v2, but rebased to current master.
target/mips/helper.c | 13 -
1 file ch
result, pages that have the XI bit set in the TLB and are accessed
for read/write, don't suddenly end up being executable.
Signed-off-by: Jakub Jermář
---
target/mips/helper.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/target/mips/helper.c b/target
result, pages that have the XI bit set in the TLB and are accessed
for read/write, don't suddenly end up being executable.
Signed-off-by: Jakub Jermář
---
target/mips/helper.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/target/mips/helper.c b/t
result, pages that have the XI bit set in the TLB and are accessed
for read/write, don't suddenly end up being executable.
Signed-off-by: Jakub Jermář
---
target/mips/helper.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/target/mips/helper.c b/target
Hi Artyom,
On 01/23/2017 03:10 PM, Artyom Tarasenko wrote:
> On Mon, Jan 23, 2017 at 1:40 PM, Peter Maydell
> wrote:
>> On 18 January 2017 at 22:38, Artyom Tarasenko wrote:
>>> Remove the Niagara stub implementation from sun4u.c and add a machine,
>>> compatible with Legion simulator from the O
Initialization of a class instance cannot depend on its own properties
as these are not yet set. Move parts of integratorcm_init() that depend
on the "memsz" property to the newly added integratorcm_realize().
This fixes: https://bugs.launchpad.net/qemu/+bug/1624726
Signed-off-by: Jakub Jermar
On 09/20/2016 07:34 PM, Peter Maydell wrote:
> On 19 September 2016 at 20:54, Jakub Jermář wrote:
>>
>> * Do not assume memsz is already initialized in integratorcm_init
>> * Calculate memsz directly from MachineState
>> * Get rid of the now unused memsz property
>&g
* Do not assume memsz is already initialized in integratorcm_init
* Calculate memsz directly from MachineState
* Get rid of the now unused memsz property
Signed-off-by: Jakub Jermar
---
hw/arm/integratorcp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/integrat
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