On Wed, 23 Jul 2025 11:37:39 +0800 (CST)
wrote:
> From: Xuemei Liu
>
> This adds powerdown support by implementing the ACPI GED.
>
> Signed-off-by: Xuemei Liu
> Co-authored-by: Björn Töpel
not counting test case update
Acked-by: Igor Mammedov
However split out test p
On Wed, 1 Oct 2025 01:01:14 +
salil.me...@opnsrc.net wrote:
> From: Salil Mehta
>
> When QEMU builds the MADT table, modifications are needed to include
> information
> about possible vCPUs that are exposed as ACPI-disabled (i.e.,
> `_STA.Enabled=0`).
> This new information will help the
On Thu, 2 Oct 2025 16:19:00 +0200
David Hildenbrand wrote:
> On 02.10.25 16:11, Igor Mammedov wrote:
> > On Wed, 24 Sep 2025 18:33:23 +0800
> > fanhuang wrote:
> >
> >> Hi David,
> >>
> >> I hope this email finds you well. It's been sev
On Wed, 24 Sep 2025 18:33:23 +0800
fanhuang wrote:
> Hi David,
>
> I hope this email finds you well. It's been several months since Zhigang last
> discussion about the Special Purpose Memory (SPM) implementation in QEMU with
> you, and I wanted to provide some background context before present
On Wed, 24 Sep 2025 13:50:39 +0100
Mark Cave-Ayland wrote:
> On 23/09/2025 10:30, Igor Mammedov wrote:
>
> > On Mon, 22 Sep 2025 14:56:57 +0100
> > Mark Cave-Ayland wrote:
> >
> >> On 22/09/2025 13:35, Igor Mammedov wrote:
> >>
> >>
On Thu, 25 Sep 2025 17:03:18 +0100
Mark Cave-Ayland wrote:
> This series removes support for -cpu host and -cpu max from the isapc
> machine as suggested by Igor, and then updates the "Backwards compatibility"
> section of the documentation to reflect both this and the recen
; pentium3).
> >>>>>
> >>>>> What is written here made sense from the POV of use of isapc with
> >>>>> qemu-system-x86_64, but in qemu-system-i686, both 'max' and 'host'
> >>>>> where already 32-bit CPUs
On Mon, 22 Sep 2025 15:24:09 +0100
Daniel P. Berrangé wrote:
> On Mon, Sep 22, 2025 at 03:26:00PM +0200, Igor Mammedov wrote:
> > [2] initialized 'No Reboot' bit to 1 by default. And due to quirk it
> > happened
> > to work with linux iTCO_wdt driver
tasheet (rev: 004)
2)
Fixes: 920557971b6 (ich9: add TCO interface emulation)
Signed-off-by: Igor Mammedov
---
include/hw/southbridge/ich9.h | 2 +-
hw/isa/lpc_ich9.c | 7 ++-
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/include/hw/southbridge/ich9.h b/include/hw
On Mon, 22 Sep 2025 14:05:13 +0200
Philippe Mathieu-Daudé wrote:
> On 27/8/25 13:46, Daniel P. Berrangé wrote:
> > On Wed, Aug 27, 2025 at 12:10:00PM +0100, Mark Cave-Ayland wrote:
> >> On 26/08/2025 08:25, Xiaoyao Li wrote:
> >>
> >>> On 8/22/2025 8:11 PM, Mark Cave-Ayland wrote:
> Th
On Wed, 10 Sep 2025 13:23:10 +0200
Paolo Bonzini wrote:
> On Wed, Sep 10, 2025 at 1:16 PM Igor Mammedov wrote:
> >
> > On Mon, 8 Sep 2025 15:30:19 +0100
> > Daniel P. Berrangé wrote:
> >
> > > Hi,
> > >
> > > This patches causes a regress
ed-by: Daniel P. Berrangé
Signed-off-by: Igor Mammedov
---
hw/timer/hpet.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 789a31d0a0..1acba4fa9d 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -40,6 +40,7 @@
#include "qom/object.h&
23252eb29e40b,if=none,snapshot=on,format=raw,id=drv0
> -device xen-disk,drive=drv0,vdev=xvda -device virtio-net-pci,netdev=unet
> -netdev user,id=unet,hostfwd=:127.0.0.1:0-:22'
>
> On Fri, Aug 29, 2025 at 02:59:31PM +0200, Paolo Bonzini wrote:
> > From: Igor Mammedov
>
On Thu, 28 Aug 2025 01:00:47 +0300
Leonid Bloch wrote:
> This patch extends the GPE (General Purpose Event) handling to support
> the maximum number of interrupts available based on the machine's GPE
> register length, rather than being limited to the first 8 bits.
>
> This change is needed to s
On Thu, 28 Aug 2025 01:00:48 +0300
Leonid Bloch wrote:
> The battery device communicates battery state to the guest via ACPI.
> It supports two modes of operation:
>
> 1. QMP control mode (default): Battery state is controlled programmatically
>via QMP commands, making the device determinist
; cpu_reset(cs);
> + #ifndef CONFIG_USER_ONLY
> +qemu_register_resettable(OBJECT(dev));
> + #endif
I'd put this in virt_cpu_plug() as last step, which should work both for
cold and hotpluged cpus. And drop CONFIG_USER_ONLY while at it.
with that
Reviewed-by: Igor Mammedov
P
On Thu, 4 Sep 2025 09:06:35 +0100
Alex Bennée wrote:
> From: Xin Wang
>
> For now, qemu save/load CPU exception info(such as exception_nr and
> has_error_code), while the exception error_code is ignored. This will
> cause the dest hypervisor reinject a vCPU exception with error_code(0),
> pote
On Thu, 4 Sep 2025 19:55:49 +0800
Bibo Mao wrote:
> On 2025/9/4 下午4:13, Igor Mammedov wrote:
> > On Wed, 3 Sep 2025 10:35:56 +0800
> > Bibo Mao wrote:
> >
> >> With cpu hotplug is implemented on LoongArch virt machine, reset
> >> interface with hot-ad
Changes in v3:
> ------
> * Rebased on latest master
> * Addressed the v2 review by Igor Mammedov
>
> Changes in v2:
> --
> Based on the feedback from Philippe Mathieu-Daudé and Michael S. Tsirkin:
>
> * Complete redesign with dual-mode operation:
&g
userspace apps,
something like [1].
Lets cap default DIMM size to 2Tb for now, until MS fixes it.
1)
https://issues.redhat.com/browse/RHEL-81999?focusedId=27731200&page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel#comment-27731200
Signed-off-by: Igor Mammedov
---
PS: I
uest accesses are fully atomic, so just drop the
> requirement instead of fixing them.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Igor Mammedov
> ---
> include/hw/core/cpu.h | 1 -
> hw/core/cpu-common.c | 12 +---
> system/cpus.c | 3 +--
> 3 fil
consistently.
>
> While at it, change the source argument from int ("1") to bool ("true").
>
> Reviewed-by: Richard Henderson
> Reviewed-by: Philippe Mathieu-Daudé
> Reviewed-by: Peter Xu
> Signed-off-by: Paolo Bonzini
Reviewed-by: Igor Mammedov
>
gt;exit_request again outside system emulation.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Igor Mammedov
> ---
> accel/tcg/cpu-exec.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
> index ad94f96b252..7c20d9db12
and through CPU_FOREACH in the round-robin case.
>
> Use it also for user-mode emulation, and take the occasion to move
> the implementation to accel/tcg/user-exec.c.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Igor Mammedov
> ---
> docs/devel/tcg-icount.rst
ore-release
> consistently.
>
> Reviewed-by: Richard Henderson
> Reviewed-by: Peter Xu
> Signed-off-by: Paolo Bonzini
Reviewed-by: Igor Mammedov
nit below:
> ---
> accel/kvm/kvm-all.c | 19 +--
> accel/tcg/cpu-exec.c | 7 +-
On Fri, 29 Aug 2025 17:31:03 +0200
Paolo Bonzini wrote:
beside nit below
Reviewed-by: Igor Mammedov
> ---
> accel/tcg/cpu-exec.c| 6 +++---
> hw/core/cpu-system.c| 2 +-
> target/avr/helper.c | 4 ++--
> target/i3
gt; the loop, instead of setting cpu->exit_request to true.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Igor Mammedov
> ---
> accel/dummy-cpus.c| 2 +-
> accel/hvf/hvf-accel-ops.c | 2 +-
> accel/kvm/kvm-accel-ops.c | 3 ++-
> ac
ic_set_mb() would only be needed if the halt sleep was done
> outside the BQL (though in that case, cpu->exit_request probably
> would be replaced by a QemuEvent or something like that).
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Igor Mammedov
> ---
> accel/kvm/kvm-all.c
On Fri, 29 Aug 2025 17:31:10 +0200
Paolo Bonzini wrote:
> Now that TCG has its own kick function, make cpu_exit() do the right kick
> for all accelerators.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Reviewed-by: Richard Henderson
> Signed-off-by: Paolo Bonzini
Reviewed
ng that, inline cpu_exit() into
> tcg_kick_vcpu_thread(). The direction of the calls can then be
> reversed, with an accelerator-independent cpu_exit() calling into
> qemu_vcpu_kick() rather than the opposite.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Igor Mammedov
>
On Fri, 29 Aug 2025 17:28:54 +0200
Paolo Bonzini wrote:
> It is not used by user-mode emulation and is the only caller of
> cpu_interrupt() in qemu-i386 and qemu-x86_64.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Igor Mammedov
> ---
> target/i386/helper.c | 2 ++
&g
On Fri, 29 Aug 2025 17:28:52 +0200
Paolo Bonzini wrote:
> It is not used by user-mode emulation and is the only caller of
> cpu_interrupt() in qemu-ppc* binaries.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Igor Mammedov
> ---
> target/ppc/helper_regs.c | 2 ++
&g
On Fri, 29 Aug 2025 14:33:57 +0200
Paolo Bonzini wrote:
> On Fri, Aug 29, 2025 at 10:18 AM Paolo Bonzini wrote:
> >
> > On 8/26/25 10:47, Igor Mammedov wrote:
> > > While overhead might be issue, it's better to have correcteness 1st.
> > > (that's w
On Fri, 29 Aug 2025 10:31:57 +0800
Bibo Mao wrote:
> On 2025/8/29 上午9:32, Xianglai Li wrote:
> > The hot-plugged cpu does not register the cpu reset function, so the cpu
> > plugged in later cannot reset properly, and there will be problems when
> > restarting.
> >
> > Now register the cpu reset
On Mon, 1 Sep 2025 10:08:31 +0100
Daniel P. Berrangé wrote:
> On Mon, Sep 01, 2025 at 10:49:15AM +0200, Igor Mammedov wrote:
> > With current limit set to match max spec size (2PTb),
> > Windows fails to parse type 17 records when DIMM size reaches 4Tb+.
> &g
On Mon, 25 Aug 2025 12:46:07 +0200
Philippe Mathieu-Daudé wrote:
> On 14/8/25 18:05, Igor Mammedov wrote:
> > when kernel-irqchip=split is used, QEMU still hits BQL
> > contention issue when reading ACPI PM/HPET timers
> > (despite of timer[s] access being lock-less).
>
On Tue, 26 Aug 2025 17:09:27 +0200
Philippe Mathieu-Daudé wrote:
> On 26/8/25 13:23, Igor Mammedov wrote:
> > On Fri, 15 Aug 2025 12:24:45 +0530
> > Ani Sinha wrote:
> >
> >> kvm_park_vcpu() and kvm_unpark_vcpu() is only used in kvm-all.c. Declare it
> >&g
On Thu, 21 Aug 2025 20:45:49 +0300
Leonid Bloch wrote:
> Increase the number of possible ACPI interrupts from 8, to the maximum
> available: 64 by default.
for piix4 we have 'GPE_LEN 4', which gives us 2 bitmaps (STS/EN) 16bit each.
For ICH9_PMIO_GPE0_LEN 16 => 8bytes/bitmap
so numbers above wo
On Fri, 15 Aug 2025 12:24:45 +0530
Ani Sinha wrote:
> kvm_park_vcpu() and kvm_unpark_vcpu() is only used in kvm-all.c. Declare it
> static, remove it from common header file and make it local to kvm-all.c
>
> Signed-off-by: Ani Sinha
Reviewed-by: Ani Sinha
> ---
> accel/kvm/kvm-all.c | 4
On Tue, 26 Aug 2025 15:45:32 +0800
Zhao Liu wrote:
> On Mon, Aug 25, 2025 at 05:19:12PM +0200, Igor Mammedov wrote:
> > Date: Mon, 25 Aug 2025 17:19:12 +0200
> > From: Igor Mammedov
> > Subject: Re: [PATCH v5 6/8] add cpu_test_interrupt()/cpu_set_interrupt()
> > hel
On Mon, 25 Aug 2025 23:28:22 +0800
Zhao Liu wrote:
> Hi Igor,
>
> > diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> > index 5eaf41a566..1dee9d4c76 100644
> > --- a/include/hw/core/cpu.h
> > +++ b/include/hw/core/cpu.h
> > @@ -942,6 +942,31 @@
On Mon, 25 Aug 2025 22:55:43 +0800
Zhao Liu wrote:
> On Thu, Aug 14, 2025 at 06:05:57PM +0200, Igor Mammedov wrote:
> > Date: Thu, 14 Aug 2025 18:05:57 +0200
> > From: Igor Mammedov
> > Subject: [PATCH v4 5/8] hpet: make main counter read lock-less
> >
> > Make
On Mon, 25 Aug 2025 13:46:45 +0530
Harsh Prateek Bora wrote:
> On 8/21/25 21:26, Igor Mammedov wrote:
> > the helpers form load-acquire/store-release pair and use them to replace
> > open-coded checkers/setters consistently across the code, which
> > ensures that approp
On Mon, 25 Aug 2025 12:35:51 +0200
Philippe Mathieu-Daudé wrote:
> Hi Igor,
>
> On 21/8/25 17:56, Igor Mammedov wrote:
> > the helpers form load-acquire/store-release pair and use them to replace
> > open-coded checkers/setters consistently across the code, which
> &g
On Wed, 20 Aug 2025 11:01:13 -0400
"Jason J. Herne" wrote:
> On 8/14/25 12:05 PM, Igor Mammedov wrote:
> > the helpers form load-acquire/store-release pair and use them to replace
> > open-coded checkers/setters consistently across the code, which
> > ensures t
the helpers form load-acquire/store-release pair and use them to replace
open-coded checkers/setters consistently across the code, which
ensures that appropriate barriers are in place in case checks happen
outside of BQL.
Signed-off-by: Igor Mammedov
Reviewed-by: Peter Xu
Reviewed-by: Jason J
as a step towards lock-less HPET counter read,
use per device locking instead of BQL.
Signed-off-by: Igor Mammedov
Reviewed-by: Peter Xu
---
hw/timer/hpet.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index cb48cc151f..ab5aa59ae4 100644
--- a/hw
Follow up patche will switch main counter read to
lock-less mode. As preparation for that move relevant
branch into a separate top level block to make followup
patch cleaner/simplier by reducing contextual noise
when lock-less read is introduced.
no functional changes.
Signed-off-by: Igor
2-1min.
Signed-off-by: Igor Mammedov
Reviewed-by: Peter Xu
Acked-by: Michael S. Tsirkin
---
hw/acpi/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index 58f8964e13..ff16582803 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -547,6 +547,7 @@ void
Make access to main HPET counter lock-less.
In unlikely event of an update in progress, readers will busy wait
untill update is finished.
As result micro benchmark of concurrent reading of HPET counter
with large number of vCPU shows over 80% better (less) latency.
Signed-off-by: Igor Mammedov
the helpers form load-acquire/store-release pair and use them to replace
open-coded checkers/setters consistently across the code, which
ensures that appropriate barriers are in place in case checks happen
outside of BQL.
Signed-off-by: Igor Mammedov
---
v4:
add cpu_set_interrupt() and merge
Windows to boot succesfully (in case hv-time isn't used)
when more than 255 vCPUs are in use.
Signed-off-by: Igor Mammedov
Reviewed-by: Peter Xu
---
v3:
* drop net needed pair of () in cpu->interrupt_request & CPU_INTERRUPT_HARD
check
* Paolo Bonzini
* don't take B
CPU_INTERRUPT_SSTEP_MASK
masking into the block where it actually matters and drop reloading cached value
from CPUState:interrupt_request as the rest of the code directly uses
CPUState:interrupt_request.
Signed-off-by: Igor Mammedov
---
accel/tcg/cpu-exec.c | 15 ++-
1 file changed, 6 insertions(+), 9
gions)
... de7ea885c539 (kvm: Switch to unlocked MMIO)
Signed-off-by: Igor Mammedov
Reviewed-by: Peter Xu
---
v4:
improove doc comment over memory_region_enable_lockless_io()
David Hildenbrand
v3:
add comment for 'mr->disable_reentrancy_guard = true'
Peter Xu
---
include/sy
nzini
CC: Peter Xu
CC: "Michael S. Tsirkin"
CC: mtosa...@redhat.com
Igor Mammedov (8):
memory: reintroduce BQL-free fine-grained PIO/MMIO
acpi: mark PMTIMER as unlocked
hpet: switch to fain-grained device locking
hpet: move out main counter read into a separate block
hpet: make main c
On Mon, 11 Aug 2025 12:31:27 -0400
Peter Xu wrote:
> On Fri, Aug 08, 2025 at 02:01:33PM +0200, Igor Mammedov wrote:
> > the helper forms load-acquire/store-release pair with
> > tcg_handle_interrupt/generic_handle_interrupt and can be used
> > for checking inte
On Fri, 8 Aug 2025 17:24:54 +0200
David Hildenbrand wrote:
> On 08.08.25 16:36, Igor Mammedov wrote:
> > On Fri, 8 Aug 2025 14:12:54 +0200
> > David Hildenbrand wrote:
> >
> >> On 08.08.25 14:01, Igor Mammedov wrote:
> >>> This patch brings
On Tue, 3 Jun 2025 15:22:27 -0400
Annie Li wrote:
> Hi Igor,
>
> On 6/3/2025 9:03 AM, Igor Mammedov wrote:
> > On Wed, 28 May 2025 12:42:03 -0400
> > Annie Li wrote:
> >
> >> The function qemu_wakeup_suspend_enabled combines the suspend
> >> and
On Tue, 3 Jun 2025 15:08:49 -0400
Annie Li wrote:
> Hello Igor,
>
> On 6/3/2025 8:31 AM, Igor Mammedov wrote:
> > On Wed, 28 May 2025 12:38:34 -0400
> > Annie Li wrote:
> >
> >> The fixed hardware sleep button isn't appropriate for hardware
> &g
On Fri, 8 Aug 2025 14:12:54 +0200
David Hildenbrand wrote:
> On 08.08.25 14:01, Igor Mammedov wrote:
> > This patch brings back Jan's idea [1] of BQL-free IO access
> >
> > This will let us make access to ACPI PM/HPET timers cheaper,
> > and prevent BQL con
replace open coded checks for if interrupt is set with cpu_test_interrupt()
helper. It ensures that proper barriers are in place in case checks happen
outside of BQL and also makes checks more consistent/easier to read/find.
Signed-off-by: Igor Mammedov
---
accel/tcg/cpu-exec.c
Make access to main HPET counter lock-less.
In unlikely event of an update in progress, readers will busy wait
untill update is finished.
As result micro benchmark of concurrent reading of HPET counter
with large number of vCPU shows over 80% better (less) latency.
Signed-off-by: Igor Mammedov
the helper forms load-acquire/store-release pair with
tcg_handle_interrupt/generic_handle_interrupt and can be used
for checking interrupts outside of BQL
Signed-off-by: Igor Mammedov
---
include/hw/core/cpu.h | 12
accel/tcg/tcg-accel-ops.c | 3 ++-
system/cpus.c
Follow up patche will switch main counter read to
lock-less mode. As preparation for that move relevant
branch into a separate top level block to make followup
patch cleaner/simplier by reducing contextual noise
when lock-less read is introduced.
no functional changes.
Signed-off-by: Igor
Windows to boot succesfully (in case hv-time isn't used)
when more than 255 vCPUs are in use.
Signed-off-by: Igor Mammedov
---
v3:
* drop net needed pair of () in cpu->interrupt_request & CPU_INTERRUPT_HARD
check
* Paolo Bonzini
* don't take BQL when setting exit_r
gions)
... de7ea885c539 (kvm: Switch to unlocked MMIO)
Signed-off-by: Igor Mammedov
---
v3:
add comment for 'mr->disable_reentrancy_guard = true'
Peter Xu
---
include/system/memory.h | 10 ++
system/memory.c | 15 +++
system/physmem.c| 2 +-
3
on top of that cpu_test_interrupt() uses barrier to ensure proper order
when interrupts are set from outside of vcpu thread.
Signed-off-by: Igor Mammedov
---
target/i386/kvm/kvm.c | 34 +-
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/target
CPU_INTERRUPT_SSTEP_MASK
masking into the block where it actually matters and drop reloading cached value
from CPUState:interrupt_request as the rest of the code directly uses
CPUState:interrupt_request.
Signed-off-by: Igor Mammedov
---
accel/tcg/cpu-exec.c | 15 ++-
1 file changed, 6 insertions(+), 9
2-1min.
Signed-off-by: Igor Mammedov
---
hw/acpi/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index 58f8964e13..ff16582803 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -547,6 +547,7 @@ void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn
ck or even with
the same qemu/seabios as reported (kernel versions mentioned in
the report were interim ones and no longer available,
so I've used nearest released at the time for testing)
Igor Mammedov (10):
memory: reintroduce BQL-free fine-grained PIO/MMIO
acpi: mark PMTIMER as
as a step towards lock-less HPET counter read,
use per device locking instead of BQL.
Signed-off-by: Igor Mammedov
---
hw/timer/hpet.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index cb48cc151f..ab5aa59ae4 100644
--- a/hw/timer/hpet.c
+++ b/hw
> can do it separately.
Thanks,
I'll respin this with minimal changes for this series
and post another one on top with tree wide refactoring as suggested
>
> On 7/30/25 14:39, Igor Mammedov wrote:
> > if (cpu->interrupt_request & (CPU_INTERRUPT_INIT | CPU
On Wed, 30 Jul 2025 17:47:52 -0400
Peter Xu wrote:
> On Wed, Jul 30, 2025 at 02:39:29PM +0200, Igor Mammedov wrote:
> > diff --git a/system/memory.c b/system/memory.c
> > index 5646547940..9a5a262112 100644
> > --- a/system/memory.c
> > +++ b/system/memory.c
>
00 acpi=off"
> > > > -initrd ./initrd.img-6.1.0-13-arm64 \
> > > > -nographic \
> > > > -serial mon:stdio
> > > >
> > > > Signed-off-by: Manos Pitsidianakis
> > >
> > > +CC shameer who might be able to remem
On Thu, 31 Jul 2025 15:24:59 -0400
Peter Xu wrote:
> On Wed, Jul 30, 2025 at 02:39:34PM +0200, Igor Mammedov wrote:
> > when kernel-irqchip=split is used, QEMU still hits BQL
> > contention issue when reading ACPI PM/HPET timers
> > (despite of timer[s] access being lo
On Thu, 31 Jul 2025 10:02:06 -0400
Peter Xu wrote:
> On Thu, Jul 31, 2025 at 10:32:10AM +0200, Igor Mammedov wrote:
> > On Wed, 30 Jul 2025 18:15:03 -0400
> > Peter Xu wrote:
> >
> > > On Wed, Jul 30, 2025 at 02:39:33PM +0200, Igor Mammedov wrote:
> >
On Wed, 30 Jul 2025 18:15:03 -0400
Peter Xu wrote:
> On Wed, Jul 30, 2025 at 02:39:33PM +0200, Igor Mammedov wrote:
> > Make access to main HPET counter lock-less when enable/disable
> > state isn't changing (which is the most of the time).
> >
> > A read will
On Wed, 30 Jul 2025 17:47:52 -0400
Peter Xu wrote:
> On Wed, Jul 30, 2025 at 02:39:29PM +0200, Igor Mammedov wrote:
> > diff --git a/system/memory.c b/system/memory.c
> > index 5646547940..9a5a262112 100644
> > --- a/system/memory.c
> > +++ b/system/memory.c
>
gions)
... de7ea885c539 (kvm: Switch to unlocked MMIO)
Signed-off-by: Igor Mammedov
---
include/system/memory.h | 10 ++
system/memory.c | 6 ++
system/physmem.c| 2 +-
3 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/include/system/memory.h b/include/s
ch as cpu_get_clock(),
modulo instead of busy wait it piggibacks to taking device lock
to wait until HPET reaches consistent state.
As result micro benchmark of concurrent reading of HPET counter
with large number of vCPU shows over 80% better (less) latency.
Signed-off-by: Igor Mammedov
---
hw/
2-1min.
Signed-off-by: Igor Mammedov
---
hw/acpi/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index 58f8964e13..ff16582803 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -547,6 +547,7 @@ void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn
ng BQL only when is necessary, eleminates BQL bottleneck on
IO/MMIO only exit path, improoving latency by 80% on HPET micro
benchmark.
This lets Windows to boot succesfully (in case hv-time isn't used)
when more than 255 vCPUs are in use.
Signed-off-by: Igor Mammedov
---
targe
as a step towards lock-less HPET counter read,
use per device locking instead of BQL.
Signed-off-by: Igor Mammedov
---
hw/timer/hpet.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index cb48cc151f..ab5aa59ae4 100644
--- a/hw/timer/hpet.c
+++ b/hw
Follow up patche will switch main counter read to
lock-less mode. As preparation for that move relevant
branch into a separate top level block to make followup
patch cleaner/simplier by reducing contextual noise
when lock-less read is introduced.
no functional changes.
Signed-off-by: Igor
e,
so I've used nearest released at the time for testing)
Igor Mammedov (6):
memory: reintroduce BQL-free fine-grained PIO/MMIO
acpi: mark PMTIMER as unlocked
hpet: switch to fain-grained device locking
hpet: move out main counter read into a separate block
hpet: make main counter
g it to make it usable on ARM. The DSDT table is
> augmented to support ACPI PCI hotplug elements.
>
> On ARM we use use a GED event to notify the OS about
> hotplug events.
Reviewed-by: Igor Mammedov
>
> Best Regards
>
> Eric
>
> This series can be found at:
On Tue, 8 Jul 2025 16:23:16 +0200
Eric Auger wrote:
> From: Gustavo Romero
>
> Add 2 new tests:
> - test_acpi_aarch64_virt_acpi_pci_hotplug tests the acpi pci hotplug
> using -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on
> - test_acpi_aarch64_virt_pcie_root_port_hpoff tests static
On Tue, 8 Jul 2025 16:23:03 +0200
Eric Auger wrote:
> hw/arm/virt-acpi-build: Let non hotplug ports support static acpi-index
>
> Add the requested ACPI bits requested to support static acpi-index
> for non hotplug ports.
>
> Signed-off-by: Eric Auger
> Reviewed-by: Jonathan Cameron
> ---
>
On Tue, 8 Jul 2025 16:23:00 +0200
Eric Auger wrote:
> Signed-off-by: Eric Auger
> Reviewed-by: Jonathan Cameron
I'd merge this with previous patch
> ---
> tests/qtest/bios-tables-test.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/b
On Tue, 1 Jul 2025 16:01:21 -0400
Konrad Rzeszutek Wilk wrote:
> On Tue, Jul 01, 2025 at 03:05:00PM +0200, Igor Mammedov wrote:
> > On Tue, 1 Jul 2025 20:36:43 +0800
> > Zhao Liu wrote:
> >
> > > On Tue, Jul 01, 2025 at 07:12:44PM +0800, Xiaoyao Li wrote:
&g
On Mon, 30 Jun 2025 12:02:25 +0200
Gerd Hoffmann wrote:
> Hi,
>
> > As you've said in comment
> > https://bugzilla.redhat.com/show_bug.cgi?id=1322713#c6
> > it's strange that patch causes issues at all, especially with
> > '-smp 1' as in reproducer.
> >
> > Also repeated with -smp x>1, it sti
On Tue, 1 Jul 2025 20:36:43 +0800
Zhao Liu wrote:
> On Tue, Jul 01, 2025 at 07:12:44PM +0800, Xiaoyao Li wrote:
> > Date: Tue, 1 Jul 2025 19:12:44 +0800
> > From: Xiaoyao Li
> > Subject: Re: [PATCH] i386/cpu: ARCH_CAPABILITIES should not be advertised
> > on AMD
> >
> > On 7/1/2025 6:26 PM, Zh
On Tue, 24 Jun 2025 12:45:27 +0200
Igor Mammedov wrote:
> On Tue, 24 Jun 2025 09:07:11 +0200
> Gerd Hoffmann wrote:
>
> > Hi,
> >
> > > Gerd mentioned this in the relevant bz:
> > >
> > > Note: root cause for the i
On Thu, 5 Jun 2025 10:24:34 +0100
Daniel P. Berrangé wrote:
> On Tue, Jun 03, 2025 at 05:02:38PM +0200, Igor Mammedov wrote:
> > On Wed, 28 May 2025 13:23:49 +0800
> > Zhao Liu wrote:
> >
> > > On Wed, May 28, 2025 at 10:09:56AM +0800, Xiaoyao Li wrote:
> &
On Fri, 20 Jun 2025 18:01:08 +0100
Peter Maydell wrote:
> On Fri, 20 Jun 2025 at 16:15, Igor Mammedov wrote:
> >
> > Reading QEMU_CLOCK_VIRTUAL is thread-safe.
> >
> > with CLI
> > -M q35,hpet=on -cpu host -enable-kvm -smp 240,sockets=4
> > patch makes W
On Tue, 24 Jun 2025 09:07:11 +0200
Gerd Hoffmann wrote:
> Hi,
>
> > Gerd mentioned this in the relevant bz:
> >
> > Note: root cause for the initrd issue noted in comment 5 is seabios
> > running into problems with ehci -> io errors -> corrupted initrd.
> > Sometimes i
On Mon, 23 Jun 2025 09:36:05 -0400
Peter Xu wrote:
> On Mon, Jun 23, 2025 at 02:51:46PM +0200, Igor Mammedov wrote:
> > On Fri, 20 Jun 2025 12:53:06 -0400
> > Peter Xu wrote:
> >
> > > On Fri, Jun 20, 2025 at 05:14:16PM +0200, Igor Mammedov wrote:
> > &
On Fri, 20 Jun 2025 12:53:06 -0400
Peter Xu wrote:
> On Fri, Jun 20, 2025 at 05:14:16PM +0200, Igor Mammedov wrote:
> > This patch brings back Jan's idea [1] of BQL-free IO access,
> > with a twist that whitelist read access only.
> >
> > (as BQL-free write acces
property to memory regions)
... de7ea885c539 (kvm: Switch to unlocked MMIO)
3) https://bugzilla.redhat.com/show_bug.cgi?id=1322713
1beb99f787 (Revert "acpi: mark PMTIMER as unlocked")
Igor Mammedov (3):
memory: reintroduce BQL-free fine-grained PIO/MMIO
acpi: mark PMTIMER as unlock
CDW3 = CTRL /* \_SB_.PCI0.CTRL */
> -Return (Arg3)
> +CDW3 = Local0
> }
> Else
> {
> CDW1 |= 0x04
> - Return (Arg3)
>
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