e contributor entries
>
> .mailmap | 8 ++++
> 1 file changed, 8 insertions(+)
>
> --
> 2.26.2
Acked-by: Erik Smit
On Tue, Aug 25, 2020, 4:33 PM Peter Maydell
wrote:
> On Wed, 19 Aug 2020 at 11:10, Cédric Le Goater wrote:
> >
> > From: erik-smit
> >
> > The BMC Firmware can be downloaded from :
> >
> > https://www.supermicro.com/en/products/motherboard/X1
Hey Cédric,
On Wed, 15 Jul 2020 at 15:07, Cédric Le Goater wrote:
> > Signed-off-by: erik-smit
> > --
> > checkpatch was complaining about the length of
> > aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc, void *data)
>
> in which way ? line too long ?
Signed-off-by: erik-smit
---
Changed in v2:
- matched aspeed_machine_supermicrox11_bmc_class_init function name to
machine name
hw/arm/aspeed.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 379f9672a5
Signed-off-by: erik-smit
--
checkpatch was complaining about the length of
aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc, void *data)
so I renamed it to aspeed_machine_smx11_bmc_class_init. Not sure if
that's the right way to go, since then it's out of sync with the ma
On Mon, 13 Jul 2020 at 10:37, Cédric Le Goater wrote:
> On 7/13/20 10:06 AM, Erik Smit wrote:
> > On Mon, 13 Jul 2020 at 09:52, Cédric Le Goater wrote:
> >>
> >> With this patch, the supermicro firmware boots further but there is still
> >> an issue. It might
ata[i] = s->pi->id[i % s->pi->id_len];
}
s->len = SPI_NOR_MAX_ID_LEN;
--
Best Regards,
Erik Smit
Hi Andrew,
On Mon, 6 Jul 2020 at 03:59, Andrew Jeffery wrote:
> On Sun, 28 Jun 2020, at 23:56, erik-smit wrote:
> > The test of the write of the dblac register was testing the old value
> > instead of the new value. This would accept the write of an invalid value
> > but su
The test of the write of the dblac register was testing the old value
instead of the new value. This would accept the write of an invalid value
but subsequently refuse any following valid writes.
Signed-off-by: erik-smit
---
Changes since v1:
Changed %ld to HWADDR_PRIx to fix building on mingw
The test of the write of the dblac register was testing the old value
instead of the new value. This would accept the write of an invalid value
but subsequently refuse any following valid writes.
Signed-off-by: erik-smit
---
hw/net/ftgmac100.c | 12 ++--
1 file changed, 6 insertions
gister for validness
Signed-off-by: Erik Smit
---
hw/net/ftgmac100.c | 26 --
1 file changed, 24 insertions(+), 2 deletions(-)
diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c
index 25ebee7ec2..83058497c4 100644
--- a/hw/net/ftgmac100.c
+++ b/hw/net/ftgmac100.c
@@ -79,
On Wed, 3 Jun 2020 at 10:16, Cédric Le Goater wrote:
>
> On 6/2/20 6:47 PM, Erik Smit wrote:
> > The hardware supports variable descriptor sizes, configured with the DBLAC
> > register.
>
> yes.
>
> The DBLAC default value is 0x00022F00 on AST2400 and 0x00022500
descs */
FTGMAC100_DBLAC_TXDES_SIZE(2) | /* 2*8 bytes TX descs */
Without this patch, networking in SMT_X11_158 does not pass data.
Signed-off-by: Erik Smit
---
hw/net/ftgmac100.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c
index 25ebe
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