Re: [PATCH 1/5] hw/gpio: Add property for ASPEED GPIO in 32 bits basis

2025-09-12 Thread Coco Li
simulation, and also helps with accessing advanced gpio features, see the sgpio implementation later in this patch series. Best, Coco On Tue, Sep 9, 2025 at 8:52 PM Andrew Jeffery wrote: > On Wed, 2025-09-03 at 21:38 +0000, Coco Li wrote: > > From: Felix Wu > > > > Added 32 bit

[PATCH 4/5] hw/gpio/npcm8xx: Implement SIOX (SPGIO) device for NPCM without input pin logic

2025-09-06 Thread Coco Li
Signed-off-by: Coco Li Reviewed-by: Hao Wu --- hw/arm/npcm8xx.c | 23 +- hw/gpio/meson.build | 1 + hw/gpio/npcm8xx_sgpio.c | 425 +++ hw/gpio/trace-events | 4 + include/hw/arm/npcm8xx.h | 2 + include

[PATCH 5/5] hw/gpio/npcm8xx: Implement npcm sgpio device input pin logic

2025-09-04 Thread Coco Li
Signed-off-by: Coco Li Reviewed-by: Hao Wu --- hw/gpio/npcm8xx_sgpio.c | 134 --- include/hw/gpio/npcm8xx_sgpio.h | 4 +- tests/qtest/npcm8xx_sgpio-test.c | 180 ++- 3 files changed, 274 insertions(+), 44 deletions(-) diff --git a/hw

[PATCH 2/5] tests/qtest: Add qtest for for ASPEED GPIO gpio-set property

2025-09-04 Thread Coco Li
From: Felix Wu - Added qtests to test gpio-set property for ASPEED. - Added function to get uint in qdict. Signed-off-by: Felix Wu --- include/qobject/qdict.h| 1 + qobject/qdict.c| 13 tests/qtest/aspeed_gpio-test.c | 105 ++--- 3

[PATCH 3/5] hw/arm/npcm8xx.c: Add all IRQ ENUMs

2025-09-03 Thread Coco Li
In the process of implementing serial gpio and adding the corresponding ENUMs, also complete the list for npcm8xx. Signed-off-by: Coco Li Reviewed-by: Hao Wu --- hw/arm/npcm8xx.c | 43 ++- 1 file changed, 42 insertions(+), 1 deletion(-) diff --git a/hw

[PATCH 1/5] hw/gpio: Add property for ASPEED GPIO in 32 bits basis

2025-09-03 Thread Coco Li
From: Felix Wu Added 32 bits property for ASPEED GPIO. Previously it can only be access in bitwise manner. This change gives ASPEED similar behavior as Nuvoton. Signed-off-by: Felix Wu --- hw/gpio/aspeed_gpio.c | 57 +++ 1 file changed, 57 insertions(+

[PATCH 0/5] Add Aspeed GPIO test and Support Nuvoton Serial GPIO Expansion (SGPIO) device

2025-09-03 Thread Coco Li
controlled SIOX via register IOXDATR 2. On-demand with polling reading node The reason is that both are currently unused/umimplemented by the nuvoton driver. The changes to qobject is used in both sets of patches. Coco Li (3): hw/arm/npcm8xx.c: Add all IRQ ENUMs hw/gpio/npcm8xx: Implement SIOX