Re: [Qemu-devel] [PATCH V2] support access to more performance registers in AA64 mode

2014-12-08 Thread Chengyu Song
Hello Peter, > Thanks for sending this patch. I've provided some detailed > review below -- there are quite a lot of comments but the > fixes needed are all very minor. I'm not very familiar with the CP emulation, especially the NO_MIGRATE flag, so thank you very much for the comment. > In this

Re: [Qemu-devel] [PATCH] ARM64: support access to more performance registers in AA64 mode

2014-12-06 Thread Chengyu Song
Hello Christopher, >> Again, should .type = ARM_CP_NO_MIGRATE be used as this shares a variable >> with >> PMUSERENR? > I went back and re-read the code and the manual, but I'm not sure if PMUSERENR should be NO_MIGRATE or not. It's only been read/written with this register, but it also contr

Re: [Qemu-devel] [PATCH] ARM64: support access to more performance registers in AA64 mode

2014-12-06 Thread Chengyu Song
Hello Peter, Sorry for replying late. > We're up to rev A.d now; you can get it from > http://infocenter.arm.com/help/topic/com.arm.doc.ddi0487a.d/index.html > (if you haven't registered on the ARM website before you'll need > to fill in a form but it's a fairly painless process.) Thank you for

[Qemu-devel] [PATCH V2] support access to more performance registers in AA64 mode

2014-12-06 Thread Chengyu Song
also added two AA32 registers: /* ARMv8 manual rev A.d, G6.4.13 */ PMCCFILTR /* ARMv8 manual rev A.d, G6.4.13 */ PMOVSSET Finally, it also fixed ARM_CP_NO_MIGRATE for some registers. Signed-off-by: Chengyu Song --- target-arm/helper.c | 70

Re: [Qemu-devel] [PATCH] ARM64: support access to more performance registers in AA64 mode

2014-12-03 Thread Chengyu Song
Hi Christopher, > On Dec 3, 2014, at 3:25 PM, Christopher Covington wrote: > On 12/03/2014 02:12 AM, Chengyu Song wrote: >> In AA64 mode, certain system registers are access through MSR/MRS >> instructions instead of MCR/MRC. This patch added more such registers: > > I

[Qemu-devel] [PATCH] ARM64: support access to more performance registers in AA64 mode

2014-12-03 Thread Chengyu Song
*/ PMSELR_EL0 /* ARMv8 manual, D8.4.15 */ PMSWINC_EL0 /* ARMv8 manual, D8.4.16 */ PMUSERENR_EL0 /* ARMv8 manual, D8.4.17 */ PMXEVCNTR_EL0 /* ARMv8 manual, D8.4.18 */ PMXEVTYPER_EL0 Signed-off-by: Chengyu Song --- target-arm/helper.c | 40 1 file changed