Hello Stafford,
On 03.12.24 12:15, Stafford Horne wrote:
> From: Ahmad Fatoum
> [1]:
> https://lore.barebox.org/barebox/707e7c50-aad1-4459-8796-0cc54bab3...@pengutronix.de/T/#m5da26e8a799033301489a938b5d5667b81cef6ad
>
> Fixes: 84bda468 ("hw/openrisc: support 4 ser
c-related development and not only
for the kernel?
> On Thu, Aug 22, 2024 at 06:38:38PM +0200, Ahmad Fatoum wrote:
>> We used to only have a single UART on the platform and it was located at
>> address 0x9000. When the number of UARTs was increased to 4, the
>> first UART remaine
We used to only have a single UART on the platform and it was located at
address 0x9000. When the number of UARTs was increased to 4, the
first UART remained at its location, but instead of being the first one
to be registered, it became the last.
This caused QEMU to pick 0x9300 as the def
