Re: [PATCH] ui/sdl2: fix reset scaling binding to be consistent with gtk

On 10/09/2025 13.49, Nir Lichtman wrote: Problem: Currently the reset scaling hotkey is inconsistent between SDL and GTK graphics modes. Solution: Fix SDL to use MOD+0 instead of MOD+u which is in line with GTK and generally more consistent with other apps. This is also related to my previously

Re: [PATCH v3] migration/qemu-file: don't make incoming fds blocking again

On 10.09.25 19:47, Peter Xu wrote: On Wed, Sep 10, 2025 at 05:31:56PM +0300, Vladimir Sementsov-Ogievskiy wrote: In migration we want to pass fd "as is", not changing its blocking status. The only current user of these fds is CPR state (through VMSTATE_FD), which of-course doesn't want to modif

[PATCH v14 21/27] migration: push Error **errp into loadvm_process_enable_colo()

This is an incremental step in converting vmstate loading code to report error via Error objects instead of directly printing it to console/monitor. It is ensured that loadvm_process_enable_colo() must report an error in errp, in case of failure. Reviewed-by: Fabiano Rosas Reviewed-by: Marc-André

Re: [PATCH v6 00/25] tcg-plugins: add hooks for discontinuities

On Wed, 10 Sep 2025, Alex Bennée wrote: "Julian Ganz" writes: September 10, 2025 at 12:06 PM, "BALATON Zoltan" wrote: On Tue, 9 Sep 2025, Julian Ganz wrote: I ran streamPPCpowerpcO3 on qemu with these patches: - Function Best Rate

[PATCH v4 06/14] hw/pci-host/aspeed: Add MSI support and per-RC IOMMU address space

Add MSI support to the ASPEED PCIe RC/Config model and introduce a per-RC "IOMMU root" address space to correctly route MSI writes. On AST2700 all RCs use the same MSI address, and the MSI target is PCI system memory (not normal DRAM). If the MSI window were mapped into real system RAM, an endpoin

RE: [SPAM] [PATCH v3 00/14] Support PCIe RC to AST2600 and AST2700

Hi Cédric > Subject: Re: [SPAM] [PATCH v3 00/14] Support PCIe RC to AST2600 and > AST2700 > > On 9/18/25 11:08, Jamin Lin wrote: > > Hi Cédric > > > >> Subject: Re: [SPAM] [PATCH v3 00/14] Support PCIe RC to AST2600 and > >> AST2700 > >> > >> Hell Jamin, > >> > >> On 9/18/25 05:13, Jamin Lin wrot

[PATCH v4 11/14] hw/pci-host/aspeed: Disable Root Device and place Root Port at 00:00.0 to AST2700

AST2700 does not implement a PCIe Root Device; each RC exposes a single PCIe Root Port at devfn 0:0.0. Signed-off-by: Jamin Lin --- hw/pci-host/aspeed_pcie.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/pci-host/aspeed_pcie.c b/hw/pci-host/aspeed_pcie.c index a757fd7ec8..f7593444fc 1

[PATCH v4 09/14] hw/pci-host/aspeed: Add AST2700 PCIe PHY

Introduce a PCIe Host Controller PHY model for AST2700. This adds an AST2700 specific PHY type (TYPE_ASPEED_2700_PCIE_PHY) with a 0x800 byte register space and link-status bits compatible with the firmware’s expectations. AST2700 provides three PCIe RCs; PCIe0 and PCIe1 are GEN4, PCIe2 is GEN2. Th

[PATCH v4 14/14] tests/functional/aarch64/aspeed_ast2700: Add PCIe and network tests

Extend the AST2700 and AST2700fc functional tests with PCIe and network checks. This patch introduces a helper "do_ast2700_pcie_test()" that runs "lspci" on the emulated system and verifies the expected PCIe devices: - 0002:00:00.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge - 0

[PATCH v14 26/27] migration: Add error-parameterized function variants in VMSD struct

- We need to have good error reporting in the callbacks in VMStateDescription struct. Specifically pre_save, pre_load and post_load callbacks. - It is not possible to change these functions everywhere in one patch, therefore, we introduce a duplicate set of callbacks with Error object passe

[PATCH v14 18/27] migration: push Error **errp into loadvm_postcopy_ram_handle_discard()

This is an incremental step in converting vmstate loading code to report error via Error objects instead of directly printing it to console/monitor. It is ensured that loadvm_postcopy_ram_handle_discard() must report an error in errp, in case of failure. Reviewed-by: Fabiano Rosas Reviewed-by: Ma

[PATCH v14 20/27] migration: Return -1 on memory allocation failure in ram.c

The function colo_init_ram_cache() currently returns -errno if qemu_anon_ram_alloc() fails. However, the subsequent cleanup loop that calls qemu_anon_ram_free() could potentially alter the value of errno. This would cause the function to return a value that does not accurately represent the origina

[PATCH v4 07/14] hw/arm/aspeed: Wire up PCIe devices in SoC model

Add PCIe controller and PHY instances to the Aspeed SoC state and device enum. This prepares the SoC model to host PCIe Root Complexes and their associated PHYs. Although the AST2600 supports only a single Root Complex, the AST2700 provides three Root Complexes. For this reason, the model defines

[PATCH v14 25/27] migration: Rename post_save() to cleanup_save() and make it void

The post_save() function call is responsible for cleaning up resources after the device state has been saved. Currently it is infallible, and does not return an error. It is called regardless of whether there is a preceding error from save or subsection save. That is, save and post_save() together

[PATCH v4 10/14] hw/pci-host/aspeed: Add AST2700 PCIe config with dedicated H2X blocks

Introduce PCIe config (H2X) support for the AST2700 SoC. Unlike the AST2600, the AST2700 provides three independent Root Complexes, each with its own H2X (AHB to PCIe bridge) register block of size 0x100. All RCs use the same MSI address (0x00F0). The H2X block includes two different access pa

[PATCH v4 01/14] hw/pci/pci_ids: Add PCI vendor ID for ASPEED

Signed-off-by: Jamin Lin Reviewed-by: Cédric Le Goater --- include/hw/pci/pci_ids.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h index 33e2898be9..16034aaa2c 100644 --- a/include/hw/pci/pci_ids.h +++ b/include/hw/pci/pci_ids.h @@ -291,

[PATCH v4 12/14] hw/arm/aspeed_ast27x0: Introduce 3 PCIe RCs for AST2700

Add PCIe Root Complex support to the AST2700 SoC model. The AST2700 A1 silicon revision provides three PCIe Root Complexes: PCIe0 with its PHY at 0x12C15000, config (H2X) block at 0x120E, MMIO window at 0x6000, and GIC IRQ 56. PCIe1 with its PHY at 0x12C15800, config (H2X) block at 0x120

[PATCH v4 05/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Port and make address configurable

Introduce an ASPEED PCIe Root Port and wire it under the RC. The root port is modeled as TYPE_ASPEED_PCIE_ROOT_PORT (subclass of TYPE_PCIE_ROOT_PORT). Key changes: - Add TYPE_ASPEED_PCIE_ROOT_PORT (PCIESlot-based) with vendor/device IDs and AER capability offset. - Extend AspeedPCIERcState to em

[PATCH v4 02/14] hw/pci-host/aspeed: Add AST2600 PCIe PHY model

This patch introduces an initial ASPEED PCIe PHY/host controller model to support the AST2600 SoC. It provides a simple register block with MMIO read/write callbacks, integration into the build system, and trace events for debugging. Key changes: 1. PCIe PHY MMIO read/write callbacks Implement

[PATCH v4 13/14] tests/functional/arm/test_aspeed_ast2600: Add PCIe and network test

Extend the AST2600 functional tests with PCIe and network checks. This patch introduces a new helper "do_ast2600_pcie_test()" that runs "lspci" on the emulated system and verifies the presence of the expected PCIe devices: - 80:00.0 Host bridge: ASPEED Technology, Inc. Device 2600 - 80:08.0 PCI b

[PATCH v4 08/14] hw/arm/aspeed_ast2600: Add PCIe RC support (RC_H only)

Wire up the PCIe Root Complex in the AST2600 SoC model. According to the AST2600 firmware driver, only the RC_H controller is supported. RC_H uses PCIe PHY1 at 0x1e6ed200 and the PCIe config (H2X) register block at 0x1e77. The RC_H MMIO window is mapped at 0x7000–0x8000. RC_L is not mo

[PATCH v4 03/14] hw/pci-host/aspeed: Add AST2600 PCIe config space and host bridge

Introduce PCIe config and host bridge model for the AST2600 platform. This patch adds support for the H2X (AHB to PCIe Bus Bridge) controller with a 0x100 byte register space. The register layout is shared between two root complexes: 0x00–0x7f is common, 0x80–0xbf for RC_L, and 0xc0–0xff for RC_H.

[PATCH v4 00/14] Support PCIe RC to AST2600 and AST2700

v1: 1. Add PCIe PHY, CFG, and MMIO window support for AST2600. Note: Only supports RC_H. 2. Add PCIe PHY, CFG, and MMIO window support for AST2700. Note: Supports 3 RCs. v2: 1. Introduce a new root port device. 2. For AST2600 RC_H, add the root device at 80:00.0 and a root port at 8

[PATCH v4 04/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Device support

Introduce a PCIe Root Device for AST2600 platform. The AST2600 root complex exposes a PCIe root device at bus 80, devfn 0. This root device is implemented as a child of the PCIe RC and modeled as a host bridge PCI function (class_id = PCI_CLASS_BRIDGE_HOST). Key changes: - Add a new device type "

[PATCH v3 3/7] hw/core/register: Do not unparent in instance_finalize()

Children are automatically unparented so manually unparenting is unnecessary. Worse, automatic unparenting happens before the instance_finalize() callback of the parent gets called, so object_unparent() calls in the callback will refer to objects that are already unparented, which is semantically

[PATCH v6 09/22] intel_iommu: Stick to system MR for IOMMUFD backed host device when x-fls=on

When guest enables scalable mode and setup first stage page table, we don't want to use IOMMU MR but rather continue using the system MR for IOMMUFD backed host device. Then default HWPT in VFIO contains GPA->HPA mappings which could be reused as nesting parent HWPT to construct nested HWPT in vIO

[PATCH v5 for v10.0.0 1/2] target/riscv：Set-KVM-initial-privilege-mode and mp_state

For KVM mode, the privilege mode should not include M-mode, and the initial value should be set to S-mode. Additionally,patch 2 adds the implementation of putting the vCPU privilege mode to KVM. When the vCPU runs for the first time, QEMU will first put the privilege state to KVM.If the initial

[PATCH v6 10/14] vhost-backend: implement extended features support

Leverage the kernel extended features manipulation ioctls(), if available, and fallback to old ops otherwise. Error out when setting extended features but kernel support is not available. Note that extended support for get/set backend features is not needed, as the only feature that can be changed

debian guest significant slowdown in aarch64 qemu-user

Hi! A user reported a significant slowdown of an operation which used to work quite a bit faster. This time, however, the regression is not on the qemu side but on the guest OS side (debian bookworm to debian trixie), running in the same qemu-user. It is more, - it doesn't really matter which v

[PATCH 08/14] hw/ide/piix: Do not delete the subregions

It is no longer necessary. Signed-off-by: Akihiko Odaki --- hw/ide/piix.c | 13 - 1 file changed, 13 deletions(-) diff --git a/hw/ide/piix.c b/hw/ide/piix.c index a0f2709c6973..138f8e1936b4 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -166,17 +166,6 @@ static void pci_piix_ide_

[PATCH] .gitlab-ci.d/buildtest.yml: Unset CI_COMMIT_DESCRIPTION for htags

In commit 52a21689cd829 we added a workaround for a bug in older versions of htags where they fail with a weird error message if the environment is too large. However, we missed one variable which gitlab CI can set to the body of the commit message: CI_COMMIT_DESCRIPTION. Add this to the variable

Re: [PATCH] migration: add FEATURE_SEEKABLE to QIOChannelBlock

Hello Fabiano, On Thursday, April 10, 2025 21:52 CEST, Fabiano Rosas wrote: > Marco Cavenati writes: > > > Enable the use of the mapped-ram migration feature with savevm/loadvm > > snapshots by adding the QIO_CHANNEL_FEATURE_SEEKABLE feature to > > QIOChannelBlock. Implement io_preadv and io_p

[PATCH 21/33] rust: split "qom" crate

From: Marc-André Lureau Signed-off-by: Marc-André Lureau Reviewed-by: Zhao Liu Link: https://lore.kernel.org/r/20250827104147.717203-13-marcandre.lur...@redhat.com Signed-off-by: Paolo Bonzini --- MAINTAINERS | 1 + rust/qom/wrapper.h| 27 ++

Re: [PATCH 2/6] tests/functional: convert reverse debug test to local gdb module

Daniel P. Berrangé writes: > This replaces the use of Avocado for the GDBRemote class with > our in-tree copy. > > Signed-off-by: Daniel P. Berrangé Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

[PULL 31/31] vfio/pci.h: rename VFIOPCIDevice pdev field to parent_obj

From: Mark Cave-Ayland Now that nothing accesses the pdev field directly, rename pdev to parent_obj as per our current coding guidelines. Signed-off-by: Mark Cave-Ayland Reviewed-by: Cédric Le Goater Reviewed-by: Steve Sistare Reviewed-by: Philippe Mathieu-Daudé Link: https://lore.kernel.or

[PULL 4/8] tracetool: include SPDX-License-Identifier in generated files

From: Daniel P. Berrangé While these files are auto-generated, a later commit will add reference output to git, so having SPDX-License-Identifier is desirable. Reviewed-by: Philippe Mathieu-Daudé Acked-by: Thomas Huth Reviewed-by: Stefan Hajnoczi Signed-off-by: Daniel P. Berrangé Message-id:

[PATCH 13/14] hw/usb/hcd-ehci: Do not delete the subregions

It is no longer necessary. Signed-off-by: Akihiko Odaki --- hw/usb/hcd-ehci.c | 4 1 file changed, 4 deletions(-) diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index b090f253656b..21c3501455b5 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -2557,10 +2557,6 @@ void usb_ehci_

RE: [PATCH v6 22/22] docs/devel: Add IOMMUFD nesting documentation

Hi Cédric, >-Original Message- >From: Cédric Le Goater >Subject: Re: [PATCH v6 22/22] docs/devel: Add IOMMUFD nesting >documentation > >Hello Zhenzhong > >On 9/18/25 10:58, Zhenzhong Duan wrote: >> Add documentation about using IOMMUFD backed VFIO device with >intel_iommu with >> x-flts=o

[PATCH v3 02/13] char-socket: tcp_chr_recv(): add comment

Add comment, to stress that the order of operation (first drop old fds, second check read status) is intended. Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Daniel P. Berrangé --- chardev/char-socket.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/chardev/

Re: [PATCH REPOST v4 4/4] acpi/virt: suppress UART device & SPCR when guest has no serial hardware

Hi Michael, On Wed, 16 Jul 2025 19:59:14 +0800 Li Chen wrote --- > Hi Michael, > > On Wed, 16 Jul 2025 19:42:42 +0800 Michael S. Tsirkin > wrote --- > > On Wed, Jul 16, 2025 at 07:41:11PM +0800, Li Chen wrote: > > > Hi Michael, > > > > > > Thanks for your kind revi

Re: [PATCH v4 03/27] target/i386/mshv: Add x86 decoder/emu implementation

* Magnus Kulke (magnusku...@linux.microsoft.com) wrote: > The MSHV accelerator requires a x86 decoder/emulator in userland to > emulate MMIO instructions. This change contains the implementations for > the generalized i386 instruction decoder/emulator. > > Signed-off-by: Magnus Kulke Hi Magnus,

Re: [PATCH v4 24/27] qapi/accel: Allow to query mshv capabilities

* Magnus Kulke (magnusku...@linux.microsoft.com) wrote: > From: Praveen K Paladugu > > Allow to query mshv capabilities via query-mshv QMP and info mshv HMP > commands. > > Signed-off-by: Magnus Kulke > --- > hmp-commands-info.hx | 13 + > hw/core/machine-hmp-cmds.c | 15 +++

Re: [PATCH 12/24] target/arm/hvf: Mention hvf_inject_interrupts() must run on vCPU thread

> On 3 Sep 2025, at 12.06, Philippe Mathieu-Daudé wrote: > > Since hvf_inject_interrupts() calls hv_vcpu_set_pending_interrupt(), > which must run on a vCPU, it also must. Mention it. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/arm/hvf/hvf.c | 1 + > 1 file changed, 1 insertion(+)

[PATCH 07/15] system: report device security status in help output

When '-device help' is given, report the security status of each device. Signed-off-by: Daniel P. Berrangé --- system/qdev-monitor.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/system/qdev-monitor.c b/system/qdev-monitor.c index f99907a311..db34b83923 100644 --- a/system/qdev-monit

[PATCH v4 1/8] net/tap: net_init_tap_one(): add return value

To avoid error propagation, let's follow common recommendations in include/qapi/error.h and use return boolean value together with errp. Why do we prefer errp-based functions with return value? In short with additional return value we get: - less code to handle error - don't create and set Error

[PULL 28/31] vfio/igd.c: use QOM casts where appropriate

From: Mark Cave-Ayland Use QOM casts to convert between VFIOPCIDevice and PCIDevice instead of accessing pdev directly. Signed-off-by: Mark Cave-Ayland Reviewed-by: Tomita Moeko Link: https://lore.kernel.org/qemu-devel/20250715093110.107317-20-mark.caveayl...@nutanix.com Signed-off-by: Cédric

Re: [PATCH v3 0/9] virtio-console: notify about the terminal size

On Tue, Sep 09, 2025 at 10:48:31PM +0900, Dominique Martinet wrote: > Filip Hejsek wrote on Mon, Oct 23, 2023 at 05:12:14AM +0200: > > I have found this 3 year old patch adding virtio console resize > > support, which seems to have been forgotten at that time. I would like > > to see this feature m

[RFC PATCH 5/7] target/i386: SEV: Add support for enabling Secure TSC SEV feature

Add support for enabling Secure TSC VMSA SEV feature in SEV-SNP guests through a new "secure-tsc" boolean property on SEV-SNP guest objects. Sample command-line: -machine q35,confidential-guest-support=sev0 \ -object sev-snp-guest,id=sev0,cbitpos=51,reduced-phys-bits=1,secure-tsc=on Co-develo

[PATCH v2 7/8] util: drop qemu_socket_set_block()

Now it's unused. Signed-off-by: Vladimir Sementsov-Ogievskiy --- include/qemu/sockets.h | 1 - util/oslib-posix.c | 6 -- util/oslib-win32.c | 7 --- 3 files changed, 14 deletions(-) diff --git a/include/qemu/sockets.h b/include/qemu/sockets.h index 9512fec514..be351d85f7 100644

Re: [PATCH v5 01/29] Add boot-certs to s390-ccw-virtio machine type option

Zhuoying Cai writes: > Introduce a new `boot-certs` machine type option for the s390-ccw-virtio > machine. This allows users to specify one or more certificate file paths > or directories to be used during secure boot. > > Each entry is specified using the syntax: > boot-certs..path=/path/t

[PULL 0/2] misc patch queue

The following changes since commit 190d5d7fd725ff754f94e8e0cbfb69f279c82b5d: Merge tag 'pull-request-2025-09-09' of https://gitlab.com/thuth/qemu into staging (2025-09-11 12:41:01 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-misc-20250916 for

[PATCH] accel/kvm: Fix kvm_convert_memory calls crossing memory regions

From: Ashish Kalra Page conversion call can span multiple memory regions, potentially resulting in a conversion failure if the memory range being converted extends beyond the boundaries of the referenced memory region. Handle the case of page conversion call straddling across memory regions. Si

Re: [RFC PATCH v3 06/15] hw/arm/smmuv3-accel: Restrict accelerated SMMUv3 to vfio-pci endpoints with iommufd

On Thu, Sep 18, 2025 at 06:31:43AM -0700, Shameer Kolothum wrote: > > > > @@ -37,7 +37,6 @@ typedef struct SMMUS1Hwpt { > > > > > > > > typedef struct SMMUv3AccelDevice { > > > > SMMUDevice sdev; > > > > -AddressSpace as_sysmem; > > > > HostIOMMUDeviceIOMMUFD *idev; > > > > SMM

Re: [PATCH v3 0/2] migration/tls: Graceful shutdowns for main and postcopy channels

On Thu, Sep 18, 2025 at 06:17:37PM -0300, Fabiano Rosas wrote: > > = ABOUT OLD PATCH 2 === > > > > I dropped it for now to unblock almost patch 1, because patch 1 will fix a > > real warning that can be triggered for not only qtest but also normal tls > > postcopy migrat

Re: [PATCH v4 1/3] tests/functional: return output from cmd.py helpers

On Wed, Sep 03, 2025 at 10:19:29PM +0200, John Levon wrote: > Tests might want to look at the whole output from a command execution, > as well as just logging it. Add support for this. > > Signed-off-by: John Levon > --- > tests/functional/qemu_test/cmd.py | 53 +-- >

Re: [PATCH] tests/functional/x86_64: Accept a few locked pages in test_memlock.py

On 16/09/2025 18.55, Richard Henderson wrote: On 9/15/25 22:18, Thomas Huth wrote: On 16/09/2025 03.38, Richard Henderson wrote: On 9/15/25 11:55, Richard Henderson wrote: Startup of libgcrypt locks a small pool of pages -- by default 16k. Testing for zero locked pages is isn't correct, while

Re: [Qemu-devel] [PATCH] vfio/common: Work around kernel overflow bug in DMA unmap

On Thu, Sep 18, 2025 at 10:55:47PM +0200, Cédric Le Goater wrote: > Alex, Peter, > > On 1/10/19 00:10, Alex Williamson wrote: > > A kernel bug was introduced in v4.15 via commit 71a7d3d78e3c which > > adds a test for address space wrap-around in the vfio DMA unmap path. > > Unfortunately due to ov

Re: [PATCH v3 14/14] hw/ppc/prep: Fix non-contiguous IO control bit

On Thu, 18 Sep 2025, Mark Cave-Ayland wrote: On 18/09/2025 19:50, BALATON Zoltan wrote: The bit that is supposed to control if ISA IO ports are accessed with discontiguous addresses was not connected so it did nothing. We can now directly enable or disable the discontiguous region so allow the b

Re: [PATCH v3 13/14] hw/pci-host/raven: Do not map regions in init method

On Thu, 18 Sep 2025, Mark Cave-Ayland wrote: On 18/09/2025 19:50, BALATON Zoltan wrote: Export memory regions as sysbus mmio regions and let the board code map them similar to how it is done in grackle. Signed-off-by: BALATON Zoltan --- hw/pci-host/raven.c | 37 --

RE: [SPAM] [PATCH v2 13/14] tests/functional/arm/test_aspeed_ast2600: add PCIe enumeration test

Hi Cédric > tests/functional/arm/test_aspeed_ast2600: add PCIe enumeration test > > Hi, > > >> I would add '-device e1000e,netdev=net1,bus=pcie.0 -netdev > >> user,id=net1' and check that an IP address is assigned to the interface. > >> > >> > > Thanks for your review and suggestion. > > I will

Re: [PATCH v3 0/2] migration/tls: Graceful shutdowns for main and postcopy channels

Peter Xu writes: > v3: > - Patch 1 > - Update qcrypto_tls_session_read() doc to reflect the new retval [Dan] > - Update commit message to explain the qatomic_read() change [Dan] > - Patch 2 (old) > - Dropped for now, more at the end > > This is v3 of the series. > > Fabiano fixed graceful s

Re: [PATCH] hw/i2c: pca954x: enable vmstate

On Tue, Sep 16, 2025 at 9:59 AM Stevie Alvarez wrote: + CC Corey Minyard for I2C maintainers. > > From: Patrick Venture > > Add missing vmstate support. > > Signed-off-by: Patrick Venture > --- > hw/i2c/i2c_mux_pca954x.c | 14 ++ > 1 file changed, 14 insertions(+) > > diff --git a/h

Re: [PATCH v3 12/14] hw/pci-host/raven: Move bus master address space creation to one place

On Thu, 18 Sep 2025, Mark Cave-Ayland wrote: On 18/09/2025 19:50, BALATON Zoltan wrote: Move the lines related to creating the bus master address space together and reduce the number of memory regions stored in the device state. These are used once to create the address space and can be tracked

[PATCH 0/2] hw/pci-host: fix use-after-free in hppa pci-host devices

This patchset fixes use-after-free bugs which show up if you put some of the hppa pci-host devices through an "init -> deinit" lifecycle, as the device-introspect-test does. The problem in both cases is that we were calling pci_register_root_bus() in instance_init: we should only call this in real

Re: [PATCH v3 11/14] hw/pci-host/raven: Simpify discontiguous IO access

On Thu, 18 Sep 2025, Mark Cave-Ayland wrote: On 18/09/2025 19:50, BALATON Zoltan wrote: PREP allows remapping of the 64k ISA IO addresses from the normal contiguous IO space into a discontiguous 8MB region and can switch between the two modes. We can implement this in a simpler way than is done

Re: [PATCH v3 14/14] hw/ppc/prep: Fix non-contiguous IO control bit

On 18/09/2025 19:50, BALATON Zoltan wrote: The bit that is supposed to control if ISA IO ports are accessed with discontiguous addresses was not connected so it did nothing. We can now directly enable or disable the discontiguous region so allow the bit to function. This did not cause a problem

Re: [PATCH v3 09/14] hw/pci-host/raven: Do not use parent object for mmcfg region

On Thu, 18 Sep 2025, Mark Cave-Ayland wrote: On 18/09/2025 19:50, BALATON Zoltan wrote: The mmcfg field in PCIHostState is only used by raven for the PCI config direct access but is not actually needed as the memory region lifetime can be managed by the object given during init so use that and r

Re: [PATCH v3 13/14] hw/pci-host/raven: Do not map regions in init method

On 18/09/2025 19:50, BALATON Zoltan wrote: Export memory regions as sysbus mmio regions and let the board code map them similar to how it is done in grackle. Signed-off-by: BALATON Zoltan --- hw/pci-host/raven.c | 37 - hw/ppc/prep.c | 11 +-

Re: [PATCH v3 08/14] hw/pci-host/raven: Use correct parameter in direct access ops

On Thu, 18 Sep 2025, Mark Cave-Ayland wrote: On 18/09/2025 19:50, BALATON Zoltan wrote: Instead of passing unneeded enclosing objects to the config direct access ops that only need the bus we can pass that directly thus simplifying the functions. Signed-off-by: BALATON Zoltan Reviewed-by: Phil

Re: [Qemu-devel] [PATCH] vfio/common: Work around kernel overflow bug in DMA unmap

Alex, Peter, On 1/10/19 00:10, Alex Williamson wrote: A kernel bug was introduced in v4.15 via commit 71a7d3d78e3c which adds a test for address space wrap-around in the vfio DMA unmap path. Unfortunately due to overflow, the kernel detects an unmap of the last page in the 64-bit address space a

Re: [PATCH v3 12/14] hw/pci-host/raven: Move bus master address space creation to one place

On 18/09/2025 19:50, BALATON Zoltan wrote: Move the lines related to creating the bus master address space together and reduce the number of memory regions stored in the device state. These are used once to create the address space and can be tracked with their owner object so no need to keep tr

Re: [PATCH v3 05/14] hw/pci-host/raven: Simplify PCI interrupt routing

On Thu, 18 Sep 2025, Mark Cave-Ayland wrote: On 18/09/2025 19:50, BALATON Zoltan wrote: No need to use an or-irq to map interrupt lines to a single IRQ as the PCI code can handle this internally so simplify by dropping the or-irq. Signed-off-by: BALATON Zoltan --- hw/pci-host/raven.c | 39 +

Re: [PATCH v3 11/14] hw/pci-host/raven: Simpify discontiguous IO access

On 18/09/2025 19:50, BALATON Zoltan wrote: PREP allows remapping of the 64k ISA IO addresses from the normal contiguous IO space into a discontiguous 8MB region and can switch between the two modes. We can implement this in a simpler way than is done currently using an io region that forwards ac

[PATCH v3 0/2] migration/tls: Graceful shutdowns for main and postcopy channels

v3: - Patch 1 - Update qcrypto_tls_session_read() doc to reflect the new retval [Dan] - Update commit message to explain the qatomic_read() change [Dan] - Patch 2 (old) - Dropped for now, more at the end This is v3 of the series. Fabiano fixed graceful shutdowns for multifd channels previou

Re: [PATCH v3 01/14] hw/pci-host/raven: Simplify PCI facing part

On Thu, 18 Sep 2025, Mark Cave-Ayland wrote: On 18/09/2025 19:50, BALATON Zoltan wrote: The raven PCI device does not need a state struct as it has no data to store there any more, so we can remove that to simplify code. Signed-off-by: BALATON Zoltan --- hw/pci-host/raven.c | 30 +---

[PULL 2/2] 9pfs: Stop including gstrfuncs.h

From: Peter Foley gstrfuncs.h is not intended to be included directly. In fact this only works because glib.h is already included by osdep.h. Just remove the include. Signed-off-by: Peter Foley Reviewed-by: Richard Henderson Link: https://lore.kernel.org/qemu-devel/20250905-9p-v2-1-2ad319996.

[PATCH v3 1/2] io/crypto: Move tls premature termination handling into QIO layer

QCryptoTLSSession allows TLS premature termination in two cases, one of the case is when the channel shutdown() is invoked on READ side. It's possible the shutdown() happened after the read thread blocked at gnutls_record_recv(). In this case, we should allow the premature termination to happen.

[PATCH v3 2/2] migration: Make migration_has_failed() work even for CANCELLING

No issue I hit, the change is only from code observation when I am looking at a TLS premature termination issue. We set CANCELLED very late, it means migration_has_failed() may not work correctly if it's invoked before updating CANCELLING to CANCELLED. Allow that state will make migration_has_fai

Re: [PATCH v6 06/28] s390x/diag: Refactor address validation check from diag308_parm_check

Reviewed-by: Farhan Ali On 9/17/2025 4:21 PM, Zhuoying Cai wrote: Create a function to validate the address parameter of DIAGNOSE. Refactor the function for reuse in the next patch, which allows address validation in read or write operation of DIAGNOSE. Signed-off-by: Zhuoying Cai --- hw/s

Re: [PATCH v3 09/14] hw/pci-host/raven: Do not use parent object for mmcfg region

On 18/09/2025 19:50, BALATON Zoltan wrote: The mmcfg field in PCIHostState is only used by raven for the PCI config direct access but is not actually needed as the memory region lifetime can be managed by the object given during init so use that and remove the unused field from PCIHostState. Si

Re: [PATCH v3 10/14] hw/pci-host/raven: Fix PCI config direct access region

On 18/09/2025 19:50, BALATON Zoltan wrote: The PCI configuration direct access region occupies 8 MiB at offset 0x80 in PCI IO space so model that accordingly. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daudé --- hw/pci-host/raven.c | 4 ++-- 1 file changed, 2 insertion

[PULL 1/2] 9pfs: Add FreeBSD support

From: Mark Johnston This is largely derived from existing Darwin support. FreeBSD apparently has better support for *at() system calls so doesn't require workarounds for a missing mknodat(). The implementation has a couple of warts however: - The extattr(2) system calls don't support anything a

[PULL 0/2] 9p queue 2025-09-18

The following changes since commit e7c1e8043a69c5a8efa39d4f9d111f7c72c076e6: Merge tag 'pull-loongarch-20250918' of https://github.com/gaosong715/qemu into staging (2025-09-18 07:08:08 -0700) are available in the Git repository at: https://github.com/cschoenebeck/qemu.git ta

Re: [PATCH v3 1/7] docs/devel: Do not unparent in instance_finalize()

On Thu, Sep 18, 2025 at 04:03:49PM -0400, Peter Xu wrote: > On Wed, Sep 17, 2025 at 07:13:26PM +0900, Akihiko Odaki wrote: > > Children are automatically unparented so manually unparenting is > > unnecessary. > > > > Worse, automatic unparenting happens before the instance_finalize() > > callback

Re: [PATCH v6 05/28] s390x/diag: Introduce DIAG 320 for Certificate Store Facility

Reviewed-by: Farhan Ali On 9/17/2025 4:21 PM, Zhuoying Cai wrote: DIAGNOSE 320 is introduced to support Certificate Store (CS) Facility, which includes operations such as query certificate storage information and provide certificates in the certificate store. Currently, only subcode 0 is suppo

Re: [PATCH v3 1/7] docs/devel: Do not unparent in instance_finalize()

On Wed, Sep 17, 2025 at 07:13:26PM +0900, Akihiko Odaki wrote: > Children are automatically unparented so manually unparenting is > unnecessary. > > Worse, automatic unparenting happens before the instance_finalize() > callback of the parent gets called, so object_unparent() calls in > the callbac

Re: [PATCH v3 0/7] Do not unparent in instance_finalize()

On Wed, Sep 17, 2025 at 02:23:35PM +0100, Daniel P. Berrangé wrote: > On Wed, Sep 17, 2025 at 02:17:35PM +0100, Daniel P. Berrangé wrote: > > On Wed, Sep 17, 2025 at 09:24:04PM +0900, Akihiko Odaki wrote: > > > On 2025/09/17 20:57, Daniel P. Berrangé wrote: > > > > On Wed, Sep 17, 2025 at 07:13:25P

Re: [PATCH v3 08/14] hw/pci-host/raven: Use correct parameter in direct access ops

On 18/09/2025 19:50, BALATON Zoltan wrote: Instead of passing unneeded enclosing objects to the config direct access ops that only need the bus we can pass that directly thus simplifying the functions. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daudé --- hw/pci-host/raven.c

Re: [PATCH v6 04/28] hw/s390x/ipl: Create certificate store

<..snip..> diff --git a/hw/s390x/cert-store.h b/hw/s390x/cert-store.h new file mode 100644 index 00..3f76a00277 --- /dev/null +++ b/hw/s390x/cert-store.h @@ -0,0 +1,39 @@ +/* + * S390 certificate store + * + * Copyright 2025 IBM Corp. + * Author(s): Zhuoying Cai + * + * SPDX-License-I

Re: [PATCH v3 07/14] hw/pci-host/raven: Rename direct config access ops

On 18/09/2025 19:50, BALATON Zoltan wrote: Rename memory io ops implementing PCI configuration direct access to mmcfg which describes better what these are for. Signed-off-by: BALATON Zoltan --- hw/pci-host/raven.c | 17 - 1 file changed, 8 insertions(+), 9 deletions(-) dif

Re: [PATCH v3 06/14] hw/pci-host/raven: Simplify direct config access address decoding

On 18/09/2025 19:50, BALATON Zoltan wrote: Use ctz instead of an open coded version and rename function to better show what it does. Signed-off-by: BALATON Zoltan --- hw/pci-host/raven.c | 15 --- 1 file changed, 4 insertions(+), 11 deletions(-) diff --git a/hw/pci-host/raven.c

[PATCH v14 00/27] migration: propagate vTPM errors using Error objects

Hello, Currently, when a migration of a VM with an encrypted vTPM fails on the destination host (e.g., due to a mismatch in secret values), the error message displayed on the source host is generic and unhelpful. For example, a typical error looks like this: "operation failed: job 'migration out'

Re: [PATCH v3 05/14] hw/pci-host/raven: Simplify PCI interrupt routing

On 18/09/2025 19:50, BALATON Zoltan wrote: No need to use an or-irq to map interrupt lines to a single IRQ as the PCI code can handle this internally so simplify by dropping the or-irq. Signed-off-by: BALATON Zoltan --- hw/pci-host/raven.c | 39 +++ hw/pp

Re: [PATCH v3 04/14] hw/pci-host/raven: Simplify PCI bus creation

On 18/09/2025 19:50, BALATON Zoltan wrote: Instead of doing it manually use pci_register_root_bus() to create and register the PCI bus. Signed-off-by: BALATON Zoltan --- hw/pci-host/raven.c | 18 +++--- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/hw/pci-host/r

Re: [PATCH v2] char-pty: add support for the terminal size

I will respond to all messages from this thread at once here. Daniel P. Berrangé wrote: > That we will always pass size info the guest regardless of the backend, > across all ports, changes my view about whether it is reasonable to > enable resize by default given the known Linux guest bug. > > T

[PATCH v3 01/14] hw/pci-host/raven: Simplify PCI facing part

The raven PCI device does not need a state struct as it has no data to store there any more, so we can remove that to simplify code. Signed-off-by: BALATON Zoltan --- hw/pci-host/raven.c | 30 +- 1 file changed, 1 insertion(+), 29 deletions(-) diff --git a/hw/pci-hos

Re: [PATCH v3 03/14] hw/pci-host/raven: Use DEFINE_TYPES macro

On 18/09/2025 19:50, BALATON Zoltan wrote: Convert to using DEFINE_TYPES macro and move raven_pcihost_class_init so methods of each object are grouped together. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daudé --- hw/pci-host/raven.c | 57 +--

Re: [PATCH v3 02/14] hw/pci-host/raven: Simplify host bridge type declaration

On 18/09/2025 19:50, BALATON Zoltan wrote: Use OBJECT_DECLARE_SIMPLE_TYPE macro instead of open coding it. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daudé --- hw/pci-host/raven.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/pci-host/raven.c

Re: [PATCH v3 01/14] hw/pci-host/raven: Simplify PCI facing part

On 18/09/2025 19:50, BALATON Zoltan wrote: The raven PCI device does not need a state struct as it has no data to store there any more, so we can remove that to simplify code. Signed-off-by: BALATON Zoltan --- hw/pci-host/raven.c | 30 +- 1 file changed, 1 insert

[PATCH v3 12/14] hw/pci-host/raven: Move bus master address space creation to one place

Move the lines related to creating the bus master address space together and reduce the number of memory regions stored in the device state. These are used once to create the address space and can be tracked with their owner object so no need to keep track of them in the device state. Keep only the

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