On 2025/05/14 14:05, 'Jason Wang' via devel wrote:
On Sat, May 10, 2025 at 3:24 PM Akihiko Odaki wrote:
virtio_net_pre_load_queues() inspects vdev->guest_features to tell if
VIRTIO_NET_F_RSS or VIRTIO_NET_F_MQ is enabled to infer the required
number of queues. This works for VIRTIO_NET_F_MQ bu
On 5/13/25 18:12, Philippe Mathieu-Daudé wrote:
On 13/5/25 19:03, Richard Henderson wrote:
On 5/13/25 03:41, Philippe Mathieu-Daudé wrote:
+ /* AArch32 does not have FEAT_HADFS */
+ assert(cpu_isar_feature(aa64_hafs, env_archcpu(env)));
Why? This is checked in the setting of param.{ha,
Am 13.05.25 um 08:40 schrieb Michael Tokarev:
> 11.05.2025 10:36, Volker Rümelin wrote:
>> A few audio related fixes for 10.1.
>>
>> The virtio-sound device is the first QEMU audio front end that
>> supports floating point samples. The audio subsystem is only
>> partially prepared for this. The com
Hi,
Apologies, I haven't been in touch for a while. I have an update that
I would like to give.
On 4/16/25 12:50 PM, Eugenio Perez Martin wrote:
On Mon, Apr 14, 2025 at 11:20 AM Sahil Siddiq wrote:
Hi,
On 3/26/25 1:05 PM, Eugenio Perez Martin wrote:
On Mon, Mar 24, 2025 at 2:59 PM Sahil Si
在 2025/5/7 上午10:31, Bibo Mao 写道:
This series patchset is to clean up with memory regions of loongarch pch
pic interrupt controller. Originally there are three iomem regions:
iomem32_low, iomem8, iomem32_highm. Since these regions only support
4 bytes/1 byte/4 bytes access, it is divided into thre
On 09/05/2025 00.50, Zhuoying Cai wrote:
DIAG 320 is supported when the certificate-store (CS) facility
is installed.
Availability of CS facility is determined by byte 134 bit 5 of the
SCLP Read Info block. Byte 134's facilities cannot be represented
without the availability of the extended-leng
On 09/05/2025 00.50, Zhuoying Cai wrote:
Create a certificate store for boot certificates used for secure IPL.
Load certificates from the -boot-certificate option into the cert store.
Nit: Remove the "-" before the "boot-certificate" here now, too.
Currently, only x509 certificates in DER f
Am 13.05.25 um 10:17 schrieb Mark Cave-Ayland:
> On 13/05/2025 07:14, Volker Rümelin wrote:
>
>> Am 11.05.25 um 13:52 schrieb Mark Cave-Ayland:
>>> On 11/05/2025 08:38, Volker Rümelin wrote:
>>>
AUD_open_out() may fail and return NULL. This may then lead to
a segmentation fault in memset(
On Wed, May 14, 2025 at 05:54:05AM +0200, Paolo Bonzini wrote:
> Date: Wed, 14 May 2025 05:54:05 +0200
> From: Paolo Bonzini
> Subject: [PATCH] rust: hpet: rename hpet module to "device"
> X-Mailer: git-send-email 2.49.0
>
> Follow a similar convention as pl011.
>
> Signed-off-by: Paolo Bonzini
On 5/14/2025 1:17 AM, Philippe Mathieu-Daudé wrote:
As each target declares the same prototypes, we can
use a single header, removing the TARGET_XXX uses.
Signed-off-by: Philippe Mathieu-Daudé
...
diff --git a/hw/arm/xen-pvh.c b/hw/arm/xen-pvh.c
index 4b26bcff7a5..1a9eeb01c8e 100644
--- a/hw/
On Sat, May 10, 2025 at 3:24 PM Akihiko Odaki wrote:
>
> virtio_net_pre_load_queues() inspects vdev->guest_features to tell if
> VIRTIO_NET_F_RSS or VIRTIO_NET_F_MQ is enabled to infer the required
> number of queues. This works for VIRTIO_NET_F_MQ but it doesn't for
> VIRTIO_NET_F_RSS because onl
From: Frank Chang
Add the missing implied rule for standard B extension.
Standard B extension implies Zba, Zbb, Zbs extensions.
RISC-V B spec: https://github.com/riscv/riscv-b
Signed-off-by: Frank Chang
Reviewed-by: Jerry Zhang Jian
Reviewed-by: Jim Shu
---
target/riscv/cpu.c | 14 +
From: Jim Shu
Add the missing implied rule from G to imafd_zicsr_zifencei.
Signed-off-by: Jim Shu
Reviewed-by: Frank Chang
---
target/riscv/cpu.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index d92874baa0..27edd5
Follow a similar convention as pl011.
Signed-off-by: Paolo Bonzini
---
rust/hw/timer/hpet/src/{hpet.rs => device.rs} | 0
rust/hw/timer/hpet/src/lib.rs | 2 +-
2 files changed, 1 insertion(+), 1 deletion(-)
rename rust/hw/timer/hpet/src/{hpet.rs => device.rs} (100%)
diff --git
Since commit c6bd2dd63420 ("i386/cpu: Set up CPUID_HT in
x86_cpu_expand_features() instead of cpu_x86_cpuid()") and
commit 99a637a86f55 ("i386/cpu: Set and track CPUID_EXT3_CMP_LEG in
env->features[FEAT_8000_0001_ECX]"), it gets warnings when booting the
VM with vcpus >= 2 and with tcg:
qemu-sys
Starting from QEMU v10.0.0, QEMU hits warnings when vcpus >= 2 with TCG
qemu-system-x86_64: warning: TCG doesn't support requested feature:
CPUID.01H:EDX.ht [bit 28]
qemu-system-x86_64: warning: TCG doesn't support requested feature:
CPUID.8001H:ECX.cmp-legacy [bit 1]
For HVF, it should h
Since Commit c6bd2dd63420 ("i386/cpu: Set up CPUID_HT in
x86_cpu_expand_features() instead of cpu_x86_cpuid()"), CPUID_HT will be
set in env->features[] in x86_cpu_expand_features() when vcpus >= 2.
Later in x86_cpu_filter_features() it will check against the HVF
supported bits. It will trigger th
On Mon, May 12, 2025 at 6:11 PM Michael Tokarev wrote:
>
> On 05.04.2025 11:04, Akihiko Odaki wrote:
> > The goal of commit 7987d2be5a8b ("virtio-net: Copy received header to
> > buffer") was to remove the need to patch the (const) input buffer with a
> > recomputed UDP checksum by copying headers
Hi Gerd,
On Mon, 2025-05-12 at 13:46 +0200, Gerd Hoffmann wrote:
> On Sun, May 11, 2025 at 03:33:11PM +0800, Weifeng Liu wrote:
> > The existence of multiple scaling factors forces us to deal with
> > various
> > coordinate systems and this would be confusing. It would be
> > beneficial
> > to def
Hi Cédric,
> Subject: RE: [PATCH v2 05/25] hw/misc/aspeed_hace: Split hash execution into
> helper functions for clarity
>
> Hi Cédric
>
> > Subject: Re: [PATCH v2 05/25] hw/misc/aspeed_hace: Split hash
> > execution into helper functions for clarity
> >
> > Hello Jamin
> >
> > On 5/13/25 08:28,
Hi Cédric
> Subject: Re: [PATCH v2 05/25] hw/misc/aspeed_hace: Split hash execution into
> helper functions for clarity
>
> Hello Jamin
>
> On 5/13/25 08:28, Jamin Lin wrote:
> > Refactor "do_hash_operation()" by extracting hash execution and result
> > handling into dedicated helper functions:
On Tue, 2025-05-13 at 20:01 +, Kim, Dongwon wrote:
> > Hi Dongwon,
>
> > On Tue, 2025-05-13 at 01:26 +, Kim, Dongwon wrote:
> > > Hi,
> > >
> > > > Subject: [PATCH 3/9] gtk/ui: Introduce helper gd_update_scale
> > > >
> > > > The code snippet updating scale_x/scale_y is general and will
On Tue, 2025-05-06 at 08:21 +0200, Thomas Huth wrote:
> The machine types up to s390-ccw-virtio-4.0 are older than 6 years
> and thus, according to our support policy, are scheduled for being
> deletion now. These patches remove the machines and clean up the
> related compatibility handling that is
Tested pass with vhost_vdpa device's regression tests.
Tested-by: Lei Yang
On Thu, May 8, 2025 at 2:47 AM Jonah Palmer wrote:
>
> Current memory operations like pinning may take a lot of time at the
> destination. Currently they are done after the source of the migration is
> stopped, and befo
On 5/13/2025 4:31 PM, Zhao Liu wrote:
diff --git a/include/exec/ramblock.h b/include/exec/ramblock.h
index 0babd105c0..b8b5469db9 100644
--- a/include/exec/ramblock.h
+++ b/include/exec/ramblock.h
@@ -23,6 +23,10 @@
#include "cpu-common.h"
#include "qemu/rcu.
I tested this patch with virtio-net regression tests, everything works fine.
Tested-by: Lei Yang
On Sat, May 10, 2025 at 3:25 PM Akihiko Odaki wrote:
>
> virtio_net_pre_load_queues() inspects vdev->guest_features to tell if
> VIRTIO_NET_F_RSS or VIRTIO_NET_F_MQ is enabled to infer the required
On 5/11/25 08:08, Akihiko Odaki wrote:
@@ -387,12 +365,17 @@ void qemu_event_set(QemuEvent *ev)
assert(ev->initialized);
/*
- * Pairs with both qemu_event_reset() and qemu_event_wait().
+ * Pairs with qemu_event_wait() (on Linux) and qemu_event_reset().
*
* q
On Tue, 13 May 2025, Philippe Mathieu-Daudé wrote:
> As each target declares the same prototypes, we can
> use a single header, removing the TARGET_XXX uses.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Stefano Stabellini
> ---
> include/hw/arm/xen_arch_hvm.h | 9 -
> inc
Hi Thomas,
On 5/13/25 4:56 AM, Thomas Huth wrote:
From: Thomas Huth
Since commit 6f4e8a92bbd ("hw/arm: make most of the compilation units
common"), compilation of some arm machines (like musicpal) fails on
certain host systems like OpenBSD 7.6/7.7 since headers like
don't reside in /usr/inclu
On 5/13/25 10:42 AM, Philippe Mathieu-Daudé wrote:
On 13/5/25 19:39, Philippe Mathieu-Daudé wrote:
Philippe Mathieu-Daudé (19):
target/arm/tcg-stubs: compile file once (system)
target/arm/hvf_arm: Avoid using poisoned CONFIG_HVF definition
target/arm: Only link with zlib when TCG is
On 5/13/25 10:39 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Pierrick Bouvier
On 5/13/25 10:39 AM, Philippe Mathieu-Daudé wrote:
In order to allow non-target specific code to include
"hvf_arm.h", define the stubs in hvf-stub.c.
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS| 1 +
target/arm/hvf_arm.h | 16
target/arm/hvf-stub.c
On 5/13/25 10:39 AM, Philippe Mathieu-Daudé wrote:
Since commit 538b764d341 ("target/arm: Move minor arithmetic
helpers out of helper.c") we only use the zlib helpers under
TCG.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/meson.build | 1 -
target/arm/tcg/meson.build | 2 ++
2
On 5/13/25 10:39 AM, Philippe Mathieu-Daudé wrote:
Some files include "cpu.h", others "target/arm/cpu.h".
Unify by using the latter which is more explicit.
Suggested-by: Pierrick Bouvier
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpregs.h| 2 +-
target/arm/cpu-features
On 5/13/25 10:17 AM, Philippe Mathieu-Daudé wrote:
As each target declares the same prototypes, we can
use a single header, removing the TARGET_XXX uses.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/arm/xen_arch_hvm.h | 9 -
include/hw/i386/xen_arch_hvm.h | 11 ---
On 5/13/25 12:08 AM, Markus Armbruster wrote:
Pierrick Bouvier writes:
On 5/9/25 11:57 PM, Markus Armbruster wrote:
The build system would need generate an input document for the
QAPI visitor that defines whether each constant is set to true
or false, based on suitable CONFIG/TARGET condition
I did quite some changes to the output of "info migrate".
The general rule is:
- Put important things at the top
- Reuse a single line when things are very relevant, hence reducing lines
needed to show the results
- Remove almost useless ones (e.g. "normal_bytes", while we also have
With commit 82137e6c8c ("migration: enforce multifd and postcopy preempt to
be set before incoming"), and if postcopy preempt / multifd is enabled, one
cannot setup any capability because these checks would always fail.
(qemu) migrate_set_capability xbzrle off
Error: Postcopy preempt must be set b
Patch 1 was a bug I found set capabilities, so it's pretty separate issue.
Patch 2-3 was an attempt that I made the HMP "info migrate" looks slightly
easier to read. For me, it was almost never able to show correctly on what
I cared before in the current screen but I'll always need to scroll, as
"info migrate" is the command people would frequently use to query
migration status. We may not want it to dump global configurations because
dumping the same things over and over won't help.
The globals are just more suitable for a parameter dump instead. Hence
move it over.
Signed-off-by: Pet
If we are going to punch holes in the mirror destination even for the
portions where the source image is unallocated, it is nicer to treat
the entire image as dirty and punch as we go, rather than pre-zeroing
the entire image just to re-do I/O to the allocated portions of the
image.
Signed-off-by:
On Mon, May 12, 2025 at 06:21:21PM +0530, Prasad Pandit wrote:
> From: Prasad Pandit
>
> Hello,
>
> * This series (v11) fixes spelling and capitalisations glitches and
> does some refactoring and reordering changes as suggested in the
> review of v10.
> ===
> 67/67 qemu:qtest+qtest-x86_64 /
On Fri, May 09, 2025 at 03:40:28PM -0500, Eric Blake wrote:
> When mirroring, the goal is to ensure that the destination reads the
> same as the source; this goal is met whether the destination is sparse
> or fully-allocated (except when explicitly punching holes, then merely
> reading zero is not
On Tue, May 13, 2025 at 07:21:36PM +0200, David Hildenbrand wrote:
> On 12.05.25 17:16, Chaney, Ben wrote:
> > Hello,
> >
> > When live migrating to a destination host with pmem there is a
> > very long downtime where the guest is paused. In some cases, this can be as
> > high as 5 minu
> Hi Dongwon,
> On Tue, 2025-05-13 at 01:26 +, Kim, Dongwon wrote:
> > Hi,
> >
> > > Subject: [PATCH 3/9] gtk/ui: Introduce helper gd_update_scale
> > >
> > > The code snippet updating scale_x/scale_y is general and will be
> > > used in next
> > > patch. Make it a function.
> > >
> > > Sign
Hi Pierrick,
May 13, 2025 at 9:45 AM, Julian Ganz wrote:
> May 13, 2025 at 2:25 AM, Pierrick Bouvier wrote:
> > [...]
> > + if (trace_all_insns) {
> > + g_autoptr(GString) report = g_string_new(NULL);
> > + g_string_append_printf(report, "Exec insn at %"PRIx64" on VCPU %d\n",
> > + insn->addr,
On Sun, May 11, 2025 at 03:08:24PM +0900, Akihiko Odaki wrote:
> rp_pong_acks tells if it has ever received one pong. QemuEvent is
> better suited for this usage because it represents a boolean rather
> than integer and will not decrement with the wait operation.
>
> pause_event can utilize qemu_e
On 5/13/25, 1:21 PM, "David Hildenbrand" mailto:da...@redhat.com>> wrote:
> Are you using a read-only NVDIMM?
> In that case, I assume we would never need msync.
We aren't using an NVDIMM at all, we are using pmem that is backed by DRAM.
Ben
On 5/12/25 20:24, Daniel P. Berrangé wrote:
From: Daniel P. Berrangé
Going forward we want all newly created source files to have an
SPDX-License-Identifier tag present.
Initially mandate this for C, Python, Perl, Shell source files,
as well as JSON (QAPI) and Makefiles, while encouraging user
On 5/13/25 10:08, Jamin Lin wrote:
Link:
https://patchwork.kernel.org/project/qemu-devel/patch/20250509175047.26066-1-faro...@suse.de/
Signed-off-by: Jamin Lin
---
tests/qtest/aspeed_smc-test.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/tests/qtest/aspeed_smc-test.c b/tests/qt
On 5/9/25 19:50, Fabiano Rosas wrote:
ASAN spotted a leak of the memory used to hold the tmp_path:
Direct leak of 35 byte(s) in 1 object(s) allocated from:
#0 0x55e29aa96da9 in malloc
../projects/compiler-rt/lib/asan/asan_malloc_linux.cpp:69:3
#1 0x7fe0cfb26518 in g_malloc ../glib/gme
On 13/5/25 19:39, Philippe Mathieu-Daudé wrote:
The objective is to remove the arm_ss[] source set soon.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index
Some files include "cpu.h", others "target/arm/cpu.h".
Unify by using the latter which is more explicit.
Suggested-by: Pierrick Bouvier
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpregs.h| 2 +-
target/arm/cpu-features.h | 2 +-
target/arm/tcg/translate.h | 2 +-
On 13/5/25 19:39, Philippe Mathieu-Daudé wrote:
Philippe Mathieu-Daudé (19):
target/arm/tcg-stubs: compile file once (system)
target/arm/hvf_arm: Avoid using poisoned CONFIG_HVF definition
target/arm: Only link with zlib when TCG is enabled
target/arm: Always include full path to
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
hw/arm/aspeed_ast27x0.c| 1 +
hw/arm/bcm2838.c | 1 +
hw/arm/exynos4210.c| 1 +
hw/arm/fsl-imx8mp.c| 1 +
hw/arm/mps3r.c | 1 +
hw/arm/npcm8xx.c | 1 +
hw/vmapple/vmapple.c
arm_build_mp_affinity() and affinity mask definitionss are
related to multiprocessing. Move them to "multiprocessing.h",
including this header when necessary.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
target/arm/cpu.h | 17 -
target/arm/
ARMCPU typedef is declared in "cpu-qom.h". Include it in
order to avoid when refactoring unrelated headers:
target/arm/hvf_arm.h:23:41: error: unknown type name 'ARMCPU'
23 | void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu);
| ^
Signed-of
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
hw/arm/exynos4210.c | 1 -
hw/arm/highbank.c | 1 -
hw/arm/mps3r.c | 1 -
hw/arm/smmuv3.c | 1 -
4 files changed, 4 deletions(-)
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index 76001ff0dfc..56267ec2b
ARMCPU typedef is declared in "cpu-qom.h". Include it in
order to avoid when refactoring unrelated headers:
target/arm/kvm_arm.h:54:29: error: unknown type name 'ARMCPU'
54 | bool write_list_to_kvmstate(ARMCPU *cpu, int level);
| ^
Signed-off-by: Philipp
By using arm_cpu_has_feature() instead of arm_feature()
we don't need to include "cpu.h" anymore.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
hw/arm/realview.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/hw/arm/realview.c b/hw/arm/r
CPReadFn type definitions use the CPUARMState type, itself
declared in "cpu.h". Include this file in order to avoid when
refactoring headers:
../target/arm/cpregs.h:241:27: error: unknown type name 'CPUARMState'
typedef uint64_t CPReadFn(CPUARMState *env, const ARMCPRegInfo *opaque);
Using arm_cpu_has_feature() instead of arm_feature() remove
a dependency on (the indirectly included) "cpu.h" header.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
hw/arm/virt-acpi-build.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/arm/vir
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
target/arm/cpu.h | 54 +-
target/arm/cpu_has_feature.h | 65
2 files changed, 66 insertions(+), 53 deletions(-)
create mode 100644 target/arm/cpu_
default_reset_secondary() uses address_space_stl_notdirty(),
itself declared in "system/memory.h". Include this header in
order to avoid when refactoring headers:
../hw/arm/boot.c:281:5: error: implicit declaration of function
'address_space_stl_notdirty' is invalid in C99
[-Werror,-Wimplicit-
Extract PSCI definitions (which are not target specific)
to the new "target/arm/psci.h", so code from hw/arm/ can
use them without having to include the target specific
"cpu.h" header.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
include/hw/arm/boot.h | 3 ++-
t
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index b404fa54863..e568dfb706a 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -48,7 +48,7 @@ su
Since commit 538b764d341 ("target/arm: Move minor arithmetic
helpers out of helper.c") we only use the zlib helpers under
TCG.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/meson.build | 1 -
target/arm/tcg/meson.build | 2 ++
2 files changed, 2 insertions(+), 1 deletion(-)
diff --gi
Before I respin my "single-binary: Make hw/arm/ common" [1] I'm
extracting these random cleanup patches. Some aren't necessary
anymore because now units in arm_common_ss[] can access "cpu.h",
but the patches are reviewed and simplify a bit IMO.
Based-on: <20250512180502.2395029-1-pierrick.bouv...@
arm-qmp-cmds.c uses ARM_MAX_VQ, which is defined in "cpu.h".
Include the latter to avoid when refactoring unrelated headers:
target/arm/arm-qmp-cmds.c:83:19: error: use of undeclared identifier
'ARM_MAX_VQ'
83 | QEMU_BUILD_BUG_ON(ARM_MAX_VQ > 16);
| ^
Signed-off-
"target/arm/cpu-features.h" dereferences the ARMISARegisters
structure, which is defined in "cpu.h". Include the latter to
avoid when refactoring unrelated headers:
In file included from target/arm/internals.h:33:
target/arm/cpu-features.h:45:54: error: unknown type name 'ARMISARegisters'
arm_cpu_has_feature() is equivalent of arm_feature(), however
while the latter uses CPUARMState so is target-specific, the
former doesn't and can be called by target-agnostic code in hw/.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
target/arm/cpu_has_feature.h | 2 ++
Only cpu.c requires "multiprocessing.h" definitions so far.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
target/arm/cpu.h | 1 -
target/arm/cpu.c | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 6ed6409cb7a.
In order to allow non-target specific code to include
"hvf_arm.h", define the stubs in hvf-stub.c.
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS| 1 +
target/arm/hvf_arm.h | 16
target/arm/hvf-stub.c | 20
target/arm/meson.build | 1
On 12.05.25 17:16, Chaney, Ben wrote:
Hello,
When live migrating to a destination host with pmem there is a very
long downtime where the guest is paused. In some cases, this can be as high as
5 minutes, compared to less than one second in the good case.
Profiling suggests v
As each target declares the same prototypes, we can
use a single header, removing the TARGET_XXX uses.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/arm/xen_arch_hvm.h | 9 -
include/hw/i386/xen_arch_hvm.h | 11 ---
include/hw/xen/arch_hvm.h | 14 ++
hw/
On 13/5/25 19:03, Richard Henderson wrote:
On 5/13/25 03:41, Philippe Mathieu-Daudé wrote:
On 12/5/25 20:04, Pierrick Bouvier wrote:
This function needs 64 bit compare exchange, so we hide implementation
for hosts not supporting it (some 32 bit target, which don't run 64 bit
guests anyway).
Re
On 5/13/25 03:41, Philippe Mathieu-Daudé wrote:
On 12/5/25 20:04, Pierrick Bouvier wrote:
This function needs 64 bit compare exchange, so we hide implementation
for hosts not supporting it (some 32 bit target, which don't run 64 bit
guests anyway).
Reviewed-by: Richard Henderson
Signed-off-by:
Currently, arm booting processus assumes that the first_cpu is the CPU
that will boot: `arm_load_kernel` is powering off all but the `first_cpu`;
`do_cpu_reset` is setting the loader address only for this `first_cpu`.
For most of the boards, this isn't an issue as the kernel is loaded and
booted o
On Tue, May 13, 2025 at 02:44:40PM +0200, Markus Armbruster wrote:
> Daniel P. Berrangé writes:
>
> > This removes the TARGET_* conditions from all the CPU commands
> > that are conceptually target independent. Top level stubs are
> > provided to cope with targets which do not currently implement
On Mon, Apr 14, 2025 at 06:38:49PM +0200, Cornelia Huck wrote:
> Add some documentation for how individual ID registers can be
> configured with the host cpu model.
>
> [CH: adapt to removal of the 'custom' model, added some more
> explanations about using the ID register props]
> Signed-off-by:
Am 27.09.2024 um 08:11 hat Michael Tokarev geschrieben:
> Add missing long options and --help output.
>
> Signed-off-by: Michael Tokarev
> ---
> qemu-img.c | 44
> 1 file changed, 36 insertions(+), 8 deletions(-)
>
> diff --git a/qemu-img.c b/qemu-im
On Tue, May 13, 2025 at 05:56:46PM +0200, Cornelia Huck wrote:
> On Tue, May 13 2025, Daniel P. Berrangé wrote:
>
> > On Wed, Apr 09, 2025 at 04:42:53PM +0200, Cornelia Huck wrote:
> >> From: Eric Auger
> >>
> >> Also add kvm add accessors for storing host features into idregs.
> >>
> >> Revie
On Tue, May 06, 2025 at 10:52:32AM +0200, Cornelia Huck wrote:
> From: Eric Auger
>
> Introduce scripts that automate the generation of system register
> definitions from a given linux source tree arch/arm64/tools/sysreg.
>
> Invocation of
> ./update-aarch64-sysreg-code.sh $PATH_TO_LINUX_SOURCE_
On Tue, May 06, 2025 at 10:52:22AM +0200, Cornelia Huck wrote:
> From: Eric Auger
>
> Also add kvm accessors for storing host features into idregs.
>
> Reviewed-by: Richard Henderson
> Reviewed-by: Sebastian Ott
> Signed-off-by: Eric Auger
> Signed-off-by: Cornelia Huck
> ---
> target/arm/c
Am 27.09.2024 um 08:11 hat Michael Tokarev geschrieben:
> Signed-off-by: Michael Tokarev
> Reviewed-by: Daniel P. Berrangé
> ---
> qemu-img.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/qemu-img.c b/qemu-img.c
> index 1bd88fcf63..9157a6b45d 100644
> --- a/qemu-
Am 27.09.2024 um 08:11 hat Michael Tokarev geschrieben:
> Add missing long options and --help output.
>
> Signed-off-by: Michael Tokarev
> ---
> qemu-img.c | 38 ++
> 1 file changed, 30 insertions(+), 8 deletions(-)
>
> diff --git a/qemu-img.c b/qemu-img.c
>
On Mon, Apr 14, 2025 at 06:38:47PM +0200, Cornelia Huck wrote:
> From: Eric Auger
>
> If the interface for writable ID registers is available, expose uint64
> SYSREG properties for writable ID reg fields exposed by the host
> kernel. Properties are named SYSREG__ with REG and FIELD
> being those
On Mon, Apr 14, 2025 at 06:38:47PM +0200, Cornelia Huck wrote:
> From: Eric Auger
>
> If the interface for writable ID registers is available, expose uint64
> SYSREG properties for writable ID reg fields exposed by the host
> kernel. Properties are named SYSREG__ with REG and FIELD
> being those
On Tue, May 13 2025, Daniel P. Berrangé wrote:
> On Wed, Apr 09, 2025 at 04:42:53PM +0200, Cornelia Huck wrote:
>> From: Eric Auger
>>
>> Also add kvm add accessors for storing host features into idregs.
>>
>> Reviewed-by: Richard Henderson
>> Reviewed-by: Sebastian Ott
>> Signed-off-by: Eri
On Wed, Apr 09, 2025 at 04:42:53PM +0200, Cornelia Huck wrote:
> From: Eric Auger
>
> Also add kvm add accessors for storing host features into idregs.
>
> Reviewed-by: Richard Henderson
> Reviewed-by: Sebastian Ott
> Signed-off-by: Eric Auger
> Signed-off-by: Cornelia Huck
> ---
> target/a
On 5/12/25, 2:50 PM, "Peter Xu" mailto:pet...@redhat.com>>
wrote:
> What you said makes sense to me, but I'm neither pmem user nor
> expert. Let's wait to see whether others would like to chime in.
> What's the first bad commit of the regression? Is it since v10.0 release?
Hi Peter,
W
On 13/5/25 16:14, Clément Chigot wrote:
From: Frederic Konrad
This introduces a first-cpu-index property to the arm-gic, as some SOCs
could have two separate GIC (ie: the zynqmp).
Signed-off-by: Clément Chigot
---
hw/intc/arm_gic.c| 2 +-
hw/intc/arm_gic_common.c |
Am 28.04.2025 um 15:58 hat Michael Tokarev geschrieben:
> 28.04.2025 16:54, Michael Tokarev пишет:
> > 25.04.2025 20:52, Kevin Wolf wrote:
> > > From: Denis Rastyogin
> > >
> > > This error was discovered by fuzzing qemu-img.
> > >
> > > Currently, running `qemu-img bench -d 0` in img_bench is a
Am 27.09.2024 um 08:11 hat Michael Tokarev geschrieben:
> Use common code and simplify error message
>
> Signed-off-by: Michael Tokarev
> Reviewed-by: Daniel P. Berrangé
> ---
> qemu-img.c | 63 --
> 1 file changed, 18 insertions(+), 45 deleti
Hi,
On 4/14/25 6:38 PM, Cornelia Huck wrote:
> [This is on top of v5 of the ID register storage rework:
> https://lore.kernel.org/qemu-devel/20250409144304.912325-1-coh...@redhat.com/T/#t]
>
> It's been a while, but here's finally a respin of the series to make ID
> registers configurable directly
On Mon, Apr 14, 2025 at 06:38:41PM +0200, Cornelia Huck wrote:
> From: Eric Auger
>
> Introduce a script that automates the generation of system register
> properties definitions from a given linux source tree
> arch/arm64/tools/sysreg.
>
> Invocation of
> ./update-aarch64-sysreg-code.sh $PATH_T
On 5/13/25 4:42 PM, Cornelia Huck wrote:
> On Tue, May 13 2025, Eric Auger wrote:
>
>> Hi Connie,
>>
>> On 4/14/25 6:38 PM, Cornelia Huck wrote:
>>> Add an helper to retrieve the writable id reg bitmask. The
>>> status of the query is stored in the CPU struct so that an
>>> an error, if any, ca
On 5/13/25 4:05 PM, Cornelia Huck wrote:
> On Tue, May 13 2025, Eric Auger wrote:
>
>> Hi Connie,
>>
>> On 4/14/25 6:38 PM, Cornelia Huck wrote:
>>> From: Eric Auger
>>>
>>> The known ID regs are described in a new initialization function
>>> dubbed initialize_cpu_sysreg_properties(). That cod
Hi Connie,
On 4/14/25 6:38 PM, Cornelia Huck wrote:
> Add some documentation for how individual ID registers can be
> configured with the host cpu model.
>
> [CH: adapt to removal of the 'custom' model, added some more
> explanations about using the ID register props]
> Signed-off-by: Eric Auger
There are a number of resource leaks in gen-vdso. In theory they are
harmless because this is a short lived process, but when building QEMU
with --extra-cflags="-fsanitize=address" problems ensure. The gen-vdso
program is run as part of the build, and that aborts due to the
sanitizer identifying me
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