On macOS we need to increase unix socket buffers size on the client and
server to get good performance. We set the socket buffers on macOS after
connecting or accepting a client connection.
Testing with qemu-nbd shows that reading an image with qemu-img convert
from qemu-nbd is *11.4 times faster*
On 4/19/25 05:54, Philippe Mathieu-Daudé wrote:
I don't think doing strcmp is a good move here, even temporarily.
A short term solution is making target_info.c target specific, and use:
return TARGET_AARCH64;
IIUC as
https://lore.kernel.org/qemu-devel/20231122183048.17150-3-phi...@linaro.org/?
** Tags added: kernel-daily-bug
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https://bugs.launchpad.net/bugs/1915063
Title:
Windows 10 wil not install using qemu-system-x86_64
Status in QEMU:
Fix Released
Status in linux pack
Good
Ajuz
On 19/4/25 03:09, Pierrick Bouvier wrote:
On 4/18/25 10:29, Philippe Mathieu-Daudé wrote:
Add a helper to distinct the binary is targetting
Aarch64 or not.
Start with a dump strcmp() implementation, leaving
room for future optimizations.
Signed-off-by: Philippe Mathieu-Daudé
---
include/qem
On startup, scale_x and scale_y were set to 1 that didn't reflect the
real situation of the scan-out, resulting in incorrect cursor
coordinates to be sent when moving the mouse pointer. Simply updating
the scales before rendering the image fixes this issue.
Cc: hikalium
Cc: Alexander Orzechowski
On 2025/04/11 13:41, Nicholas Piggin wrote:
Migration tests can create new QPCI devices for the destination
machine which may need to take on some state of the source machine
after destination is complete.
Add a migration fixup helper and call it from ahci migration tests.
This is currently a no
On 2025/04/11 13:41, Nicholas Piggin wrote:
ahci-test has a bunch of tests where the pci bar was not mapped. Avoid
unmapping it in these cases, to keep iomaps balanced.
Cc: Michael S. Tsirkin
Cc: Marcel Apfelbaum
Cc: Akihiko Odaki
Cc: Akihiko Odaki
My address is duplicated.
Cc: Fabiano R
On 2025/04/11 13:31, Nicholas Piggin wrote:
Interrupt throttling is broken in several ways:
- Timer expiry sends an interrupt even if there is no cause.
- (e1000e) Mitigated interrupts still auto-clear cause bits.
- Timer expiry that results in an interrupt does not re-arm the timer so
an inte
On 2025/04/11 13:31, Nicholas Piggin wrote:
IGB EITR registers have counter fields which reflect the current ITR
and LLI counter values, as well as a bit to enable LLI moderation,
and a bit to write the register without modifying the counter fields.
Implement the EITR Moderation Counter (aka EIT
On 2025/04/11 13:31, Nicholas Piggin wrote:
IGB throttling granularity is 1us, and interval field is in bits 2..14
of the EITRx registers.
Fixes: 3a977deebe6b ("Intrdocue igb device emulation")
Signed-off-by: Nicholas Piggin
---
hw/net/igb_regs.h | 3 +++
hw/net/igb_core.c | 7 ---
2 fi
On 2025/04/11 13:31, Nicholas Piggin wrote:
The spec explicitly permits xITR register interval field to have a value
of zero to disable throttling. The e1000e model already allows for this
in the throttling logic, so remove the minimum value for the register.
The spec appears to say there is a m
On 2025/04/11 13:31, Nicholas Piggin wrote:
The guest value xITR logic is not required now that the write functions
store necessary data to be read back, and internal users mask and shift
fields they need as they go.
Signed-off-by: Nicholas Piggin
---
hw/net/e1000e_core.c | 31 +++
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