From: TANG Tiancheng
Ensure correct bit width based on sxl when running RV32 on RV64 QEMU.
This is required as MMU address translations run in S-mode.
Signed-off-by: TANG Tiancheng
Reviewed-by: Liu Zhiwei
Reviewed-by: Alistair Francis
---
target/riscv/cpu_helper.c | 17 -
1 f
Custom topology allows user to create CPU topology totally via -device
from CLI.
Once custom topology is enabled, machine will stop the default CPU
creation and expect user's CPU topology tree built from CLI.
With custom topology, any CPU topology, whether symmetric or hybrid
(aka, heterogeneous)
Apply max_limit to CPU topology and prevent the number of topology
devices from exceeding the max limitation configured by user.
Additionally, ensure that CPUs created from the CLI via custom topology
meet at least the requirements of smp.cpus. This guarantees that custom
topology will always have
Custom topology will allow user to build CPU topology from CLI totally,
and this replaces machine's default CPU creation process (*_init_cpus()
in MachineClass.init()).
For the machine's initialization, there may be CPU dependencies in the
remaining initialization after the CPU creation.
To addre
To honor the custom topology case and generate correct APIC ID for
hybrid CPU topology, Use get_max_topo_by_level() to get topology
information instead of accessing MachineState.smp directly.
Signed-off-by: Zhao Liu
---
hw/i386/x86-common.c | 19 +--
hw/i386/x86.c| 20 +++
Abstract 3 core types for i386: common core, Intel Core (P-core) and
Intel atom (E-core). This is in preparation for creating the hybrid
topology from the CLI.
Signed-off-by: Zhao Liu
---
target/i386/core.c | 56 +
target/i386/core.h | 53 +++
With custom topology enabling, user could configure hyrid CPU topology
from CLI.
For example, create a Intel Core (P core) with 2 threads and 2 Intel
Atom (E core) with single thread for PC machine:
-smp maxsockets=1,maxdies=1,maxmodules=2,maxcores=2,maxthreads=2
-machine pc,custom-topo=on \
-dev
For hybrid cpu topology, Intel exposes these CPUIDs [1]:
1. Set CPUID.07H.0H:EDX.Hybrid[bit 15]. With setting as 1, the processor
is identified as a hybrid part.
2. Have CPUID.1AH leaf. Set core type and native model ID in
CPUID.1AH:EAX. Because the native model ID is currently useless for
Split machine initialization and machine_run_board_init() into two parts
around qemu_add_cli_devices_early(), allowing initialization to continue
after the CPU creation from the CLI.
This enables machine to place the initialization steps with CPU
dependencies in post_init().
Signed-off-by: Zhao L
make check-avocado AVOCADO_TESTS=tests/avocado/tuxrun_baselines.py: \
TuxRunBaselineTest:test_riscv64_rv32
Signed-off-by: LIU Zhiwei
Suggested-by: Daniel Henrique Barboza
---
tests/avocado/tuxrun_baselines.py | 16
1 file changed, 16 insertions(+)
diff --git a/tests/avocado/tu
Custom topology will allow machine to skip the default CPU creation and
accept user's CPU creation from CLI.
Therefore, for microvm, pc-i440fx and pc-q35, split machine
initialization from x86_cpus_init(), and place the remaining part into
post_init(), which can continue to run after CPU creation
For custom topology case, the valid and reliable topology information
be obtained from topology max limitations.
Therefore, re-implement machine_topo_get_cores_per_socket() and
machine_topo_get_threads_per_socket() to consider the custom topology
case. And further, use the wrapped helper to set CP
Topology devices are used to define CPUs and need to be created and
realized earlier than current qemu_create_cli_devices().
Use this new catogory to identify such special devices, which allows
to create them earlier in subsequent change.
Signed-off-by: Zhao Liu
---
hw/cpu/cpu-topology.c | 2 +
We may need 32-bit max for RV64 QEMU. Thus we add these two CPUs
for RV64 QEMU.
The reason we don't expose them to RV32 QEMU is that we already have
max cpu with the same configuration. Another reason is that we want
to follow the RISC-V custom where addw instruction doesn't exist in
RV32 CPU.
Si
Hi all,
This our v2 RFC trying to introduce hyrbid (aka, heterogeneous) CPU
topology into QEMU. This series focuses on the heterogeneous CPUs with
same ISA, like Intel client hybrid architecture.
Comparing with v1 [1], v2 totally re-designs the topology architecture
and based on QOM (CPU) topolog
Topology devices need to be created and realized before board
initialization.
Allow qdev_device_add() to specify category to help create topology
devices early.
Signed-off-by: Zhao Liu
---
hw/net/virtio-net.c| 2 +-
hw/usb/xen-usb.c | 3 ++-
include/monitor/qdev.h | 4 ++--
system/
From: TANG Tiancheng
Add gdb XML files and adjust CPU initialization to allow running RV32 CPUs
in RV64 QEMU.
Signed-off-by: TANG Tiancheng
Reviewed-by: Liu Zhiwei
Reviewed-by: Alistair Francis
---
configs/targets/riscv64-softmmu.mak | 2 +-
target/riscv/cpu.c | 16
From: TANG Tiancheng
Ensure mcause high bit is correctly set by using 32-bit width for RV32
mode and 64-bit width for RV64 mode.
Signed-off-by: TANG Tiancheng
Reviewed-by: Liu Zhiwei
Reviewed-by: Alistair Francis
---
target/riscv/cpu_helper.c | 8 ++--
1 file changed, 6 insertions(+), 2
From: TANG Tiancheng
Ensure that riscv_cpu_sxl returns MXL_RV32 when runningRV32 in an
RV64 QEMU.
Signed-off-by: TANG Tiancheng
Fixes: 05e6ca5e156 ("target/riscv: Ignore reserved bits in PTE for RV64")
Reviewed-by: Liu Zhiwei
Reviewed-by: Alistair Francis
---
target/riscv/cpu.h | 5 -
1
From: TANG Tiancheng
RV32 OpenSBI need a fw_dynamic_info parameter with 32-bit fields instead
of target_ulong.
In RV64 QEMU, target_ulong is 64. So it is not right for booting RV32 OpenSBI.
We create a fw_dynmaic_info32 struct for this purpose.
Signed-off-by: TANG Tiancheng
Reviewed-by: Liu Zh
From: TANG Tiancheng
This patch set aims to expose 32-bit RISC-V cpu to RV64 QEMU. Thus
qemu-system-riscv64 can directly boot a RV32 Linux.
This patch set has been tested with 6.9.0 Linux Image.
And add an avocado tuxrun test in tests/avocado.
v7:
Remove cpu of "any".
v6:
Use TUXRUN test c
On 18/09/2024 19.08, Mike Kowal wrote:
On 9/18/2024 10:05 AM, Thomas Huth wrote:
...
That also does not look like proper content for a header file. Please put
it into a .c file instead.
When these test were originally written, the authors had all of the tests
and their functions in one .c f
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/net/net_rx_pkt.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/
Reviewed-by: Pavel Dovgalyuk
On 19.09.2024 02:40, d...@treblig.org wrote:
From: "Dr. David Alan Gilbert"
replay_disable_events has been unused since 2019's
c8aa7895eb ("replay: don't drain/flush bdrv queue while RR is working")
Remove it.
Signed-off-by: Dr. David Alan Gilbert
---
incl
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Reviewed-by: Maciej S. Szmigiero
Signed-off-by: Pierrick Bouvier
---
hw/hyperv/hyperv_testdev.c | 6 +++---
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Klaus Jensen
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/nvme/ctrl.c | 8
1 file changed, 4
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Reviewed-by: Kevin Wolf
Signed-off-by: Pierrick Bouvier
---
hw/scsi/virtio-scsi.c | 1 -
1 file changed, 1 de
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/acpi/aml-build.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/arm/hyp_gdbstub.c | 1 -
1 file changed, 1 deletion(-)
diff --git
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Fabiano Rosas
Reviewed-by: Richard Henderson
Reviewed-by: Peter Xu
Signed-off-by: Pierrick Bouvier
---
migration/dirtyrate.c |
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
tests/qtest/acpi-utils.c | 1 -
1 file changed, 1 deletion(-)
diff --git
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/pci/pci-stub.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Pierrick Bouvier
---
target/riscv/monitor.c
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Pierrick Bouvier
---
target/ppc/dfp_helper.c | 8
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Pierrick Bouvier
---
hw/ppc/spapr_events.c | 2 +-
1 file
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Cédric Le Goater
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/ppc/ppc.c | 1 -
hw/ppc/spapr_e
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
qom/object.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/qom/object
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
include/qemu/pmem.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/inc
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
fpu/softfloat-parts.c.inc | 2 --
1 file changed, 2 deletions(-)
diff --g
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/net/i82596.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
dif
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
tcg/loongarch64/tcg-target.c.inc | 1 -
1 file changed, 1 deletion(-)
dif
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
qobject/qnum.c | 4
1 file changed, 4 deletions(-)
diff --git a/qobj
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
scripts/checkpatch.pl | 3 +++
1 file changed, 3 insertions(+)
diff --git
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Signed-off-by: Pierrick Bouvier
---
migration/dirtyrate.c| 1 -
migration/postcopy-ram.c | 7 ---
migration/ram.c | 2 --
3 f
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Reviewed-by: Richard W.M. Jones
Reviewed-by: Kevin Wolf
Signed-off-by: Pierrick Bouvier
---
block/ssh.c | 1
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/tpm/tpm_spapr.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/t
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/net/e1000e_core.c | 2 --
hw/net/igb_core.c| 2 --
hw/net/vmxnet3.c
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/acpi/aml-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
accel/tcg/plugin-gen.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/arm/highbank.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
d
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/hyperv/hyperv_testdev.c | 1 -
hw/hyperv/vmbus.c | 3 ---
2 fi
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
target/i386/kvm/kvm.c | 4 ++--
1 fil
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Fabiano Rosas
Reviewed-by: Peter Xu
Signed-off-by: Pierrick Bouvier
---
migration/migration-hmp-cmds.c | 2 +-
migration/postc
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/net/e1000e_core.c | 2 +-
hw/net/igb_core.c| 2 +-
hw/net/net_rx_pk
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
hw/pci/pci-stub.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Reviewed-by: Kevin Wolf
Signed-off-by: Pierrick Bouvier
---
block/qcow2.c | 2 +-
1 file changed, 1 insertion
This series cleans up all usages of assert/g_assert who are supposed to stop
execution of QEMU. We replace those by g_assert_not_reached().
It was suggested recently when cleaning codebase to build QEMU with gcc
and tsan:
https://lore.kernel.org/qemu-devel/54bb02a6-1b12-460a-97f6-3f478ef76...@lina
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Reviewed-by: Kevin Wolf
Signed-off-by: Pierrick Bouvier
---
qobject/qlit.c | 2 +-
qobject/qnum.c | 8 ---
On 9/18/24 19:57, Cédric Le Goater wrote:
Hello,
Adding :
Harsh for QEMU/PPC pseries machine,
Shivaprasad for KVM/PPC VFIO and IOMMU support.
Could you please give us your feedback on these changes ?
Thanks,
C.
On 9/13/24 05:44, Akihiko Odaki wrote:
Disabled means it is a disa
Hi Cedric,
On 9/17/24 12:31, Cédric Le Goater wrote:
Hello Harsh,
On 9/17/24 08:03, Harsh Prateek Bora wrote:
Commit 1392617d3576 intended to tag pseries-2.1 - 2.11 machines as
deprecated with reasons mentioned in its commit log.
Removing the arch specific code for the now deprecated machine t
Hi Ganapatrao,
On 9/12/24 06:16, Ganapatrao Kulkarni wrote:
Extend the 'mte' property for the virt machine to cover KVM as
well. For KVM, we don't allocate tag memory, but instead enable
the capability.
If MTE has been enabled, we need to disable migration, as we do not
yet have a way to migrat
Hi Cornelia and Ganapatrao,
On 9/17/24 11:13, Cornelia Huck wrote:
On Thu, Sep 12 2024, Ganapatrao Kulkarni
wrote:
Extend the 'mte' property for the virt machine to cover KVM as
well. For KVM, we don't allocate tag memory, but instead enable
the capability.
If MTE has been enabled, we need
> >> --
> >> 2.39.2
> >>
> >
>
> Which one did you find? Using which grep command?
Sorry, I made a mistake. I haven't found anything new yet.
Currently, cpu and core is located by topology IDs when plugging.
On a topology tree, each topology device will has a CPU bus. Once cpu
and core specify the bus_type, it's necessary to find accurate buses
for them based on topology IDs (if bus=* is not set in -device).
Therefore, we need a way to
When there's a CPU topology tree, original MachineState.smp (CpuTopology
structure) is not enough to dynamically monitor changes of the tree or
update topology information in time.
To address this, introduce the CPU slot, as the root of CPU topology
tree, which is used to update and maintain globa
Convert cpu-core to topology device then it can be added into topology
tree.
At present, only PPC is using cpu-core device. For topology tree, it's
necessary to add cpu-core in the tree as one of the topology
hierarchies.
The generic cpu-core is sufficient to express the core layer in a
topology
Hybrid (or heterogeneous) CPU topology needs to be expressed as
a topology tree, which requires to abstract all the CPU topology
level as the objects.
At present, QEMU already has the CPU device, core device and cluster
device (for TCG), so that it's natual to introduce more topology
related devic
Abstract module/die/socket levels as the cpu-module/cpu-die/cpu-socket
topology devices then they can be inserted into topology tree.
Signed-off-by: Zhao Liu
---
MAINTAINERS | 6 ++
hw/cpu/die.c| 34 ++
hw/cpu/meson.build | 3 +++
Use topology sub IDs or APIC ID to locate parent topology device and
bus.
This process naturally verifies the correctness of topology-related IDs,
making it possible to drop the existing topology ID sanity checks once
x86 machine supports topology tree.
Signed-off-by: Zhao Liu
---
hw/i386/x86-c
Support complete QOM CPu topology tree for x86 machine, and specify
bus_type for x86 CPU so that all x86 CPUs will be added in the topology
tree.
Since the CPU slot make the machine as the hotplug handler for all
topology devices, hotplug related hooks may used to handle other
topology devices bes
None machine accepts any CPU types, even some CPUs may have the
bus_type.
To address this, set topo_tree_supported as true for none machine, then
none machine will have a CPU slot with CPU bus to collect any topology
device with bus_type specified.
And since arch_id_topo_level is not set, the top
User created devices may need to adjust their default object parent or
parent bus.
User created devices are QOM parented to one of the peripheral
containers ("/peripheral" or "/peripheral-anon") in qdev_set_id() by
default. Sometimes, it is necessary to reparent a device to another
object to expre
For x86, CPU's apic ID represent its topology path and is the
combination of topology sub IDs in each leavl.
When x86 machine creates CPUs, to insert the CPU into topology tree, use
apic ID to get topology sub IDs.
Then search the topology tree for the corresponding parent topology
device and ins
Convert CPU to topology device then it can be added into topology tree.
Because CPU then inherits properties and settings of topology device,
make the following changes to take into account the special case for CPU:
* Omit setting category since topology device has already set.
* Make realize(
Hi all,
After ten months, now I bring our 2nd attempt on CPU topology device
back to mail list.
This series is still a practical implementation of Daniel’s idea
[0] from early last year on how to achieve hybrid topology based on QOM
abstraction.
And this series is a preliminary step for introduc
With CPU slot support, the machine can manage the CPU topology tree. To
enable hot-plug support for topology devices, use the machine as the
hotplug handler for the CPU bus.
Additionally, since not all machines support the topology tree from the
start, add a "topo_tree_supported" flag to indicate
For architectures supports QOM topology (indicated by the MachineClass.
topo_tree_supported field), implement smp QOM topology tree from
MachineState.smp.
The topology tree is created before MachineClass.init(), where arch
will initialize CPUs or cores, corresponding to the
MachineState.possible_c
Currently, when the bus assigns an index to a child device, it relies on
a monotonically increasing max_index.
However, when a device is removed from the bus, its index is not
reassigned to new devices, leading to "holes" in child indices.
For topology devices, such as CPUs/cores, arches define c
The device topology structures based on buses are unidirectional: the
parent device can access the child device through the BusChild within
the bus, but not vice versa.
For the CPU topology tree constructed on the device-bus, it is necessary
for the child device to be able to access the parent dev
yaozhenguo 于2024年9月13日周五 16:08写道:
>
> During the process of hot-unplug in vhost-user-net NIC, vhost_user_cleanup
> may add same rcu node to rcu list. Function calls are as follows:
>
> vhost_user_cleanup
> ->vhost_user_host_notifier_remove
> ->call_rcu(n, vhost_user_host_notifier_free,
- Am 18. Sep 2024 um 11:13 schrieb Sebastian Huber
sebastian.hu...@embedded-brains.de:
> Hello,
>
> I recently added the support for CPU1 to the xilinx-zynq-a9 machine
> (hw/arm/xilinx_zynq.c). However, the reset behaviour doesn't match exactly
> with
> the hardware. After a system reset (S
From: "Dr. David Alan Gilbert"
qio_channel_socket_dgram_async has been unused since it was originally
added in 2015.
Remove it.
Signed-off-by: Dr. David Alan Gilbert
---
include/io/channel-socket.h | 29
io/channel-socket.c | 54 ---
On Wed, Sep 18, 2024 at 04:03:12PM -0700, Octavian Purdila wrote:
> On Wed, Sep 18, 2024 at 1:06 PM Corey Minyard wrote:
> >
> > On Wed, Sep 18, 2024 at 12:22:47PM -0700, Octavian Purdila wrote:
> > > Add a simple i2c peripheral to be used for testing I2C device
> > > models. The peripheral has a
From: "Dr. David Alan Gilbert"
pcie_chassis_find_slot has been unused since it was added.
Remove it.
Signed-off-by: Dr. David Alan Gilbert
---
hw/pci/pcie_port.c | 10 --
include/hw/pci/pcie_port.h | 1 -
2 files changed, 11 deletions(-)
diff --git a/hw/pci/pcie_port.c b/hw/
When adding a high speed USB device to the USB hub supported by qemu,
it is added in full speed mode. Here is an example for a storage device.
/: Bus 001.Port 001: Dev 001, Class=root_hub, Driver=platform-uhci/2p, 12M
|__ Port 002: Dev 002, If 0, Class=Hub, Driver=hub/8p, 12M
|__ Port
From: "Dr. David Alan Gilbert"
replay_disable_events has been unused since 2019's
c8aa7895eb ("replay: don't drain/flush bdrv queue while RR is working")
Remove it.
Signed-off-by: Dr. David Alan Gilbert
---
include/sysemu/replay.h | 2 --
replay/replay-events.c | 9 -
2 files chang
On Wed, Sep 04, 2024 at 09:17:43AM +0800, Hongbo Li wrote:
> This 'struct kobj_type' is not modified. It is only used in
> kobject_init_and_add() which takes a 'const struct kobj_type *ktype'
> parameter.
>
> Constifying this structure and moving it to a read-only section,
> and this can increase
From: "Dr. David Alan Gilbert"
socket_remote_address hasn't been used since it was added in
17c55decec ("sockets: add helpers for creating SocketAddress from a socket")
inet_connect hasn't been used since 2017's
8ecc2f9eab ("sheepdog: Use SocketAddress and socket_connect()")
Remove them.
S
From: "Dr. David Alan Gilbert"
rocker_fp_ports hasn't been used since it was added back in 2015.
Remove it.
Signed-off-by: Dr. David Alan Gilbert
---
hw/net/rocker/rocker.c | 5 -
hw/net/rocker/rocker.h | 1 -
2 files changed, 6 deletions(-)
diff --git a/hw/net/rocker/rocker.c b/hw/net/ro
On Wed, Sep 18, 2024 at 1:06 PM Corey Minyard wrote:
>
> On Wed, Sep 18, 2024 at 12:22:47PM -0700, Octavian Purdila wrote:
> > Add a simple i2c peripheral to be used for testing I2C device
> > models. The peripheral has a fixed number of registers that can be
> > read and written.
>
> Why is this
On 19.09.24 00:27, Jason A. Donenfeld wrote:
[broadened subject line and added relevant parties to cc list]
On Tue, Sep 17, 2024 at 10:55:20PM +0200, Alexander Graf wrote:
What is still open are user space applications that require event based
notification on VM clone events - and *only* VM cl
From: "Dr. David Alan Gilbert"
net_rx_pkt_get_l3_hdr_offset and net_rx_pkt_get_iovec_len haven't
been used since they were added.
Remove them.
Signed-off-by: Dr. David Alan Gilbert
---
hw/net/net_rx_pkt.c | 13 -
hw/net/net_rx_pkt.h | 9 -
2 files changed, 22 deletions(-)
[broadened subject line and added relevant parties to cc list]
On Tue, Sep 17, 2024 at 10:55:20PM +0200, Alexander Graf wrote:
> What is still open are user space applications that require event based
> notification on VM clone events - and *only* VM clone events. This
> mostly caters for tools
On Wed, Sep 18, 2024 at 2:31 PM Corey Minyard wrote:
>
> On Wed, Sep 18, 2024 at 02:04:58PM -0700, Octavian Purdila wrote:
> > On Wed, Sep 18, 2024 at 1:17???PM Corey Minyard wrote:
> > >
> > > On Wed, Sep 18, 2024 at 12:22:36PM -0700, Octavian Purdila wrote:
> > > > Add support for NXP's flexcom
Add push/pop and peek tests for fifo32.
Signed-off-by: Octavian Purdila
---
tests/unit/test-fifo.c | 50 ++
1 file changed, 50 insertions(+)
diff --git a/tests/unit/test-fifo.c b/tests/unit/test-fifo.c
index 14153c41fa..d0e05ba95c 100644
--- a/tests/unit/
On Wed, Sep 18, 2024 at 02:04:58PM -0700, Octavian Purdila wrote:
> On Wed, Sep 18, 2024 at 1:17???PM Corey Minyard wrote:
> >
> > On Wed, Sep 18, 2024 at 12:22:36PM -0700, Octavian Purdila wrote:
> > > Add support for NXP's flexcomm i2c. It does not support slave mode or
> > > DMA.
> > >
> > > Th
From: Pierrick Bouvier
A specific plugin test can now read and check a plugin output, to ensure
it contains expected values.
Tested-by: Xingtao Yao
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-Id: <20240724194708.1843704-5-pierrick.bouv...@linaro.org>
Signed-off-by:
When we shut down a guest we disable the timers. However this can
cause deadlock if the guest has queued some async work that is trying
to advance system time and spins forever trying to wind time forward.
Pay attention to the return code and bail early if we can't wind time
forward.
Reported-by:
From: Pierrick Bouvier
By using "print-accesses=true" option, mem plugin will now print every
value accessed, with associated size, type (store vs load), symbol,
instruction address and phys/virt address accessed.
Reviewed-by: Richard Henderson
Reviewed-by: Xingtao Yao
Signed-off-by: Pierrick
This is useful information when debugging memory issues so lets
improve by:
- include the ptr address for u8 fills (like the others)
- indicate the number of operations for reads and writes
- explicitly note when we are flushing
- move the fill printf to after the reset
Reviewed-by: Pierr
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