On 13/08/2024 08:26, Duan, Zhenzhong wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
>> -Original Message-
>> From: CLEMENT MATHIEU--DRIF
>> Subject: Re: [PATCH v2 03/17] intel_
On Mon, Aug 12, 2024 at 9:32 PM Sahil wrote:
>
> Hi,
>
> On Monday, August 12, 2024 12:01:00 PM GMT+5:30 you wrote:
> > On Sun, Aug 11, 2024 at 7:20 PM Sahil wrote:
> > > On Wednesday, August 7, 2024 9:52:10 PM GMT+5:30 Eugenio Perez Martin
> > > wrote:
> > > > On Fri, Aug 2, 2024 at 1:22 PM Sah
SimPoint is a widely used tool to find the ideal microarchitecture
simulation points so Valgrind[2] and Pin[3] support generating basic
block vectors for use with them. Let's add a corresponding plugin to
QEMU too.
Note that this plugin has a different goal with tests/plugin/bb.c.
This plugin cre
Allow user to attach SR-IOV VF to a virtio-pci PF.
Signed-off-by: Akihiko Odaki
---
include/hw/virtio/virtio-pci.h | 1 +
hw/virtio/virtio-pci.c | 20 +++-
2 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/
A user can create a SR-IOV device by specifying the PF with the
sriov-pf property of the VFs. The VFs must be added before the PF.
A user-creatable VF must have PCIDeviceClass::sriov_vf_user_creatable
set. Such a VF cannot refer to the PF because it is created before the
PF.
A PF that user-creata
Signed-off-by: Akihiko Odaki
---
docs/system/sriov.rst | 3 ++-
include/hw/pci/pcie_sriov.h | 7 +--
hw/pci/pcie_sriov.c | 8 +++-
hw/virtio/virtio-pci.c | 16 ++--
4 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/docs/system/sriov.rst b/d
Signed-off-by: Akihiko Odaki
---
MAINTAINERS | 1 +
docs/system/index.rst | 1 +
docs/system/sriov.rst | 36
3 files changed, 38 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e34c2bd4cda2..72b3c6736088 100644
--- a/MAINTAINERS
+++ b/M
SR-IOV requires PCI Express.
Signed-off-by: Akihiko Odaki
---
hw/pci/pcie_sriov.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c
index e1b4ecf79ff9..2daea6ecdb6a 100644
--- a/hw/pci/pcie_sriov.c
+++ b/hw/pci/pcie_sriov.c
@@ -42,6 +42,11 @@ bool
Based-on: <20240802-reuse-v11-0-fb83bb8c1...@daynix.com>
("[PATCH for-9.2 v11 00/11] hw/pci: SR-IOV related fixes and improvements")
Introduction
This series is based on the RFC series submitted by Yui Washizu[1].
See also [2] for the context.
This series enables SR-IOV emulation fo
A device cannot be a SR-IOV PF and a VF at the same time.
Signed-off-by: Akihiko Odaki
---
hw/pci/pcie_sriov.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c
index 1eae9f0a0acf..e1b4ecf79ff9 100644
--- a/hw/pci/pcie_sriov.c
+++ b/hw/pci/pcie_sr
pci_config_get_bar_addr() had a division by vf_stride. vf_stride needs
to be non-zero when there are multiple VFs, but the specification does
not prohibit to make it zero when there is only one VF.
Do not perform the division for the first VF to avoid division by zero.
Signed-off-by: Akihiko Odak
A virtio-net device can be added as a SR-IOV VF to another virtio-pci
device that will be the PF.
Signed-off-by: Akihiko Odaki
---
hw/virtio/virtio-net-pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/virtio/virtio-net-pci.c b/hw/virtio/virtio-net-pci.c
index e03543a70a75..dba4987d6e
A SR-IOV VF cannot have a ROM BAR.
Co-developed-by: Yui Washizu
Signed-off-by: Akihiko Odaki
---
hw/pci/pci.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index d2eaf0c51dde..60b1747d60e6 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -2359,6 +2359,14
[Trim CC list]
12.08.2024 17:44, Eric Blake wrote:
On Sun, Aug 11, 2024 at 11:02:52AM GMT, Michael Tokarev wrote:
..
Eric, from the 5-patch series, only this last patch is Cc'd for stable,
but it obviously does not work without all 4 previous patches. Do you
mean whole series should be applie
>-Original Message-
>From: CLEMENT MATHIEU--DRIF
>Subject: Re: [PATCH v2 03/17] intel_iommu: Add a placeholder variable for
>scalable modern mode
>
>
>
>On 13/08/2024 04:20, Duan, Zhenzhong wrote:
>> Caution: External email. Do not open attachments or click links, unless this
>email come
pcie_sriov doesn't have code to restore its state after migration, but
igb, which uses pcie_sriov, naively claimed its migration capability.
Add code to register VFs after migration and fix igb migration.
Fixes: 3a977deebe6b ("Intrdocue igb device emulation")
Signed-off-by: Akihiko Odaki
---
in
A device gets automatically unrealized when being unparented.
Signed-off-by: Akihiko Odaki
---
hw/pci/pcie_sriov.c | 4
1 file changed, 4 deletions(-)
diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c
index e9b23221d713..499becd5273f 100644
--- a/hw/pci/pcie_sriov.c
+++ b/hw/pci/pcie_
num_vfs is not migrated so use PCI_SRIOV_CTRL_VFE and PCI_SRIOV_NUM_VF
instead.
Signed-off-by: Akihiko Odaki
---
include/hw/pci/pcie_sriov.h | 1 -
hw/pci/pcie_sriov.c | 38 +++---
hw/pci/trace-events | 2 +-
3 files changed, 28 insertions(+), 13
Disable SR-IOV VF devices by reusing code to power down PCI devices
instead of removing them when the guest requests to disable VFs. This
allows to realize devices and report VF realization errors at PF
realization time.
Signed-off-by: Akihiko Odaki
---
docs/pcie_sriov.txt | 8 ++--
in
A PF may automatically create VFs and the PF may be function 0.
Signed-off-by: Akihiko Odaki
---
hw/ppc/spapr_pci.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index f63182a03c41..ed4454bbf79e 100644
--- a/hw/ppc/spapr_pci.c
+++
It is no longer used.
Signed-off-by: Akihiko Odaki
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
---
include/hw/qdev-core.h | 4
hw/core/qdev.c | 1 -
system/qdev-monitor.c | 12 +++-
3 files changed, 7 insertions(+), 10 deletions(-)
diff --git a/i
Release VFs failed to realize just as we do in unregister_vfs().
Fixes: 7c0fa8dff811 ("pcie: Add support for Single Root I/O Virtualization
(SR/IOV)")
Signed-off-by: Akihiko Odaki
---
hw/pci/pcie_sriov.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sri
The renamed state will not only represent powering state of PFs, but
also represent SR-IOV VF enablement in the future.
Signed-off-by: Akihiko Odaki
---
include/hw/pci/pci.h| 7 ++-
include/hw/pci/pci_device.h | 2 +-
hw/pci/pci.c| 14 +++---
hw/pci/pci_host
vfio_pci_size_rom() distinguishes whether rombar is explicitly set to 1
by checking dev->opts, bypassing the QOM property infrastructure.
Use -1 as the default value for rombar to tell if the user explicitly
set it to 1. The property is also converted from unsigned to signed.
-1 is signed so it is
The SR-IOV PFs set the multifunction bits during device realization so
check them after that. This forbids adding SR-IOV devices to s390x.
Signed-off-by: Akihiko Odaki
---
hw/s390x/s390-pci-bus.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/hw/s390x/s390-pci
Supersedes: <20240714-rombar-v2-0-af1504ef5...@daynix.com>
("[PATCH v2 0/4] hw/pci: Convert rom_bar into OnOffAuto")
I submitted a RFC series[1] to add support for SR-IOV emulation to
virtio-net-pci. During the development of the series, I fixed some
trivial bugs and made improvements that I think
Disabled means it is a disabled SR-IOV VF or it is powered off, and
hidden from the guest.
Signed-off-by: Akihiko Odaki
---
hw/ppc/spapr_pci.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 7cf9904c3546..f63182a03c41 100644
--- a/hw/ppc/spap
According to spec, invalidation descriptor type is 7bits which is
concatenation of bits[11:9] and bits[3:0] of invalidation descriptor.
Currently we only pick bits[3:0] as the invalidation type and treat
bits[11:9] as reserved zero. This is not a problem for now as bits[11:9]
is zero for all curre
Update the SPCR table to accommodate the SPCR Table version 4 [1].
The SPCR table has been modified to adhere to the version 4 format [2].
Meanwhile, the virt SPCR golden reference files have been updated to
accommodate the SPCR Table version 4.
[1]:
https://learn.microsoft.com/en-us/windows-har
Update the virt SPCR golden reference files to accommodate the
SPCR Table version 4 [1], utilizing the iasl binary compiled from the
latest ACPICA repository. The SPCR table has been modified to
adhere to the version 4 format [2].
[1]:
https://learn.microsoft.com/en-us/windows-hardware/drivers/se
Update the SPCR table to accommodate the SPCR Table version 4 [1].
The SPCR table has been modified to adhere to the version 4 format [2].
[1]:
https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
[2]: https://github.com/acpica/acpica/pull/931
Signed-off-by: Sia Jee Heng
---
tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..b2dfcd60dd 100644
--- a/tests/qtest/bios-tables-test-allow
On 13/08/2024 04:20, Duan, Zhenzhong wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
>> -Original Message-
>> From: CLEMENT MATHIEU--DRIF
>> Subject: Re: [PATCH v2 03/17] intel_
Receive coalescing is visible to the target machine, so its timers
should use virtual time like other timers in virtio-net, to be
compatible with record-replay.
Signed-off-by: Nicholas Piggin
---
hw/net/virtio-net.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/net
The x86-64 pc machine is flaky with record/replay, but q35 is more
stable. Add a q35 test to replay_kernel.py.
Reviewed-by: Alex Bennée
Tested-by: Alex Bennée
Signed-off-by: Nicholas Piggin
---
tests/avocado/replay_kernel.py | 18 +-
1 file changed, 17 insertions(+), 1 deletion
This reverts commit 1f881ea4a444ef36a8b6907b0b82be4b3af253a2.
That commit causes reverse_debugging.py test failures, and does
not seem to solve the root cause of the problem x86-64 still
hangs in record/replay tests.
The problem with short-cutting the iowait that was taken during
record phase is
The regular qemu_bh_schedule() calls result in non-deterministic
execution of the bh in record-replay mode, which causes replay failure.
Reviewed-by: Alex Bennée
Reviewed-by: Pavel Dovgalyuk
Signed-off-by: Nicholas Piggin
---
hw/net/virtio-net.c | 11 ++-
1 file changed, 6 insertions(+
When replaying a trace, it is possible to go from shutdown to running
with a reverse-debugging step. This can be useful if the problem being
debugged triggers a reset or shutdown.
This can be tested by making a recording of a machine that shuts down,
then using -action shutdown=pause when replayin
The v12 format support for replay-dump has a few issues still. This
fixes async decoding; adds event, shutdown, and end decoding; fixes
audio in / out events, fixes checkpoint checking of following async
events.
Reviewed-by: Alex Bennée
Signed-off-by: Nicholas Piggin
---
scripts/replay-dump.py
An error path missed setting *errp, which can cause a NULL deref.
Reviewed-by: Alex Bennée
Signed-off-by: Nicholas Piggin
---
migration/savevm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/migration/savevm.c b/migration/savevm.c
index 85958d7b09..6bb404b9c8 100644
--- a/migration/savevm
This runs replay-dump.py after recording a trace, and fails the test if
the script fails.
replay-dump.py is modified to exit with non-zero if an error is
encountered while parsing, to support this.
Reviewed-by: Alex Bennée
Reviewed-by: Pavel Dovgalyuk
Signed-off-by: Nicholas Piggin
v5: Update
chardev events to a muxed device don't get recorded because e.g.,
qemu_chr_be_write() checks whether the base device has the record flag
set.
This can be seen when replaying a trace that has characters typed into
the console, an examination of the log shows they are not recorded.
Setting QEMU_CHA
Sort decoder functions to be ascending in order of event number,
same as the decoder tables.
Reviewed-by: Alex Bennée
Signed-off-by: Nicholas Piggin
---
scripts/replay-dump.py | 56 +-
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/script
Since v5, I cut down the series significantly to just the better
reviewed parts, without adding new CI testing, since there are
still be a few hiccups. aarch64 had some hangs Alex noticed, and
x86_64 doesn't seem to be working anymore for me (with the big
replay_linux.py test). But with this series
On 8/13/24 01:55, Stefan Hajnoczi wrote:
The following changes since commit 0f397dcfecc9211d12c2c720c01eb32f0eaa7d23:
Merge tag 'pull-nbd-2024-08-08' ofhttps://repo.or.cz/qemu/ericb into staging
(2024-08-09 08:40:37 +1000)
are available in the Git repository at:
https://gitlab.com/stefa
ository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20240812
for you to fetch changes up to ed5031ad5d4c4c3b6eee6ab21aa95ccfc9dffdd4:
arm/virt: place power button pin number on a define (2024-08-12 11:40
Currently, QEMU exposes CPUID 0x1f to guest only when necessary, i.e.,
when topology level that cannot be enumerated by leaf 0xB, e.g., die or
module level, are configured for the guest, e.g., -smp xx,dies=2.
However, 1) TDX architecture forces to require CPUID 0x1f to configure CPU
topology. and
Since '/var/log/qga-fsfreeze-hook.log' is not included to proper
selinux context 'system_u:object_r:virt_qemu_ga_log_t:s0', it
should be changed to '/var/log/qemu-ga/qga-fsfreeze-hook.log'
Jira: https://issues.redhat.com/browse/RHEL-52250
Signed-off-by: Dehan Meng
---
scripts/qemu-guest-agent/fs
On 8/8/2024 10:46 PM, Zhao Liu wrote:
On Thu, Aug 08, 2024 at 09:59:07PM +0800, Xiaoyao Li wrote:
Date: Thu, 8 Aug 2024 21:59:07 +0800
From: Xiaoyao Li
Subject: Re: [PATCH] i386/cpu: Introduce enable_cpuid_0x1f to force
exposing CPUID 0x1f
On 8/8/2024 6:09 PM, Zhao Liu wrote:
Hi Xiaoyao,
P
>-Original Message-
>From: CLEMENT MATHIEU--DRIF
>Subject: Re: [PATCH v2 03/17] intel_iommu: Add a placeholder variable for
>scalable modern mode
>
>
>
>On 08/08/2024 14:31, Duan, Zhenzhong wrote:
>> Caution: External email. Do not open attachments or click links,
>> unless this email co
>-Original Message-
>From: CLEMENT MATHIEU--DRIF
>Subject: Re: [PATCH v2 04/17] intel_iommu: Flush stage-2 cache in PASID-
>selective PASID-based iotlb invalidation
>
>
>
>On 08/08/2024 14:40, Duan, Zhenzhong wrote:
>> Caution: External email. Do not open attachments or click links,
>> u
On 8/12/24 14:14, Philippe Mathieu-Daudé wrote:
> On 12/8/24 03:42, zhenwei pi wrote:
>> QCryptodevBackendServiceType was introduced by
>> bc304a6442e (cryptodev: Introduce server type in QAPI). However there
>> is a lack of member description. Thanks to Markus for pointing out
>> this.
>>
>> Signe
On Mon, 12 Aug 2024, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Signed-off-by: Edgar E. Iglesias
Reviewed-by: Stefano Stabellini
> ---
> MAINTAINERS | 1 +
> docs/system/i386/xenpvh.rst | 49 +
> docs/system/target-i386.rst
On Mon, 12 Aug 2024, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> This adds a Xen PVH x86 machine based on the PVH Common
> module used by the ARM PVH machine.
>
> Signed-off-by: Edgar E. Iglesias
> ---
> hw/i386/xen/meson.build | 1 +
> hw/i386/xen/xen-pvh.c | 196
On Mon, 12 Aug 2024, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Add support for optionally creating a PCIe/GPEX controller.
>
> Signed-off-by: Edgar E. Iglesias
> ---
> hw/xen/xen-pvh-common.c | 66 +
> include/hw/xen/xen-pvh-common.h | 10
On Mon, 12 Aug 2024, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Rename xen_arm.c -> xen-pvh.c to better express that this
> is a PVH machine and to align with x86 HVM and future PVH
> machine filenames:
> hw/i386/xen/xen-hvm.c
> hw/i386/xen/xen-pvh.c (in preparation)
>
> No functio
On Mon, 12 Aug 2024, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> We've been creating the virtio-mmio devices in forwards order
> but since the qbus lists prepend (rather than append) entries,
> the virtio busses end up with decreasing base address order.
>
> Xen enables virtio-mmio
On Mon, 12 Aug 2024, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Break out a common Xen PVH module in preparation for
> adding a x86 Xen PVH Machine.
>
> Signed-off-by: Edgar E. Iglesias
> ---
> hw/arm/trace-events | 5 -
> hw/arm/xen_arm.c| 154 +
On Mon, 12 Aug 2024, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Add SMP support for Xen PVH ARM guests. Create max_cpus ioreq
> servers to handle hotplug.
>
> Signed-off-by: Edgar E. Iglesias
> ---
> hw/arm/xen_arm.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
On Mon, 12 Aug 2024, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Update file header to use SPDX and remove stray empty
> comment line.
>
> No functional changes.
>
> Signed-off-by: Edgar E. Iglesias
Acked-by: Stefano Stabellini
> ---
> hw/arm/xen_arm.c | 19 +-
On Mon, 12 Aug 2024, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Signed-off-by: Edgar E. Iglesias
Acked-by: Stefano Stabellini
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 10af212632..a24c2e14d9 100644
> --- a/M
On Mon, 12 Aug 2024, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Tweak machine description to better express that this is
> a Xen PVH machine for ARM.
>
> Signed-off-by: Edgar E. Iglesias
Reviewed-by: Stefano Stabellini
> ---
> hw/arm/xen_arm.c | 2 +-
> 1 file changed, 1 inse
On 2024/7/21 03:15, Steve Sistare wrote:
Do not map VFIO PCI BARs for DMA. This stops a raft of warnings of the
following form at QEMU start time when using -object iommufd:
qemu-kvm: warning: IOMMU_IOAS_MAP failed: Bad address, PCI BAR?
qemu-kvm: vfio_container_dma_map(0x58282db0, 0x880001
On 6/14/24 9:36 AM, Salil Mehta wrote:
Add CPU hot-unplug hooks and update hotplug hooks with additional sanity checks
for use in hotplug paths.
Note: The functional contents of the hooks (currently left with TODO comments)
will be gradually filled in subsequent patches in an incremental approac
On 6/14/24 9:36 AM, Salil Mehta wrote:
During `machvirt_init()`, QOM ARMCPU objects are pre-created along with the
corresponding KVM vCPUs in the host for all possible vCPUs. This is necessary
due to the architectural constraint that KVM restricts the deferred creation of
KVM vCPUs and VGIC initi
On 6/14/24 9:36 AM, Salil Mehta wrote:
ACPI CPU hotplug state (is_present=_STA.PRESENT, is_enabled=_STA.ENABLED) for
all the possible vCPUs MUST be initialized during machine init. This is done
during the creation of the GED device. VMM/Qemu MUST expose/fake the ACPI state
of the disabled vCPUs t
On 6/14/24 9:36 AM, Salil Mehta wrote:
In the ARMv8 architecture, the GIC must know all the CPUs it is connected to
during its initialization, and this cannot change afterward. This must be
ensured during the initialization of the VGIC as well in KVM, which requires all
vCPUs to be created and pr
On 8/12/24 6:15 PM, Igor Mammedov wrote:
On Mon, 12 Aug 2024 14:35:56 +1000
Gavin Shan wrote:
On 6/14/24 9:36 AM, Salil Mehta wrote:
This shall be used to store user specified topology{socket,cluster,core,thread}
and shall be converted to a unique 'vcpu-id' which is used as slot-index during
Returning a raw areg does not preserve the value if the areg
is subsequently modified. Fixes, e.g. "jsr (sp)", where the
return address is pushed before the branch.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2483
Signed-off-by: Richard Henderson
---
target/m68k/translate.c | 4 +++-
v2
--
rebased on top of master (plugins doc was split between several files)
v3
--
fix bad commit message
On 8/12/24 16:19, Pierrick Bouvier wrote:
Reflect recent changes on API (inline ops) and new plugins.
Signed-off-by: Pierrick Bouvier
---
docs/about/emulation.rst | 49 +
Reflect recent changes on API (inline ops) and new plugins.
Signed-off-by: Pierrick Bouvier
---
docs/about/emulation.rst | 49 --
docs/devel/tcg-plugins.rst | 13 ++
2 files changed, 50 insertions(+), 12 deletions(-)
diff --git a/docs/about/emulatio
Signed-off-by: Pierrick Bouvier
---
docs/about/emulation.rst | 49 --
docs/devel/tcg-plugins.rst | 13 ++
2 files changed, 50 insertions(+), 12 deletions(-)
diff --git a/docs/about/emulation.rst b/docs/about/emulation.rst
index c03033e4e95..eea1261ba
On 8/13/24 03:56, Octavian Purdila wrote:
typedef struct {
...
union {
uint32_t PSELID; /* 0x0FF8 Peripheral Select and
* Flexcomm module ID */
struct {
uint32_t PERSEL : 3;/* [2..0] Peripheral Sele
On 8/13/24 07:14, Octavian Purdila wrote:
+#define BITS(hi, lo) (BIT(hi + 1) - BIT(lo))
+#define BIT_IS_SET(v, b) (((v) & BIT(b)) != 0)
To the extent we need these we should be putting them in
bits.h with the other bit-related operations. (But
prefer the existing MAKE_64BIT_MASK over ad
Peter, thanks for review! Will work on splitting this up a bit to support the
plumbing you mentioned KVM does today on ARM.
> On Aug 12, 2024, at 10:52 AM, Peter Maydell wrote:
>
> On Fri, 19 Jul 2024 at 00:03, Danny Canter wrote:
>>
>> This patch's main focus is to enable creating VMs with
A deadlock can be created if a new vcpu (a) triggers a scoreboard
reallocation, and another vcpu (b) wants to create a new scoreboard at
the same time.
In this case, (a) holds the plugin lock, and starts an exclusive
section, waiting for (b). But at the same time, (b) is waiting for
plugin lock.
Do not resize scoreboards if it was already done.
Pierrick Bouvier (1):
plugins: fix race condition with scoreboards
plugins/core.c | 38 --
1 file changed, 28 insertions(+), 10 deletions(-)
--
2.39.2
On 8/12/24 23:14, Peter Maydell wrote:
On Wed, 17 Jul 2024 at 07:11, Richard Henderson
wrote:
This includes SSHR, USHR, SSRA, USRA, SRSHR, URSHR, SRSRA, URSRA, SRI.
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate-a64.c | 109 +++--
target/arm/tcg/
On 7/28/24 20:30, Richard Henderson wrote:
On 7/23/24 09:23, Pierrick Bouvier wrote:
A deadlock can be created if a new vcpu (a) triggers a scoreboard
reallocation, and another vcpu (b) wants to create a new scoreboard at
the same time.
In this case, (a) holds the plugin lock, and starts an exc
On Sat, 20 Jul 2024 12:15:27 -0700
Steve Sistare wrote:
> Do not map VFIO PCI BARs for DMA. This stops a raft of warnings of the
> following form at QEMU start time when using -object iommufd:
>
> qemu-kvm: warning: IOMMU_IOAS_MAP failed: Bad address, PCI BAR?
> qemu-kvm: vfio_container_dma_map
On 8/12/24 17:28, Jason Wang wrote:
The following changes since commit 0f397dcfecc9211d12c2c720c01eb32f0eaa7d23:
Merge tag 'pull-nbd-2024-08-08' ofhttps://repo.or.cz/qemu/ericb into staging
(2024-08-09 08:40:37 +1000)
are available in the Git repository at:
https://github.com/jasowang/q
On Mon, Aug 12, 2024 at 8:33 AM Peter Maydell wrote:
>
> On Mon, 5 Aug 2024 at 21:17, Octavian Purdila wrote:
> >
> > Add register access utility functions for device models, like checking
> > aligned access and reading and writing to a register backstore.
>
>
> > Signed-off-by: Octavian Purdila
Hi,
On Monday, August 12, 2024 12:01:00 PM GMT+5:30 you wrote:
> On Sun, Aug 11, 2024 at 7:20 PM Sahil wrote:
> > On Wednesday, August 7, 2024 9:52:10 PM GMT+5:30 Eugenio Perez Martin wrote:
> > > On Fri, Aug 2, 2024 at 1:22 PM Sahil Siddiq wrote:
> > > > [...]
> > > > @@ -726,17 +738,30 @@ void
12.08.2024 11:57, Alexander Ivanov wrote:
Move local_err initialization inside the loop in the module_load_qom_all()
function. This change ensures that the error variable is reset to NULL for
each iteration of the loop. This prevents triggering assert(*errp == NULL)
failure in error_setv() when l
Steve Sistare writes:
> CPR preserves memory in place, so there is no need to track dirty memory.
> By skipping it, CPR can support devices that do not support tracking.
>
> Signed-off-by: Steve Sistare
> ---
> system/memory.c | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git
On Mon, Aug 12, 2024 at 9:22 AM Daniel P. Berrangé wrote:
>
> On Mon, Aug 12, 2024 at 05:10:52PM +0100, Peter Maydell wrote:
> > On Mon, 5 Aug 2024 at 21:17, Octavian Purdila wrote:
> > > It also introduces unit tests for device models. To allow accessing
> > > registers from unit tests a system
On 8/8/2024 2:32 PM, Steven Sistare wrote:
On 7/29/2024 8:29 AM, Igor Mammedov wrote:
On Sat, 20 Jul 2024 16:28:25 -0400
Steven Sistare wrote:
On 7/16/2024 5:19 AM, Igor Mammedov wrote:
On Sun, 30 Jun 2024 12:40:24 -0700
Steve Sistare wrote:
Allocate anonymous memory using mmap MAP_ANON or
On Tue, Apr 16, 2024 at 7:54 AM Stefan Fritsch wrote:
> adding John Snow to CC because he investigated this in 2020.
>
> On Fri, 12 Apr 2024, Eric Blake wrote:
>
> > On Fri, Apr 12, 2024 at 10:06:17AM +0200, Stefan Fritsch wrote:
> > > Commit 99868af3d0 changed the hardcoded constant BDRV_SECTOR_
Hi all, any comments or RBs? This should be a slam dunk. Alex reviewed
9 versions of this code and all feedback has been incorporated. The only
significant change in this version is the addition of support for the
two container types: legacy and iommufd.
- Steve
On 7/9/2024 4:58 PM, Steve Sis
On Fri, Aug 02, 2024 at 10:10:43AM +0200, Markus Armbruster wrote:
> Can we additionally cut out the QemuOpts middleman in
> usbback_portid_add()?
>
> qdict = qdict_new();
> qdict_put_str(qdict, "driver", "usb-host");
> tmp = g_strdup_printf("%s.0", usbif->xendev.qdev.id);
> qdict_
On Fri, Aug 9, 2024 at 5:12 AM Markus Armbruster wrote:
> Philippe Mathieu-Daudé writes:
>
> > Hi Markus,
> >
> > On 8/8/24 20:26, Markus Armbruster wrote:
> >> Since we neglect to document several members of ChardevBackendKind,
> >> their description in the QEMU QMP Reference manual is "Not
> >
On Fri, Aug 02, 2024 at 10:01:20AM +0200, Markus Armbruster wrote:
> Stefan Hajnoczi writes:
>
> > The QMP device_add monitor command converts the QDict arguments to
> > QemuOpts and then back again to QDict. This process only supports scalar
> > types. Device properties like virtio-blk-pci's iot
On Mon, Aug 12, 2024 at 8:27 AM Peter Maydell wrote:
>
Hi Peter,
Thanks for the review!
> On Mon, 5 Aug 2024 at 21:17, Octavian Purdila wrote:
> >
> > From: Stefan Stanacar
> >
> > From: Stefan Stanacar
> >
> > The CMSIS System View Description format(CMSIS-SVD) is an XML based
> > descript
On Wed, Aug 07, 2024 at 10:48:56AM +1000, Richard Henderson wrote:
On 8/7/24 10:06, Deepak Gupta wrote:
commit 16ad9788 [1] restricted icount to qemu-system only. Although
assert in `cpu_loop_exec_tb` is on `icount_enabled()` which is 0 when
its qemu-user and debug build starts asserting.
Move a
These devices have an embedded interrupt controller which is programmed
with guest physical MSI address/data, which doesn't work. We need
vfio-pci kernel support to provide a device feature which disables
virtualization of the MSI capability registers. Then we can do brute
force testing for write
On Mon, Aug 12, 2024 at 05:10:52PM +0100, Peter Maydell wrote:
> On Mon, 5 Aug 2024 at 21:17, Octavian Purdila wrote:
> > It also introduces unit tests for device models. To allow accessing
> > registers from unit tests a system bus mock is created. The main
> > advantage of unit tests for device
On Mon, 5 Aug 2024 at 21:17, Octavian Purdila wrote:
> It also introduces unit tests for device models. To allow accessing
> registers from unit tests a system bus mock is created. The main
> advantage of unit tests for device models over QTest is that device
> models can be tested in isolation an
The following changes since commit 0f397dcfecc9211d12c2c720c01eb32f0eaa7d23:
Merge tag 'pull-nbd-2024-08-08' of https://repo.or.cz/qemu/ericb into staging
(2024-08-09 08:40:37 +1000)
are available in the Git repository at:
https://gitlab.com/stefanha/qemu.git tags/block-pull-request
for yo
From: Stefano Garzarella
libblkio supports BLKIO_REQ_FUA with write zeros requests only since
version 1.4.0, so let's inform the block layer that the blkio driver
supports it only in this case. Otherwise we can have runtime errors
as reported in https://issues.redhat.com/browse/RHEL-32878
Fixes:
Reviewed-by: Claudio Fontana
On 8/12/24 10:57, Alexander Ivanov wrote:
> Move local_err initialization inside the loop in the module_load_qom_all()
> function. This change ensures that the error variable is reset to NULL for
> each iteration of the loop. This prevents triggering assert(*errp == N
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