Re: [PATCH v3 04/10] vfio/iommufd: Introduce auto domain creation

On 7/8/24 4:34 PM, Joao Martins wrote: There's generally two modes of operation for IOMMUFD: * The simple user API which intends to perform relatively simple things with IOMMUs e.g. DPDK. It generally creates an IOAS and attach to VFIO and mainly performs IOAS_MAP and UNMAP. * The native IOMMUF

[PATCH v2 0/1] Fix the overrun check of the receive ring buffer

From: Hyman Huang The version 2 fix the corner case in e1000_has_rxbufs: Handle the scenario of RDH==RDT while total_size > s->rxbuf_size. Hyman Huang (1): e1000: Fix the overrun check of the receive ring buffer hw/net/e1000.c | 16 ++-- 1 file changed, 14 insertions(+), 2 deleti

[PATCH v2 1/1] e1000: Fix the overrun check of the receive ring buffer

From: Hyman Huang Unexpected work by certain Windows guests equipped with the e1000 interface can cause the network to go down and never come back up again unless the guest's interface is reset. To reproduce the failure: 1. Set up two guests with a Windows 2016 or 2019 server operating system

Re: [PATCH v3 05/10] vfio/iommufd: Probe and request hwpt dirty tracking capability

On 7/8/24 4:34 PM, Joao Martins wrote: Probe hardware dirty tracking support by querying device hw capabilities via IOMMUFD_GET_HW_INFO. In preparation to using the dirty tracking UAPI, request dirty tracking in the HWPT flags when the IOMMU supports dirty tracking. The auto domain logic allows

RE: [PATCH v3 04/10] vfio/iommufd: Introduce auto domain creation

>-Original Message- >From: Joao Martins >Subject: [PATCH v3 04/10] vfio/iommufd: Introduce auto domain creation > >There's generally two modes of operation for IOMMUFD: > >* The simple user API which intends to perform relatively simple things >with IOMMUs e.g. DPDK. It generally create

Re: [PATCH v3 03/10] vfio/iommufd: Return errno in iommufd_cdev_attach_ioas_hwpt()

On 7/8/24 5:32 PM, Joao Martins wrote: On 08/07/2024 16:28, Cédric Le Goater wrote: Hello Joao, On 7/8/24 4:34 PM, Joao Martins wrote: In preparation to implement auto domains have the attach function return the errno it got during domain attach instead of a bool. -EINVAL is tracked to track

[PATCH v6 1/4] intel_iommu: fix FRCD construction macro

From: Clément Mathieu--Drif The constant must be unsigned, otherwise the two's complement overrides the other fields when a PASID is present. Fixes: 1b2b12376c8a ("intel-iommu: PASID support") Signed-off-by: Clément Mathieu--Drif Reviewed-by: Yi Liu Reviewed-by: Zhenzhong Duan Reviewed-by: Mi

[PATCH v6 4/4] intel_iommu: make type match

From: Clément Mathieu--Drif The 'level' field in vtd_iotlb_key is an unsigned integer. We don't need to store level as an int in vtd_lookup_iotlb. This is not an issue by itself, but using unsigned here seems cleaner. Signed-off-by: Clément Mathieu--Drif Reviewed-by: Yi Liu --- hw/i386/intel

[PATCH v6 2/4] intel_iommu: move VTD_FRCD_PV and VTD_FRCD_PP declarations

From: Clément Mathieu--Drif These 2 macros are for high 64-bit of the FRCD registers. Declarations have to be moved accordingly. Signed-off-by: Clément Mathieu--Drif Reviewed-by: Minwoo Im --- hw/i386/intel_iommu_internal.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH v6 3/4] intel_iommu: fix type of the mask field in VTDIOTLBPageInvInfo

From: Clément Mathieu--Drif The mask we are trying to store into VTDIOTLBPageInvInfo.mask might not fit in an uint8_t. Use uint64_t to avoid overflows. Per the below code, it can overflow as am can be larger than 8 according to the CH 6.5.2.3 IOTLB Invalidate. And you may want a fix tag as well.

[PATCH v6 0/4] VT-d minor fixes

From: Clément Mathieu--Drif Various fixes for VT-d This series contains fixes that will be necessary when adding in-guest (fully emulated) SVM support. v6 intel_iommu: fix type of the mask field in VTDIOTLBPageInvInfo: - Add 'Fixes' tag v5 intel_iommu: fix FRCD construction mac

RE: [PATCH v3 02/10] backends/iommufd: Extend iommufd_backend_get_device_info() to fetch HW capabilities

>-Original Message- >From: Joao Martins >Subject: [PATCH v3 02/10] backends/iommufd: Extend >iommufd_backend_get_device_info() to fetch HW capabilities > >The helper will be able to fetch vendor agnostic IOMMU capabilities >supported both by hardware and software. Right now it is only i

Re: [PATCH v4 1/4] intel_iommu: fix FRCD construction macro

On 2024/7/9 10:51, Jason Wang wrote: On Mon, Jul 8, 2024 at 3:04 PM Yi Liu wrote: On 2024/7/5 19:01, CLEMENT MATHIEU--DRIF wrote: From: Clément Mathieu--Drif The constant must be unsigned, otherwise the two's complement overrides the other fields when a PASID is present. Fixes: 1b2b12376c8

Re: [PATCH v5 4/4] intel_iommu: make type match

On 2024/7/8 19:39, CLEMENT MATHIEU--DRIF wrote: From: Clément Mathieu--Drif The 'level' field in vtd_iotlb_key is an unsigned integer. We don't need to store level as an int in vtd_lookup_iotlb. This is not an issue by itself, but using unsigned here seems cleaner. Signed-off-by: Clément Math

Re: [PATCH v5 3/4] intel_iommu: fix type of the mask field in VTDIOTLBPageInvInfo

On 2024/7/8 19:39, CLEMENT MATHIEU--DRIF wrote: From: Clément Mathieu--Drif The mask we are trying to store into VTDIOTLBPageInvInfo.mask might not fit in an uint8_t. Use uint64_t to avoid overflows. Per the below code, it can overflow as am can be larger than 8 according to the CH 6.5.2.3 IOT

Re: QEMU Community Call Agenda Items (July 9th, 2024)

Cc: Block layer core maintainers Philippe Mathieu-Daudé writes: > On 8/7/24 16:58, Alex Bennée wrote: >> Hi, >> The KVM/QEMU community call is at: >>https://meet.jit.si/kvmcallmeeting >>@ >>9/7/2024 14:00 UTC >> Are there any agenda items for the sync-up? > > - I don't remember who m

Re: [PATCH v2] hw/i386/intel_iommu: Block CFI when necessary

Hi On 08/07/2024 12:08, Yuke Peng wrote: > Caution: External email. Do not open attachments or click links, unless this > email comes from a known sender and you know the content is safe. > > > According to Intel VT-d specification 5.1.4, CFI must be blocked when > Extended Interrupt Mode is enab

RE: [PATCH v3 01/10] vfio/iommufd: Don't fail to realize on IOMMU_GET_HW_INFO failure

Hi Joao, >-Original Message- >From: Joao Martins >Subject: [PATCH v3 01/10] vfio/iommufd: Don't fail to realize on >IOMMU_GET_HW_INFO failure > >mdevs aren't "physical" devices and when asking for backing IOMMU info, it >fails the entire provisioning of the guest. Fix that by filling caps

Re: [RFC] virtio-net: check the mac address for vdpa device

On Tue, Jul 9, 2024 at 10:56 AM Cindy Lu wrote: > > On Tue, 9 Jul 2024 at 10:47, Jason Wang wrote: > > > > On Tue, Jul 9, 2024 at 10:41 AM Cindy Lu wrote: > > > > > > On Tue, 9 Jul 2024 at 10:33, Jason Wang wrote: > > > > > > > > On Tue, Jul 9, 2024 at 10:27 AM Cindy Lu wrote: > > > > > > > >

Re: [RFC] virtio-net: check the mac address for vdpa device

On Tue, 9 Jul 2024 at 10:47, Jason Wang wrote: > > On Tue, Jul 9, 2024 at 10:41 AM Cindy Lu wrote: > > > > On Tue, 9 Jul 2024 at 10:33, Jason Wang wrote: > > > > > > On Tue, Jul 9, 2024 at 10:27 AM Cindy Lu wrote: > > > > > > > > When using VDPA device, we should verify whether the MAC address

Re: [PATCH] e1000: Fix the unexpected assumption that the receive buffer is full

On Tue, Jul 9, 2024 at 10:41 AM Jason Wang wrote: > On Mon, Jul 8, 2024 at 1:17 PM Yong Huang wrote: > > > > > > > > On Mon, Jul 8, 2024 at 11:21 AM Jason Wang wrote: > >> > >> On Sat, Jul 6, 2024 at 4:30 AM Hyman Huang > wrote: > >> > > >> > Unexpected work by certain Windows guests equipped

Re: [PATCH v2 0/4] virtio-net: Convert feature properties to OnOffAuto

On Mon, Jul 8, 2024 at 3:38 PM Akihiko Odaki wrote: > > Based-on: <20240428-rss-v10-0-73cbaa91a...@daynix.com> > ("[PATCH v10 00/18] virtio-net RSS/hash report fixes and improvements") > > Some features are not always available, and virtio-net used to disable > them when not available even if the

Re: [PATCH v4 1/4] intel_iommu: fix FRCD construction macro

On Mon, Jul 8, 2024 at 3:04 PM Yi Liu wrote: > > On 2024/7/5 19:01, CLEMENT MATHIEU--DRIF wrote: > > From: Clément Mathieu--Drif > > > > The constant must be unsigned, otherwise the two's complement > > overrides the other fields when a PASID is present. > > > > Fixes: 1b2b12376c8a ("intel-iommu:

[PATCH v8 08/10] hw/nvme: enable ONCS and rescap function

This commit enables ONCS to support the reservation function at the controller level. Also enables rescap function in the namespace by detecting the supported reservation function in the backend driver. Reviewed-by: Klaus Jensen Signed-off-by: Changqi Lu Signed-off-by: zhenwei pi --- hw/nvme/c

[PATCH v8 06/10] block/nvme: add reservation command protocol constants

Add constants for the NVMe persistent command protocol. The constants include the reservation command opcode and reservation type values defined in section 7 of the NVMe 2.0 specification. Reviewed-by: Stefan Hajnoczi Signed-off-by: Changqi Lu Signed-off-by: zhenwei pi --- include/block/nvme.h

Re: [RFC] virtio-net: check the mac address for vdpa device

On Tue, Jul 9, 2024 at 10:41 AM Cindy Lu wrote: > > On Tue, 9 Jul 2024 at 10:33, Jason Wang wrote: > > > > On Tue, Jul 9, 2024 at 10:27 AM Cindy Lu wrote: > > > > > > When using VDPA device, we should verify whether the MAC address in the > > > hardware matches the MAC address from the QEMU comm

[PATCH v8 05/10] hw/scsi: add persistent reservation in/out api for scsi device

Add persistent reservation in/out operations in the SCSI device layer. By introducing the persistent reservation in/out api, this enables the SCSI device to perform reservation-related tasks, including querying keys, querying reservation status, registering reservation keys, initiating and releasin

[PATCH v8 04/10] scsi/util: add helper functions for persistent reservation types conversion

This commit introduces two helper functions that facilitate the conversion between the persistent reservation types used in the SCSI protocol and those used in the block layer. Signed-off-by: Changqi Lu Signed-off-by: zhenwei pi Reviewed-by: Stefan Hajnoczi --- include/scsi/utils.h | 8 +

[PATCH v8 09/10] hw/nvme: add reservation protocal command

Add reservation acquire, reservation register, reservation release and reservation report commands in the nvme device layer. By introducing these commands, this enables the nvme device to perform reservation-related tasks, including querying keys, querying reservation status, registering reservati

[PATCH v8 02/10] block/raw: add persistent reservation in/out driver

Add persistent reservation in/out operations for raw driver. The following methods are implemented: bdrv_co_pr_read_keys, bdrv_co_pr_read_reservation, bdrv_co_pr_register, bdrv_co_pr_reserve, bdrv_co_pr_release, bdrv_co_pr_clear and bdrv_co_pr_preempt. Signed-off-by: Changqi Lu Signed-off-by: zhe

[PATCH v8 10/10] block/iscsi: add persistent reservation in/out driver

Add persistent reservation in/out operations for iscsi driver. The following methods are implemented: bdrv_co_pr_read_keys, bdrv_co_pr_read_reservation, bdrv_co_pr_register, bdrv_co_pr_reserve, bdrv_co_pr_release, bdrv_co_pr_clear and bdrv_co_pr_preempt. Signed-off-by: Changqi Lu Signed-off-by: z

[PATCH v8 07/10] hw/nvme: add helper functions for converting reservation types

This commit introduces two helper functions that facilitate the conversion between the reservation types used in the NVME protocol and those used in the block layer. Reviewed-by: Klaus Jensen Reviewed-by: Stefan Hajnoczi Signed-off-by: Changqi Lu Signed-off-by: zhenwei pi --- hw/nvme/nvme.h |

[PATCH v8 03/10] scsi/constant: add persistent reservation in/out protocol constants

Add constants for the persistent reservation in/out protocol in the scsi/constant module. The constants include the persistent reservation command, type, and scope values defined in sections 6.13 and 6.14 of the SCSI Primary Commands-4 (SPC-4) specification. Signed-off-by: Changqi Lu Signed-off-b

[PATCH v8 01/10] block: add persistent reservation in/out api

Add persistent reservation in/out operations at the block level. The following operations are included: - read_keys:retrieves the list of registered keys. - read_reservation: retrieves the current reservation status. - register: registers a new reservation key. - reserve:

[PATCH v8 00/10] Support persistent reservation operations

Sorry, due to network problems, the patch I sent earlier was incomplete. Stefan, the issue you mentioned has been fixed. Almost all patches have been reviewed, thank you very much to Stefan and Klaus. v7->v8: - Fix num_keys may be less than 0 at scsi_pr_read_keys_complete(). - Fix buf memory le

Re: [PATCH] e1000: Fix the unexpected assumption that the receive buffer is full

On Mon, Jul 8, 2024 at 1:17 PM Yong Huang wrote: > > > > On Mon, Jul 8, 2024 at 11:21 AM Jason Wang wrote: >> >> On Sat, Jul 6, 2024 at 4:30 AM Hyman Huang wrote: >> > >> > Unexpected work by certain Windows guests equipped with the e1000 >> > interface can cause the network to go down and never

Re: [RFC] virtio-net: check the mac address for vdpa device

On Tue, 9 Jul 2024 at 10:33, Jason Wang wrote: > > On Tue, Jul 9, 2024 at 10:27 AM Cindy Lu wrote: > > > > When using VDPA device, we should verify whether the MAC address in the > > hardware matches the MAC address from the QEMU command line. If not, > > we will need to update the related inform

Re: [RFC] virtio-net: check the mac address for vdpa device

On Tue, Jul 9, 2024 at 10:27 AM Cindy Lu wrote: > > When using VDPA device, we should verify whether the MAC address in the > hardware matches the MAC address from the QEMU command line. If not, > we will need to update the related information. > > Signed-off-by: Cindy Lu This seems to be a work

[RFC] virtio-net: check the mac address for vdpa device

When using VDPA device, we should verify whether the MAC address in the hardware matches the MAC address from the QEMU command line. If not, we will need to update the related information. Signed-off-by: Cindy Lu --- hw/net/virtio-net.c | 15 +++ 1 file changed, 11 insertions(+), 4 d

RE: Question: xen + vhost user

> Subject: Re: Question: xen + vhost user > > +Edgar > > I don't think we are using vhost-user so I am unable to help, but adding > Edgar just in case Thanks, just an update, it works after some code changes to Qemu. Thanks, Peng. > > On Sun, 30 Jun 2024, Peng Fan wrote: > > Hi All, > > > > I

[PATCH v1 0/1] Fix the overrun check of the receive ring buffer

This patch is based on the previouse version: https://patchew.org/QEMU/c7338afab65df208772f215567f323ae9b3c5910.1720210988.git.yong.hu...@smartx.com/ Some code clean was made in this patch. Please review. Thanks Hyman Huang (1): e1000: Fix the overrun check of the receive ring buffer hw/net

[PATCH v1 1/1] e1000: Fix the overrun check of the receive ring buffer

Unexpected work by certain Windows guests equipped with the e1000 interface can cause the network to go down and never come back up again unless the guest's interface is reset. To reproduce the failure: 1. Set up two guests with a Windows 2016 or 2019 server operating system. 2. Set up the e100

[PATCH 4/6] target/arm: Convert SADDW, SSUBW, UADDW, USUBW to decodetree

Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 86 +- target/arm/tcg/a64.decode | 5 ++ 2 files changed, 48 insertions(+), 43 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 07b9cdd78f..2

[PATCH 3/6] target/arm: Convert SQDMULL, SQDMLAL, SQDMLSL to decodetree

Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 604 ++--- target/arm/tcg/a64.decode | 33 ++ 2 files changed, 138 insertions(+), 499 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 95a37c71bc

[PATCH 2/6] target/arm: Convert SADDL, SSUBL, SABDL, SABAL, and unsigned to decodetree

Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 150 + target/arm/tcg/a64.decode | 9 ++ 2 files changed, 87 insertions(+), 72 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 8f0781e1f7..

[PATCH 5/6] target/arm: Convert ADDHN, SUBHN, RADDHN, RSUBHN to decodetree

Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 127 +++-- target/arm/tcg/a64.decode | 5 ++ 2 files changed, 61 insertions(+), 71 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 264d2eeb27..

[PATCH 6/6] target/arm: Convert PMULL to decodetree

Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 94 +- target/arm/tcg/a64.decode | 3 ++ 2 files changed, 15 insertions(+), 82 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 3e0dacdd63..5

[RESEND PATCH 0/6] target/arm: AdvSIMD decodetree conversion, part 3

[Sorry about the @qemu.prg typo; resend for anyone replying.] A small set, but better than waiting for a larger set. It's a good stopping point, finishing the convertion of disas_simd_three_reg_diff disas_simd_scalar_three_reg_diff disas_simd_indexed r~ Richard Henderson (6): target/a

[PATCH 1/6] target/arm: Convert SMULL, UMULL, SMLAL, UMLAL, SMLSL, UMLSL to decodetree

Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 184 - target/arm/tcg/a64.decode | 22 2 files changed, 156 insertions(+), 50 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 6c07aeaf3

[PATCH 4/6] target/arm: Convert SADDW, SSUBW, UADDW, USUBW to decodetree

Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 86 +- target/arm/tcg/a64.decode | 5 ++ 2 files changed, 48 insertions(+), 43 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 07b9cdd78f..2

[PATCH 1/6] target/arm: Convert SMULL, UMULL, SMLAL, UMLAL, SMLSL, UMLSL to decodetree

Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 184 - target/arm/tcg/a64.decode | 22 2 files changed, 156 insertions(+), 50 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 6c07aeaf3

[PATCH 5/6] target/arm: Convert ADDHN, SUBHN, RADDHN, RSUBHN to decodetree

Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 127 +++-- target/arm/tcg/a64.decode | 5 ++ 2 files changed, 61 insertions(+), 71 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 264d2eeb27..

[PATCH 3/6] target/arm: Convert SQDMULL, SQDMLAL, SQDMLSL to decodetree

Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 604 ++--- target/arm/tcg/a64.decode | 33 ++ 2 files changed, 138 insertions(+), 499 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 95a37c71bc

[PATCH 6/6] target/arm: Convert PMULL to decodetree

Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 94 +- target/arm/tcg/a64.decode | 3 ++ 2 files changed, 15 insertions(+), 82 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 3e0dacdd63..5

[PATCH 2/6] target/arm: Convert SADDL, SSUBL, SABDL, SABAL, and unsigned to decodetree

Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 150 + target/arm/tcg/a64.decode | 9 ++ 2 files changed, 87 insertions(+), 72 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 8f0781e1f7..

[PATCH 0/6] target/arm: AdvSIMD decodetree conversion, part 3

A small set, but better than waiting for a larger set. It's a good stopping point, finishing the convertion of disas_simd_three_reg_diff disas_simd_scalar_three_reg_diff disas_simd_indexed r~ Richard Henderson (6): target/arm: Convert SMULL, UMULL, SMLAL, UMLAL, SMLSL, UMLSL to dec

Re: [PATCH V13 8/8] docs/specs/acpi_hw_reduced_hotplug: Add the CPU Hotplug Event Bit

On 08/07/2024 13:55, Igor Mammedov wrote: On Mon, 8 Jul 2024 05:32:28 + Salil Mehta wrote: On 06/07/2024 14:45, Igor Mammedov wrote: On Fri, 7 Jun 2024 12:56:49 +0100 Salil Mehta wrote: GED interface is used by many hotplug events like memory hotplug, NVDIMM hotplug and non-hotplug

Re: [PATCH V13 1/8] accel/kvm: Extract common KVM vCPU {creation,parking} code

Hi Igor, On 08/07/2024 13:32, Igor Mammedov wrote: On Sat, 6 Jul 2024 15:43:01 + Salil Mehta wrote: Hi Igor, Thanks for taking out time to review. On Sat, Jul 6, 2024 at 1:12 PM Igor Mammedov wrote: On Fri, 7 Jun 2024 12:56:42 +0100 Salil Mehta wrote: KVM vCPU creation is done on

Re: [PATCH v1 2/2] xen: mapcache: Fix unmapping of first entries in buckets

On Tue, 2 Jul 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > This fixes the clobbering of the entry->next pointer when > unmapping the first entry in a bucket of a mapcache. > > Fixes: 123acd816d ("xen: mapcache: Unmap first entries in buckets") > Reported-by: Anthony PERARD > S

Re: [PATCH v1 1/2] physmem: Bail out qemu_ram_block_from_host() for invalid ram addrs

On Tue, 2 Jul 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Bail out in qemu_ram_block_from_host() when > xen_ram_addr_from_mapcache() does not find an existing > mapping. > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini > --- > system/physmem.c | 4 +++

Re: Question: xen + vhost user

+Edgar I don't think we are using vhost-user so I am unable to help, but adding Edgar just in case On Sun, 30 Jun 2024, Peng Fan wrote: > Hi All, > > I am trying to enable vhost user input with xen hypervisor on i.MX95, using > qemu > vhost-user-input. But meet " Invalid vring_addr message ". M

Re: [PATCH v4 3/4] migration: Introduce 'qatzip' compression method

On Fri, Jul 05, 2024 at 11:29:00AM -0700, Yichen Wang wrote: > From: Bryan Zhang > > Adds support for 'qatzip' as an option for the multifd compression > method parameter, and implements using QAT for 'qatzip' compression and > decompression. > > Signed-off-by: Bryan Zhang > Signed-off-by: Hao

Re: [PATCH v4 2/4] migration: Add migration parameters for QATzip

On Fri, Jul 05, 2024 at 11:28:59AM -0700, Yichen Wang wrote: > +# @multifd-qatzip-sw-fallback: Enable software fallback if QAT hardware > +# is unavailable. Defaults to false. Software fallback performance > +# is very poor compared to regular zlib, so be cautious about > +# enabling th

Re: [RFC PATCH v42 96/98] hw/sd/sdcard: Support boot area in emmc image

On 7/8/24 6:58 PM, Philippe Mathieu-Daudé wrote: Hi Joel, Cédric, On 28/6/24 09:02, Philippe Mathieu-Daudé wrote: From: Joel Stanley This assumes a specially constructed image:    dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M    dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc    dd

Re: [PATCH v6 7/7] tests/tcg/x86_64: add test for plugin memory access

Pierrick Bouvier writes: > Add an explicit test to check expected memory values are read/written. > For sizes 8, 16, 32, 64 and 128, we generate a load/store operation. > For size 8 -> 64, we generate an atomic __sync_val_compare_and_swap too. > For 128bits memory access, we rely on SSE2 instruct

Re: [PATCH] include/hw/qdev-core.h: Correct and clarify gpio doc comments

On Mon, 8 Jul 2024, Peter Maydell wrote: The doc comments for the functions for named GPIO inputs and outputs had a couple of problems: * some copy-and-paste errors meant the qdev_connect_gpio_out_named() doc comment had references to input GPIOs that should be to output GPIOs * it wasn't ver

Re: [RFC PATCH v4 0/7] Add Rust support, implement ARM PL011

Il lun 8 lug 2024, 20:39 Manos Pitsidianakis ha scritto: > > > On Mon, 8 Jul 2024, 21:34 Paolo Bonzini, wrote: > >> >> >> Il lun 8 lug 2024, 19:12 Daniel P. Berrangé ha >> scritto: >> >>> That's exactly why I suggest its a pre-requisite for merging >>> this. Unless we're able to demonstrate tha

Re: QEMU Community Call Agenda Items (July 9th, 2024)

On 8/7/24 16:58, Alex Bennée wrote: Hi, The KVM/QEMU community call is at: https://meet.jit.si/kvmcallmeeting @ 9/7/2024 14:00 UTC Are there any agenda items for the sync-up? - I don't remember who mentioned "3 phase reset and KVM", maybe Daniel Barboza or Peter Xu. - Questions

Re: [RFC PATCH v4 0/7] Add Rust support, implement ARM PL011

On Mon, 8 Jul 2024, 21:34 Paolo Bonzini, wrote: > > > Il lun 8 lug 2024, 19:12 Daniel P. Berrangé ha > scritto: > >> That's exactly why I suggest its a pre-requisite for merging >> this. Unless we're able to demonstrate that we can enable >> Rust on all our CI platforms, the benefits of Rust wil

Re: [RFC PATCH v4 0/7] Add Rust support, implement ARM PL011

Il lun 8 lug 2024, 19:12 Daniel P. Berrangé ha scritto: > That's exactly why I suggest its a pre-requisite for merging > this. Unless we're able to demonstrate that we can enable > Rust on all our CI platforms, the benefits of Rust will > not be realized in QEMU, and we'll have never ending debat

[PATCH] iov: don't use void* in pointer arithmetic in headers

void* pointer arithmetic is a GCC extentension which could not be available in other build tools (e.g. C++). This changes removes this assumption. Signed-off-by: Roman Kiryanov --- include/qemu/iov.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/qemu/iov.h b/inc

Re: [PATCH v4 00/19] SMMUv3 nested translation support

Hi Eric, On Mon, Jul 08, 2024 at 07:30:34PM +0200, Eric Auger wrote: > Hi Mostafa, > > On 7/1/24 13:02, Mostafa Saleh wrote: > > Currently, QEMU supports emulating either stage-1 or stage-2 SMMUs > > but not nested instances. > > This patch series adds support for nested translation in SMMUv3, >

[PATCH v5 10/13] hw/riscv/riscv-iommu: add DBG support

From: Tomasz Jeznach DBG support adds three additional registers: tr_req_iova, tr_req_ctl and tr_response. The DBG cap is always enabled. No on/off toggle is provided for it. Signed-off-by: Tomasz Jeznach Signed-off-by: Daniel Henrique Barboza Reviewed-by: Frank Chang --- hw/riscv/riscv-iom

[PATCH v5 11/13] hw/riscv/riscv-iommu: Add another irq for mrif notifications

From: Andrew Jones And add mrif notification trace. Signed-off-by: Andrew Jones Reviewed-by: Daniel Henrique Barboza Reviewed-by: Frank Chang --- hw/riscv/riscv-iommu-pci.c | 2 +- hw/riscv/riscv-iommu.c | 1 + hw/riscv/trace-events | 1 + 3 files changed, 3 insertions(+), 1 deletio

[PATCH v5 06/13] hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug

From: Tomasz Jeznach Generate device tree entry for riscv-iommu PCI device, along with mapping all PCI device identifiers to the single IOMMU device instance. Signed-off-by: Tomasz Jeznach Signed-off-by: Daniel Henrique Barboza Reviewed-by: Frank Chang Reviewed-by: Alistair Francis --- hw/r

[PATCH v5 04/13] pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device

The RISC-V IOMMU PCI device we're going to add next is a reference implementation of the riscv-iommu spec [1], which predicts that the IOMMU can be implemented as a PCIe device. However, RISC-V International (RVI), the entity that ratified the riscv-iommu spec, didn't bother assigning a PCI ID for

[PATCH v5 09/13] hw/riscv/riscv-iommu: add ATS support

From: Tomasz Jeznach Add PCIe Address Translation Services (ATS) capabilities to the IOMMU. This will add support for ATS translation requests in Fault/Event queues, Page-request queue and IOATC invalidations. Signed-off-by: Tomasz Jeznach Signed-off-by: Daniel Henrique Barboza Reviewed-by: Fr

[PATCH v5 05/13] hw/riscv: add riscv-iommu-pci reference device

From: Tomasz Jeznach The RISC-V IOMMU can be modelled as a PCIe device following the guidelines of the RISC-V IOMMU spec, chapter 7.1, "Integrating an IOMMU as a PCIe device". Signed-off-by: Tomasz Jeznach Signed-off-by: Daniel Henrique Barboza Reviewed-by: Frank Chang --- hw/riscv/meson.bui

[PATCH v5 03/13] hw/riscv: add RISC-V IOMMU base emulation

From: Tomasz Jeznach The RISC-V IOMMU specification is now ratified as-per the RISC-V international process. The latest frozen specifcation can be found at: https://github.com/riscv-non-isa/riscv-iommu/releases/download/v1.0/riscv-iommu.pdf Add the foundation of the device emulation for RISC-V

[PATCH v5 13/13] docs/specs: add riscv-iommu

Add a simple guideline to use the existing RISC-V IOMMU support we just added. This doc will be updated once we add the riscv-iommu-sys device. Signed-off-by: Daniel Henrique Barboza --- docs/specs/index.rst | 1 + docs/specs/riscv-iommu.rst | 55 ++ d

[PATCH v5 02/13] hw/riscv: add riscv-iommu-bits.h

From: Tomasz Jeznach This header will be used by the RISC-V IOMMU emulation to be added in the next patch. Due to its size it's being sent in separate for an easier review. One thing to notice is that this header can be replaced by the future Linux RISC-V IOMMU driver header, which would become

[PATCH v5 12/13] qtest/riscv-iommu-test: add init queues test

Add an additional test to further exercise the IOMMU where we attempt to initialize the command, fault and page-request queues. These steps are taken from chapter 6.2 of the RISC-V IOMMU spec, "Guidelines for initialization". It emulates what we expect from the software/OS when initializing the IO

[PATCH v5 07/13] test/qtest: add riscv-iommu-pci tests

To test the RISC-V IOMMU emulation we'll use its PCI representation. Create a new 'riscv-iommu-pci' libqos device that will be present with CONFIG_RISCV_IOMMU. This config is only available for RISC-V, so this device will only be consumed by the RISC-V libqos machine. Start with basic tests: a PC

[PATCH v5 08/13] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC)

From: Tomasz Jeznach The RISC-V IOMMU spec predicts that the IOMMU can use translation caches to hold entries from the DDT. This includes implementation for all cache commands that are marked as 'not implemented'. There are some artifacts included in the cache that predicts s-stage and g-stage e

[PATCH v5 00/13] riscv: QEMU RISC-V IOMMU Support

Hi, In this new version changes based on the suggestions made in v4 were made. The most notable change, however, is the merge of patches 3 (base IOMMU emulation and 9 (s-stage and g-stage) from v4 into a single patch. There were several instances throughout the revisions of this work where a comm

[PATCH v5 01/13] exec/memtxattr: add process identifier to the transaction attributes

From: Tomasz Jeznach Extend memory transaction attributes with process identifier to allow per-request address translation logic to use requester_id / process_id to identify memory mapping (e.g. enabling IOMMU w/ PASID translations). Signed-off-by: Tomasz Jeznach Reviewed-by: Frank Chang Revie

Re: [PATCH v4 00/19] SMMUv3 nested translation support

Hi Mostafa, On 7/1/24 13:02, Mostafa Saleh wrote: > Currently, QEMU supports emulating either stage-1 or stage-2 SMMUs > but not nested instances. > This patch series adds support for nested translation in SMMUv3, > this is controlled by property “arm-smmuv3.stage=nested”, and > advertised to gues

Re: [RFC PATCH v4 0/7] Add Rust support, implement ARM PL011

On Mon, Jul 08, 2024 at 06:55:40PM +0200, Paolo Bonzini wrote: > Il lun 8 lug 2024, 18:33 Daniel P. Berrangé ha > scritto: > > > This series is still missing changes to enable build on all targets > > during CI, including cross-compiles, to prove that we're doing the > > correct thing on all our

Re: [PATCH v4 18/19] hw/arm/smmuv3: Advertise S2FWB

Hi Mostafa, On 7/4/24 20:36, Jean-Philippe Brucker wrote: > On Mon, Jul 01, 2024 at 11:02:40AM +, Mostafa Saleh wrote: >> QEMU doesn's support memory attributes, so FWB is NOP, this >> might change in the future if memory attributre would be supported. attributes here and below as reported alo

Re: [RFC PATCH v42 96/98] hw/sd/sdcard: Support boot area in emmc image

Hi Joel, Cédric, On 28/6/24 09:02, Philippe Mathieu-Daudé wrote: From: Joel Stanley This assumes a specially constructed image: dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc co

Re: [RFC PATCH v4 0/7] Add Rust support, implement ARM PL011

Il lun 8 lug 2024, 18:33 Daniel P. Berrangé ha scritto: > This series is still missing changes to enable build on all targets > during CI, including cross-compiles, to prove that we're doing the > correct thing on all our targetted platforms. That's a must have > before considering it suitable fo

Re: [PATCH v4 17/19] hw/arm/smmuv3: Support and advertise nesting

Hi Mostafa, On 7/1/24 13:02, Mostafa Saleh wrote: > Everything is in place, consolidate parsing of STE cfg and setting > translation stage. > > Advertise nesting if stage requested is "nested". Reviewed-by: Eric Auger Eric > > Signed-off-by: Mostafa Saleh > --- > hw/arm/smmuv3.c | 35 +

Re: [PATCH v2 09/15] memory: Do not create circular reference with subregion

On Mon, Jul 08, 2024 at 10:06:44AM +0200, Philippe Mathieu-Daudé wrote: > On 6/7/24 13:59, Akihiko Odaki wrote: > > On 2024/07/03 2:44, Peter Xu wrote: > > > On Thu, Jun 27, 2024 at 10:37:52PM +0900, Akihiko Odaki wrote: > > > > A memory region does not use their own reference counters, but instead

Re: [RFC PATCH 0/4] hw/display/virtio-gpu: Introducing asynchronous guest display render

On 7/2/2024 11:26 PM, Marc-André Lureau wrote: Hi On Tue, Jul 2, 2024 at 10:11 PM Kim, Dongwon > wrote: Hi Marc-André, On 7/2/2024 3:29 AM, Marc-André Lureau wrote: > Hi > > On Fri, Jun 21, 2024 at 3:20 AM mailto:dongwon@intel.com>

Re: [RFC PATCH v4 0/7] Add Rust support, implement ARM PL011

On Mon, Jul 08, 2024 at 06:26:22PM +0200, Paolo Bonzini wrote: > On 7/4/24 14:15, Manos Pitsidianakis wrote: > > Changes from v3->v4: > > - Add rust-specific files to .gitattributes > > - Added help text to scripts/cargo_wrapper.py arguments (thanks Stephan) > > - Split bindings separate crate > >

Re: [PATCH v4 16/19] hw/arm/smmuv3: Handle translation faults according to SMMUPTWEventInfo

On 7/4/24 20:36, Jean-Philippe Brucker wrote: > On Mon, Jul 01, 2024 at 11:02:38AM +, Mostafa Saleh wrote: >> Previously, to check if faults are enabled, it was sufficient to check >> the current stage of translation and check the corresponding >> record_faults flag. >> >> However, with nest

Re: [PATCH v3 03/10] vfio/iommufd: Return errno in iommufd_cdev_attach_ioas_hwpt()

On 08/07/2024 16:32, Joao Martins wrote: > On 08/07/2024 16:28, Cédric Le Goater wrote: >> Hello Joao, >> >> On 7/8/24 4:34 PM, Joao Martins wrote: >>> In preparation to implement auto domains have the attach function >>> return the errno it got during domain attach instead of a bool. >>> >>> -EINV

Re: [RFC PATCH v4 0/7] Add Rust support, implement ARM PL011

On 7/4/24 14:15, Manos Pitsidianakis wrote: Changes from v3->v4: - Add rust-specific files to .gitattributes - Added help text to scripts/cargo_wrapper.py arguments (thanks Stephan) - Split bindings separate crate - Add declarative macros for symbols exported to QEMU to said crate - Lowered MSRV

Re: [PATCH] hw/nvme: Add support for setting the MQES for the NVMe emulation

On Wed, 2024-05-01 at 14:35 +0200, Klaus Jensen wrote: > On May  1 12:27, Berg, John wrote: > > On Thu, 2024-04-04 at 15:01 +0200, Klaus Jensen wrote: > > > On Apr  4 13:04, John Berg wrote: > > > > From: John Berg > > > > > > > > The MQES field in the CAP register describes the Maximum Queue > >

Re: [PATCH v4 14/19] hw/arm/smmu: Support nesting in the rest of commands

On 7/1/24 13:02, Mostafa Saleh wrote: > Some commands need rework for nesting, as they used to assume S1 > and S2 are mutually exclusive: > > - CMD_TLBI_NH_ASID: Consider VMID if stage-2 is supported > - CMD_TLBI_NH_ALL: Consider VMID if stage-2 is supported, otherwise > invalidate everything,

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