Re: [PATCH v2 0/9] plugins: Use unwind info for special gdb registers

On 6/6/24 05:29, Richard Henderson wrote: This is an attempt to fix https://gitlab.com/qemu-project/qemu/-/issues/2208 ("PC is not updated for each instruction in TCG plugins") I have only updated target/{i386,arm} so far, but basically all targets need updating for the new callbacks. Extra po

Re: [PATCH v2 5/9] target/i386: Split out gdb-internal.h

On 6/6/24 05:29, Richard Henderson wrote: Reviewed-by: Alex Bennée Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- target/i386/gdb-internal.h | 65 ++ target/i386/gdbstub.c | 1 + 2 files changed, 66 insertions(+) create mode 1

Re: [PATCH] util/bufferiszero: Split out host include files

On 6/6/24 07:14, Richard Henderson wrote: Split out host/bufferiszero.h.inc for x86, aarch64 and generic in order to avoid an overlong ifdef ladder. Signed-off-by: Richard Henderson --- host/include/aarch64/host/bufferiszero.h.inc | 76 host/include/generic/host/bufferiszero.h.inc

Re: [PATCH] target/i386: SEV: do not assume machine->cgs is SEV

Il gio 6 giu 2024, 05:52 Richard Henderson ha scritto: > > SEV_COMMON(object_dynamic_cast()) looks to be twice cast, we can just > > force to do conversion with pointer type: > > > > (SevCommonState *) object_dynamic_cast(OBJECT(cgs), TYPE_SEV_COMMON) > > You don't need the explicit cast either,

RE: [PATCH v7 6/7] migration/multifd: implement qpl compression and decompression

> -Original Message- > From: Fabiano Rosas > Sent: Thursday, June 6, 2024 6:26 AM > To: Liu, Yuan1 ; pet...@redhat.com; > pbonz...@redhat.com; marcandre.lur...@redhat.com; berra...@redhat.com; > th...@redhat.com; phi...@linaro.org > Cc: qemu-devel@nongnu.org; Liu, Yuan1 ; Zou, Nanhai > ; s

Re: [PATCH] hw/nvme: fix BAR size mismatch of SR-IOV VF

On Jun 5 06:13, Minwoo Im wrote: > PF initializes SR-IOV VF BAR0 region in nvme_init_sriov() with bar_size > calcaulted by Primary Controller Capability such as VQFRSM and VIFRSM > rather than `max_ioqpairs` and `msix_qsize` which is for PF only. > > In this case, the bar size reported in nvme_in

Re: [PATCH v4 5/5] backends/hostmem: Report error when memory size is unaligned

This patch has been successfully tested. Try to allocate some 2M hugepages in the host, then boot up a VM with the memory size unaligned and backed by a file, QEMU prompts the following message: qemu-system-x86_64: backend 'memory-backend-file' memory size must be multiple of 2 MiB Tested-by: Mari

[PATCH] util/bufferiszero: Split out host include files

Split out host/bufferiszero.h.inc for x86, aarch64 and generic in order to avoid an overlong ifdef ladder. Signed-off-by: Richard Henderson --- host/include/aarch64/host/bufferiszero.h.inc | 76 host/include/generic/host/bufferiszero.h.inc | 10 + host/include/i386/host/bufferiszero.h

Re: Unexpected error in rme_configure_one() at ../target/arm/kvm-rme.c:159

On 6/6/24 01:56, Jean-Philippe Brucker wrote: On Wed, Jun 05, 2024 at 11:28:47AM +1000, Gavin Shan wrote: WriteSections64(): /home/gavin/sandbox/CCA/edk2-guest/Build/ArmVirtQemu-AARCH64/DEBUG_GCC5/AARCH64/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore/DEBUG/ArmPlatformPrePeiCore.dll AARCH64

[PATCH v3 3/3] tests/qtest/x86: check for availability of older cpu models before running tests

It is better to check if some older cpu models like 486, athlon, pentium, penryn, phenom, core2duo etc are available before running their corresponding tests. Some downstream distributions may no longer support these older cpu models. Signature of add_feature_test() has been modified to return voi

[PATCH v3 0/3] x86 cpu test refactoring

Add a new library api to check for the support of a specific cpu type. Used the new api to check support for some older x86 cpu models before running the tests. CC: th...@redhat.com CC: imamm...@redhat.com CC: qemu-devel@nongnu.org CC: pbonz...@redhat.com CC: lviv...@redhat.com CC: m...@redhat.com

[PATCH v3 1/3] qtest/x86/numa-test: do not use the obsolete 'pentium' cpu

'pentium' cpu is old and obsolete and should be avoided for running tests if its not strictly needed. Use 'max' cpu instead for generic non-cpu specific numa test. CC: th...@redhat.com Reviewed-by: Thomas Huth Reviewed-by: Igor Mammedov Signed-off-by: Ani Sinha --- tests/qtest/numa-test.c | 3

[PATCH 2/3] tests/qtest/libqtest: add qtest_has_cpu() api

Added a new test api qtest_has_cpu() in order to check availability of some cpu models in the current QEMU binary. The specific architecture of the QEMU binary is selected using the QTEST_QEMU_BINARY environment variable. This api would be useful to run tests against some older cpu models after che

RE: [PATCH v6 18/19] intel_iommu: Implement [set|unset]_iommu_device() callbacks

>-Original Message- >From: Eric Auger >Subject: Re: [PATCH v6 18/19] intel_iommu: Implement >[set|unset]_iommu_device() callbacks > > > >On 6/4/24 07:46, Duan, Zhenzhong wrote: >> >>> -Original Message- >>> From: Eric Auger >>> Subject: Re: [PATCH v6 18/19] intel_iommu: Implemen

[PULL 0/6] loongarch-to-apply queue

The following changes since commit db2feb2df8d19592c9859efb3f682404e0052957: Merge tag 'pull-misc-20240605' of https://gitlab.com/rth7680/qemu into staging (2024-06-05 14:17:01 -0700) are available in the Git repository at: https://gitlab.com/gaosong/qemu.git tags/pull-loongarc

[PULL 4/6] hw/loongarch/virt: Use MemTxAttrs interface for misc ops

Use MemTxAttrs interface read_with_attrs/write_with_attrs for virt_iocsr_misc_ops. Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id: <20240528083855.1912757-3-gaos...@loongson.cn> --- hw/loongarch/virt.c | 36 1 file changed, 24 insertions(+), 12 del

[PULL 2/6] tests/qtest: Add numa test for loongarch system

From: Bibo Mao Add numa test case for loongarch system, it passes to run with command "make check-qtest". Signed-off-by: Bibo Mao Acked-by: Thomas Huth Tested-by: Song Gao Message-Id: <20240528082155.938586-1-maob...@loongson.cn> Signed-off-by: Song Gao --- tests/qtest/meson.build | 2 +-

[PULL 5/6] hw/loongarch/virt: Enable extioi virt extension

This patch adds a new board attribute 'v-eiointc'. A value of true enables the virt extended I/O interrupt controller. VMs working in kvm mode have 'v-eiointc' enabled by default. Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id: <20240528083855.1912757-4-gaos...@loongson.cn> --- hw/loo

[PULL 1/6] tests/libqos: Add loongarch virt machine node

From: Bibo Mao Add loongarch virt machine to the graph. It is a modified copy of the existing riscv virtmachine in riscv-virt-machine.c It contains a generic-pcihost controller, and an extra function loongarch_config_qpci_bus() to configure GPEX pci host controller information, such as ecam and

[PULL 3/6] hw/intc/loongarch_extioi: Add extioi virt extension definition

On LoongArch, IRQs can be routed to four vcpus with hardware extended IRQ model. This patch adds the virt extension definition so that the IRQ can route to 256 vcpus. 1.Extended IRQ model: | +---+ +-|+ +---+

[PULL 6/6] target/loongarch: fix a wrong print in cpu dump

From: lanyanzhi description: loongarch_cpu_dump_state() want to dump all loongarch cpu state registers, but there is a tiny typographical error when printing "PRCFG2". Cc: qemu-sta...@nongnu.org Signed-off-by: lanyanzhi Reviewed-by: Richard Henderson Reviewed-by: Song Gao Message-Id: <202

Re: [PATCH 2/2] util/bufferiszero: Add simd acceleration for loongarch64

On 2024/6/6 上午11:42, Richard Henderson wrote: On 6/5/24 20:36, maobibo wrote: static biz_accel_fn const accel_table[] = { buffer_is_zero_int_ge256, #ifdef __loongarch_sx buffer_is_zero_lsx, #endif #ifdef __loongarch_asx buffer_is_zero_lasx, #endif }; static unsigned best_accel

Re: [PATCH] target/i386: SEV: do not assume machine->cgs is SEV

On 6/5/24 20:45, Zhao Liu wrote: @@ -1710,7 +1710,9 @@ void sev_es_set_reset_vector(CPUState *cpu) { X86CPU *x86; CPUX86State *env; -SevCommonState *sev_common = SEV_COMMON(MACHINE(qdev_get_machine())->cgs); +ConfidentialGuestSupport *cgs = MACHINE(qdev_get_machine())->cgs;

Re: [PATCH 2/2] util/bufferiszero: Add simd acceleration for loongarch64

On 6/5/24 20:36, maobibo wrote: static biz_accel_fn const accel_table[] = { buffer_is_zero_int_ge256, #ifdef __loongarch_sx buffer_is_zero_lsx, #endif #ifdef __loongarch_asx buffer_is_zero_lasx, #endif }; static unsigned best_accel(void) { #ifdef __loongarch_asx /* lasx may b

Re: [PATCH 2/2] util/bufferiszero: Add simd acceleration for loongarch64

On 2024/6/6 上午11:27, Richard Henderson wrote: On 6/5/24 20:18, Richard Henderson wrote: On 6/5/24 19:30, maobibo wrote: On 2024/6/6 上午7:51, Richard Henderson wrote: On 6/5/24 02:32, Bibo Mao wrote: Different gcc versions have different features, macro CONFIG_LSX_OPT and CONFIG_LASX_OPT i

Re: [PATCH] target/i386: SEV: do not assume machine->cgs is SEV

On Thu, Jun 06, 2024 at 12:44:09AM +0200, Paolo Bonzini wrote: > Date: Thu, 6 Jun 2024 00:44:09 +0200 > From: Paolo Bonzini > Subject: [PATCH] target/i386: SEV: do not assume machine->cgs is SEV > X-Mailer: git-send-email 2.45.1 > > There can be other confidential computing classes that are not

[PATCH v2 5/9] target/i386: Split out gdb-internal.h

Reviewed-by: Alex Bennée Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- target/i386/gdb-internal.h | 65 ++ target/i386/gdbstub.c | 1 + 2 files changed, 66 insertions(+) create mode 100644 target/i386/gdb-internal.h diff --git a/t

[PATCH v2 6/9] target/i386: Introduce cpu_compute_eflags_ccop

This is a generalization of cpu_compute_eflags, with a dynamic value of cc_op, and is thus tcg specific. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- target/i386/cpu.h | 2 ++ target/i386/tcg/cc_helper.c | 10 ++ 2 files changed, 12 insertions(+) diff -

[PATCH v2 2/9] accel/tcg: Set CPUState.plugin_ra before all plugin callbacks

Store a host code address to use with the tcg unwinder when called from a plugin. Generate one such store per guest insn that uses a plugin callback. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/hw/core/cpu.h | 4 +--- accel/tcg/plugin-gen.c | 49 +++

[PATCH v2 7/9] target/i386: Implement TCGCPUOps for plugin register reads

Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- target/i386/tcg/tcg-cpu.c | 72 ++- 1 file changed, 56 insertions(+), 16 deletions(-) diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index cca19cd40e..2370053df2 100644 ---

[PATCH v2 0/9] plugins: Use unwind info for special gdb registers

This is an attempt to fix https://gitlab.com/qemu-project/qemu/-/issues/2208 ("PC is not updated for each instruction in TCG plugins") I have only updated target/{i386,arm} so far, but basically all targets need updating for the new callbacks. Extra points to anyone who sees how to avoid the ex

[PATCH v2 3/9] accel/tcg: Return the TranslationBlock from cpu_unwind_state_data

Adjust the i386 get_memio_eip function to use tb->cflags instead of tcg_cflags_has, which is technically more correct. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/exec/cpu-common.h | 9 + accel/tcg/translate-all.c | 9 + target/i386/helper.c |

[PATCH v2 8/9] target/arm: Add aarch64_tcg_ops

For the moment, this is an exact copy of arm_tcg_ops. Export arm_cpu_exec_interrupt for the cross-file reference. Signed-off-by: Richard Henderson --- target/arm/internals.h | 1 + target/arm/cpu.c | 2 +- target/arm/cpu64.c | 30 ++ 3 files changed, 32 in

[PATCH v2 9/9] target/arm: Implement TCGCPUOps for plugin register reads

Signed-off-by: Richard Henderson --- target/arm/internals.h | 7 +-- target/arm/cpu.c | 38 ++ target/arm/cpu64.c | 25 + target/arm/tcg/cpu-v7m.c | 2 ++ 4 files changed, 70 insertions(+), 2 deletions(-) diff --gi

[PATCH v2 4/9] plugins: Introduce TCGCPUOps callbacks for mid-tb register reads

Certain target registers are not updated continuously within the translation block. For normal exception handling we use unwind info to re-generate the correct value when required. Leverage that same info for reading those registers for plugins. All targets will need updating for these new callba

[PATCH v2 1/9] tcg: Introduce INDEX_op_plugin_pc

Add an opcode to find a code address within the current insn, for later use with unwinding. Generate the code generically using tcg_reg_alloc_do_movi. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/tcg/tcg-op-common.h | 1 + include/tcg/tcg-opc.h | 1 + tcg/

Re: [PATCH 2/2] util/bufferiszero: Add simd acceleration for loongarch64

On 6/5/24 20:18, Richard Henderson wrote: On 6/5/24 19:30, maobibo wrote: On 2024/6/6 上午7:51, Richard Henderson wrote: On 6/5/24 02:32, Bibo Mao wrote: Different gcc versions have different features, macro CONFIG_LSX_OPT and CONFIG_LASX_OPT is added here to detect whether gcc supports built-

Re: [PATCH 2/2] util/bufferiszero: Add simd acceleration for loongarch64

On 6/5/24 19:30, maobibo wrote: On 2024/6/6 上午7:51, Richard Henderson wrote: On 6/5/24 02:32, Bibo Mao wrote: Different gcc versions have different features, macro CONFIG_LSX_OPT and CONFIG_LASX_OPT is added here to detect whether gcc supports built-in lsx/lasx macro. Function buffer_zero_ls

Re: [PATCH] Hexagon: fix HVX store new

On 5/20/2024 10:53 AM, Matheus Tavares Bernardino wrote: At 09a7e7db0f (Hexagon (target/hexagon) Remove uses of op_regs_generated.h.inc, 2024-03-06), we've changed the logic of check_new_value() to use the new pre-calculated packet->insn[...].dest_idx instead of calculating the index on the fly

Re: [PATCH v4 1/4] target/hexagon: idef-parser remove unused defines

On 5/23/2024 7:58 AM, Anton Johansson via wrote: Before switching to GArray/g_string_printf we used fixed size arrays for output buffers and instructions arguments among other things. Macros defining the sizes of these buffers were left behind, remove them. Signed-off-by: Anton Johansson Rev

Re: [PATCH] stubs/meson: Fix qemuutil build when --disable-system

On Wed, Jun 05, 2024 at 11:25:49PM +0800, Zhao Liu wrote: > Date: Wed, 5 Jun 2024 23:25:49 +0800 > From: Zhao Liu > Subject: [PATCH] stubs/meson: Fix qemuutil build when --disable-system > X-Mailer: git-send-email 2.34.1 > > Compiling without system, user, tools or guest-agent fails with the > fo

Re: [PATCH 2/2] util/bufferiszero: Add simd acceleration for loongarch64

On 2024/6/6 上午7:51, Richard Henderson wrote: On 6/5/24 02:32, Bibo Mao wrote: Different gcc versions have different features, macro CONFIG_LSX_OPT and CONFIG_LASX_OPT is added here to detect whether gcc supports built-in lsx/lasx macro. Function buffer_zero_lsx() is added for 128bit simd fpu

Re: [PATCH 1/2] util: Add lasx cpuinfo for loongarch64

On 2024/6/5 下午7:53, Philippe Mathieu-Daudé wrote: On 5/6/24 11:32, Bibo Mao wrote: Lasx is 256bit vector FPU capability, lsx is 128bit vector VFP. lsx is added already, lasx is added here. Signed-off-by: Bibo Mao ---   host/include/loongarch64/host/cpuinfo.h | 1 +   util/cpuinfo-loongarch.c

Re: [PATCH v4 0/3] target/riscv/kvm: QEMU support for KVM Guest Debug on RISC-V

On Thu, Jun 6, 2024 at 11:50 AM Chao Du wrote: > > This series implements QEMU KVM Guest Debug on RISC-V, with which we > could debug RISC-V KVM guest from the host side, using software > breakpoints. > > This series is based on riscv-to-apply.next branch and is also > available at: > https://gith

[PATCH v4 0/3] target/riscv/kvm: QEMU support for KVM Guest Debug on RISC-V

This series implements QEMU KVM Guest Debug on RISC-V, with which we could debug RISC-V KVM guest from the host side, using software breakpoints. This series is based on riscv-to-apply.next branch and is also available at: https://github.com/Du-Chao/alistair23-qemu/tree/riscv-to-apply.next.0606 T

[PATCH v4 1/3] target/riscv/kvm: add software breakpoints support

This patch implements insert/remove software breakpoint process. For RISC-V, GDB treats single-step similarly to breakpoint: add a breakpoint at the next step address, then continue. So this also works for single-step debugging. Implement kvm_arch_update_guest_debug(): Set the control flag when t

[PATCH v4 2/3] target/riscv/kvm: handle the exit with debug reason

If the breakpoint belongs to the userspace then set the ret value. Signed-off-by: Chao Du Reviewed-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones Acked-by: Alistair Francis --- target/riscv/kvm/kvm-cpu.c | 20 1 file changed, 20 insertions(+) diff --git a/target/r

[PATCH v4 3/3] target/riscv/kvm: define TARGET_KVM_HAVE_GUEST_DEBUG

To enable the KVM GUEST DEBUG for RISC-V at QEMU side. Signed-off-by: Chao Du Reviewed-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones Acked-by: Alistair Francis --- configs/targets/riscv64-softmmu.mak | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/targets/riscv64-softmmu.m

Re: [PATCH] MAINTAINERS: Add reviewers for ASPEED BMCs

On Wed, 2024-06-05 at 14:03 +0800, Jamin Lin via wrote: > Add ASPEED members "Steven Lee", "Troy Lee" and "Jamin Lin" > to be reviewers of ASPEED BMCs. > > Signed-off-by: Jamin Lin > Signed-off-by: Troy Lee > Signed-off-by: Steven Lee I'm not very active wrt qemu these days but am still intere

Re: [PULL 00/20] Net patches

On Wed, Jun 5, 2024 at 6:14 PM Michael Tokarev wrote: > > 04.06.2024 10:37, Jason Wang wrote: > > Akihiko Odaki (18): > >tap: Remove tap_probe_vnet_hdr_len() > >tap: Remove qemu_using_vnet_hdr() > >net: Move virtio-net header length assertion > >net: Remove receive_

Re: [PATCH] cxl: Get rid of unused cfmw_list

On 05/06/2024 20:02, Jonathan Cameron wrote: > On Fri, 31 May 2024 14:13:17 +0800 > Li Zhijian wrote: > >> There is no user for this member. All '-M cxl-fmw.N' options have >> been parsed and saved to CXLState.fixed_windows. >> >> Signed-off-by: Li Zhijian > > Hi Li, > > Applied to my tree w

Re: [PATCH v3 4/6] target/riscv: Add 'P1P13' bit in SMSTATEEN0

On Tue, Jun 4, 2024 at 4:24 PM Fea.Wang wrote: > > Based on privilege 1.13 spec, there should be a bit56 for 'P1P13' in > mstateen0 that controls access to the hedeleg. > > Signed-off-by: Fea.Wang > Reviewed-by: Frank Chang > Reviewed-by: Weiwei Li Reviewed-by: Alistair Francis Alistair > -

Re: [PATCH v3 3/6] target/riscv: Support the version for ss1p13

On Tue, Jun 4, 2024 at 4:23 PM Fea.Wang wrote: > > Add RISC-V privilege 1.13 support. > > Signed-off-by: Fea.Wang > Signed-off-by: Fea.Wang > Reviewed-by: Frank Chang > Reviewed-by: Weiwei Li > Reviewed-by: LIU Zhiwei This should be the last patch in the series. The idea is that we add suppo

Re: [PULL v3 00/41] virtio: features,fixes

On 6/5/24 16:34, Michael S. Tsirkin wrote: Dropped acpi patches that had endian-ness issues. The following changes since commit 60b54b67c63d8f076152e0f7dccf39854dfc6a77: Merge tag 'pull-lu-20240526' of https://gitlab.com/rth7680/qemu into staging (2024-05-26 17:51:00 -0700) are available i

Re: [PATCH v3 2/6] target/riscv: Define macros and variables for ss1p13

On Tue, Jun 4, 2024 at 4:23 PM Fea.Wang wrote: > > Add macros and variables for RISC-V privilege 1.13 support. > > Signed-off-by: Fea.Wang > Reviewed-by: Frank Chang > Reviewed-by: Weiwei Li > Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Alistair > --- > target/riscv/cpu.h |

Re: [PULL 00/16] sprintf fixes

om/rth7680/qemu.git tags/pull-misc-20240605 for you to fetch changes up to b89fb575fd467ed5dfde4608d51c47c2aa427f30: disas/riscv: Use GString in format_inst (2024-06-05 12:29:54 -0700) util/hexdump: Use a GString for qemu_he

Re: [PATCH v3 0/3] target/riscv/kvm: QEMU support for KVM Guest Debug on RISC-V

On Wed, Jun 5, 2024 at 1:00 PM Chao Du wrote: > > This series implements QEMU KVM Guest Debug on RISC-V, with which we > could debug RISC-V KVM guest from the host side, using software > breakpoints. > > This series is based on riscv-to-apply.next branch and is also > available at: > https://githu

Re: [PATCH 2/2] util/bufferiszero: Add simd acceleration for loongarch64

On 6/5/24 02:32, Bibo Mao wrote: Different gcc versions have different features, macro CONFIG_LSX_OPT and CONFIG_LASX_OPT is added here to detect whether gcc supports built-in lsx/lasx macro. Function buffer_zero_lsx() is added for 128bit simd fpu optimization, and function buffer_zero_lasx() is

[PULL v3 38/41] tests/qtest/pvpanic: add tests for pvshutdown event

From: Thomas Weißschuh Validate that a shutdown via the pvpanic device emits the correct QMP events. Signed-off-by: Thomas Weißschuh Reviewed-by: Thomas Huth Message-Id: <20240527-pvpanic-shutdown-v8-7-5a28ec025...@t-8ch.de> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin -

[PULL v3 40/41] virtio-pci: Fix the failure process in kvm_virtio_pci_vector_use_one()

From: Cindy Lu In function kvm_virtio_pci_vector_use_one(), the function will only use the irqfd/vector for itself. Therefore, in the undo label, the failing process is incorrect. To fix this, we can just remove this label. Fixes: f9a09ca3ea ("vhost: add support for configure interrupt") Cc: qem

Re: [PATCH qemu ] hw/acpi: Fix big endian host creation of Generic Port Affinity Structures

On Wed, Jun 05, 2024 at 07:04:55PM +0100, Jonathan Cameron wrote: > Treating the HID as an integer caused it to get bit reversed > on big endian hosts running little endian guests. Treat it > as a character array instead. > > Fixes hw/acpi: Generic Port Affinity Structure Support > Tested-by: Ric

[PULL v3 30/41] hw/acpi/GI: Fix trivial parameter alignment issue.

From: Jonathan Cameron Before making additional modification, tidy up this misleading indentation. Reviewed-by: Ankit Agrawal Signed-off-by: Jonathan Cameron Message-Id: <20240524100507.32106-2-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin ---

[PULL v3 35/41] tests/qtest/pvpanic: use centralized definition of supported events

From: Thomas Weißschuh Avoid the necessity to update all tests when new events are added to the device. Acked-by: Thomas Huth Reviewed-by: Cornelia Huck Signed-off-by: Thomas Weißschuh Message-Id: <20240527-pvpanic-shutdown-v8-4-5a28ec025...@t-8ch.de> Reviewed-by: Michael S. Tsirkin Signed-o

[PULL v3 21/41] hw/mem/cxl_type3: Add support to create DC regions to type3 memory devices

From: Fan Ni With the change, when setting up memory for type3 memory device, we can create DC regions. A property 'num-dc-regions' is added to ct3_props to allow users to pass the number of DC regions to create. To make it easier, other region parameters like region base, length, and block size

[PULL v3 14/41] Revert "vhost-user: fix lost reconnect"

From: Li Feng This reverts commit f02a4b8e6431598612466f76aac64ab492849abf. Since the current patch cannot completely fix the lost reconnect problem, there is a scenario that is not considered: - When the virtio-blk driver is removed from the guest os, s->connected has no chance to be set to f

[PULL v3 24/41] hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support

From: Fan Ni Add dynamic capacity extent list representative to the definition of CXLType3Dev and implement get DC extent list mailbox command per CXL.spec.3.1:.8.2.9.9.9.2. Tested-by: Svetly Todorov Reviewed-by: Jonathan Cameron Signed-off-by: Fan Ni Message-Id: <20240523174651.1089554-10-ni

[PULL v3 37/41] pvpanic: Emit GUEST_PVSHUTDOWN QMP event on pvpanic shutdown signal

From: Alejandro Jimenez Emit a QMP event on receiving a PVPANIC_SHUTDOWN event. Even though a typical SHUTDOWN event will be sent, it will be indistinguishable from a shutdown originating from other cases (e.g. KVM exit due to KVM_SYSTEM_EVENT_SHUTDOWN) that also issue the guest-shutdown cause. A

[PULL v3 20/41] include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for type3 memory devices

From: Fan Ni Rename mem_size as static_mem_size for type3 memdev to cover static RAM and pmem capacity, preparing for the introduction of dynamic capacity to support dynamic capacity devices. Reviewed-by: Gregory Price Reviewed-by: Jonathan Cameron Signed-off-by: Fan Ni Message-Id: <202405231

[PULL v3 12/41] virtio-pci: only reset pm state during resetting

From: Jiqian Chen Fix bug imported by 27ce0f3afc9dd ("fix Power Management Control Register for PCI Express virtio devices" After this change, observe that QEMU may erroneously clear the power status of the device, or may erroneously clear non writable registers, such as NO_SOFT_RESET, etc. On

[PULL v3 29/41] hw/mem/cxl_type3: Allow to release extent superset in QMP interface

From: Fan Ni Before the change, the QMP interface used for add/release DC extents only allows to release an extent whose DPA range is contained by a single accepted extent in the device. With the change, we relax the constraints. As long as the DPA range of the extent is covered by accepted ext

[PULL v3 39/41] Revert "docs/specs/pvpanic: mark shutdown event as not implemented"

From: Thomas Weißschuh The missing functionality has been implemented now. This reverts commit e739d1935c461d0668057e9dbba9d06f728d29ec. Signed-off-by: Thomas Weißschuh Message-Id: <20240527-pvpanic-shutdown-v8-8-5a28ec025...@t-8ch.de> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S.

[PULL v3 33/41] linux-headers: update to 6.10-rc1

From: Thomas Weißschuh Signed-off-by: Thomas Weißschuh Message-Id: <20240527-pvpanic-shutdown-v8-2-5a28ec025...@t-8ch.de> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/standard-headers/linux/ethtool.h| 55 include/standard-headers/linux/pci_regs.h

[PULL v3 41/41] hw/cxl: Fix read from bogus memory

From: Ira Weiny Peter and coverity report: We've passed '&data' to address_space_write(), which means "read from the address on the stack where the function argument 'data' lives", so instead of writing 64 bytes of data to the guest , we'll write 64 bytes which st

[PULL v3 08/41] vhost/vhost-user: Add VIRTIO_F_NOTIFICATION_DATA to vhost feature bits

From: Jonah Palmer Add support for the VIRTIO_F_NOTIFICATION_DATA feature across a variety of vhost devices. The inclusion of VIRTIO_F_NOTIFICATION_DATA in the feature bits arrays for these devices ensures that the backend is capable of offering and providing support for this feature, and that i

[PULL v3 23/41] hw/mem/cxl_type3: Add host backend and address space handling for DC regions

From: Fan Ni Add (file/memory backed) host backend for DCD. All the dynamic capacity regions will share a single, large enough host backend. Set up address space for DC regions to support read/write operations to dynamic capacity for DCD. With the change, the following support is added: 1. Add a

[PULL v3 19/41] hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mailbox command support

From: Fan Ni Per cxl spec r3.1, add dynamic capacity (DC) region representative based on Table 8-165 and extend the cxl type3 device definition to include DC region information. Also, based on info in 8.2.9.9.9.1, add 'Get Dynamic Capacity Configuration' mailbox support. Note: we store region de

[PULL v3 25/41] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response

From: Fan Ni Per CXL spec 3.1, two mailbox commands are implemented: Add Dynamic Capacity Response (Opcode 4802h) 8.2.9.9.9.3, and Release Dynamic Capacity (Opcode 4803h) 8.2.9.9.9.4. For the process of the above two commands, we use two-pass approach. Pass 1: Check whether the input payload is

[PULL v3 13/41] vhost-user-gpu: fix import of DMABUF

From: Marc-André Lureau When using vhost-user-gpu with GL, qemu -display gtk doesn't show output and prints: qemu: eglCreateImageKHR failed Since commit 9ac06df8b ("virtio-gpu-udmabuf: correct naming of QemuDmaBuf size properties"), egl_dmabuf_import_texture() uses backing_{width,height} for the

[PULL v3 36/41] hw/misc/pvpanic: add support for normal shutdowns

From: Thomas Weißschuh Shutdown requests are normally hardware dependent. By extending pvpanic to also handle shutdown requests, guests can submit such requests with an easily implementable and cross-platform mechanism. Acked-by: Cornelia Huck Signed-off-by: Thomas Weißschuh Message-Id: <20240

[PULL v3 06/41] virtio-mmio: Handle extra notification data

From: Jonah Palmer Add support to virtio-mmio devices for handling the extra data sent from the driver to the device when the VIRTIO_F_NOTIFICATION_DATA transport feature has been negotiated. The extra data that's passed to the virtio-mmio device when this feature is enabled varies depending on

[PULL v3 15/41] vhost-user: fix lost reconnect again

From: Li Feng When the vhost-user is reconnecting to the backend, and if the vhost-user fails at the get_features in vhost_dev_init(), then the reconnect will fail and it will not be retriggered forever. The reason is: When the vhost-user fail at get_features, the vhost_dev_cleanup will be calle

[PULL v3 32/41] scripts/update-linux-headers: Copy setup_data.h to correct directory

From: Thomas Weißschuh Add the missing "include/" path component, so the files ends up in the correct place like the other headers. Fixes: 66210a1a30f2 ("scripts/update-linux-headers: Add setup_data.h to import list") Signed-off-by: Thomas Weißschuh Message-Id: <20240527-pvpanic-shutdown-v8-1-

[PULL v3 31/41] hw/acpi: Insert an acpi-generic-node base under acpi-generic-initiator

From: Jonathan Cameron This will simplify reuse when adding acpi-generic-port. Note that some error_printf() messages will now print acpi-generic-node whereas others will move to type specific cases in next patch so are left alone for now. Signed-off-by: Jonathan Cameron Message-Id: <2024052410

[PULL v3 02/41] vhost: Perform memory section dirty scans once per iteration

From: Si-Wei Liu On setups with one or more virtio-net devices with vhost on, dirty tracking iteration increases cost the bigger the number amount of queues are set up e.g. on idle guests migration the following is observed with virtio-net with vhost=on: 48 queues -> 78.11% [.] vhost_dev_sync_r

[PULL v3 34/41] hw/misc/pvpanic: centralize definition of supported events

From: Thomas Weißschuh The different components of pvpanic duplicate the list of supported events. Move it to the shared header file to minimize changes when new events are added. Reviewed-by: Thomas Huth Reviewed-by: Cornelia Huck Signed-off-by: Thomas Weißschuh Message-Id: <20240527-pvpanic

[PULL v3 16/41] hw/cxl/mailbox: change CCI cmd set structure to be a member, not a reference

From: Gregory Price This allows devices to have fully customized CCIs, along with complex devices where wrapper devices can override or add additional CCI commands without having to replicate full command structures or pollute a base device with every command that might ever be used. Signed-off-

[PULL v3 11/41] hw/virtio: Fix obtain the buffer id from the last descriptor

From: Wafer The virtio-1.3 specification writes: 2.8.6 Next Flag: Descriptor Chaining Buffer ID is included in the last descriptor in the list. If the feature (_F_INDIRECT_DESC) has been negotiated, install only one descript

[PULL v3 28/41] hw/cxl/cxl-mailbox-utils: Add superset extent release mailbox support

From: Fan Ni With the change, we extend the extent release mailbox command processing to allow more flexible release. As long as the DPA range of the extent to release is covered by accepted extent(s) in the device, the release can be performed. Tested-by: Svetly Todorov Reviewed-by: Gregory Pr

[PULL v3 04/41] virtio/virtio-pci: Handle extra notification data

From: Jonah Palmer Add support to virtio-pci devices for handling the extra data sent from the driver to the device when the VIRTIO_F_NOTIFICATION_DATA transport feature has been negotiated. The extra data that's passed to the virtio-pci device when this feature is enabled varies depending on th

[PULL v3 26/41] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents

From: Fan Ni To simulate FM functionalities for initiating Dynamic Capacity Add (Opcode 5604h) and Dynamic Capacity Release (Opcode 5605h) as in CXL spec r3.1 7.6.7.6.5 and 7.6.7.6.6, we implemented two QMP interfaces to issue add/release dynamic capacity extents requests. With the change, we al

[PULL v3 27/41] hw/mem/cxl_type3: Add DPA range validation for accesses to DC regions

From: Fan Ni All DPA ranges in the DC regions are invalid to access until an extent covering the range has been successfully accepted by the host. A bitmap is added to each region to record whether a DC block in the region has been backed by a DC extent. Each bit in the bitmap represents a DC blo

[PULL v3 22/41] hw/mem/cxl-type3: Refactor ct3_build_cdat_entries_for_mr to take mr size instead of mr as argument

From: Fan Ni The function ct3_build_cdat_entries_for_mr only uses size of the passed memory region argument, refactor the function definition to make the passed arguments more specific. Reviewed-by: Gregory Price Reviewed-by: Jonathan Cameron Signed-off-by: Fan Ni Message-Id: <20240523174651.

[PULL v3 03/41] vhost-vdpa: check vhost_vdpa_set_vring_ready() return value

From: Stefano Garzarella vhost_vdpa_set_vring_ready() could already fail, but if Linux's patch [1] will be merged, it may fail with more chance if userspace does not activate virtqueues before DRIVER_OK when VHOST_BACKEND_F_ENABLE_AFTER_DRIVER_OK is not negotiated. So better check its return val

[PULL v3 07/41] virtio-ccw: Handle extra notification data

From: Jonah Palmer Add support to virtio-ccw devices for handling the extra data sent from the driver to the device when the VIRTIO_F_NOTIFICATION_DATA transport feature has been negotiated. The extra data that's passed to the virtio-ccw device when this feature is enabled varies depending on th

[PULL v3 17/41] hw/cxl/mailbox: interface to add CCI commands to an existing CCI

From: Gregory Price This enables wrapper devices to customize the base device's CCI (for example, with custom commands outside the specification) without the need to change the base device. The also enabled the base device to dispatch those commands without requiring additional driver support.

[PULL v3 18/41] hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output payload of identify memory device command

From: Fan Ni Based on CXL spec r3.1 Table 8-127 (Identify Memory Device Output Payload), dynamic capacity event log size should be part of output of the Identify command. Add dc_event_log_size to the output payload for the host to get the info. Reviewed-by: Gregory Price Reviewed-by: Jonathan C

[PULL v3 09/41] Fix vhost user assertion when sending more than one fd

From: Christian Pötzsch If the client sends more than one region this assert triggers. The reason is that two fd's are 8 bytes and VHOST_MEMORY_BASELINE_NREGIONS is exactly 8. The assert is wrong because it should not test for the size of the fd array, but for the numbers of regions. Signed-off

[PULL v3 01/41] vhost: dirty log should be per backend type

From: Si-Wei Liu There could be a mix of both vhost-user and vhost-kernel clients in the same QEMU process, where separate vhost loggers for the specific vhost type have to be used. Make the vhost logger per backend type, and have them properly reference counted. Suggested-by: Michael S. Tsirkin

[PULL v3 05/41] virtio: Prevent creation of device using notification-data with ioeventfd

From: Jonah Palmer Prevent the realization of a virtio device that attempts to use the VIRTIO_F_NOTIFICATION_DATA transport feature without disabling ioeventfd. Due to ioeventfd not being able to carry the extra data associated with this feature, having both enabled is a functional mismatch and

[PULL v3 00/41] virtio: features,fixes

Dropped acpi patches that had endian-ness issues. The following changes since commit 60b54b67c63d8f076152e0f7dccf39854dfc6a77: Merge tag 'pull-lu-20240526' of https://gitlab.com/rth7680/qemu into staging (2024-05-26 17:51:00 -0700) are available in the Git repository at: https://git.kernel

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