> Why are the timestamps non-monotonic?
>
> In a situation like that maybe not only the negative timestamps are
> useless but even some positive timestamps are incorrect. I think it's
> worth understanding the nature of the instability before merging a
> fix.
I agree with Stefan on this. We'll
Fiona Ebner writes:
> From: John Snow
>
> for the mirror job. The bitmap's granularity is used as the job's
> granularity.
>
> The new @bitmap parameter is marked unstable in the QAPI and can
> currently only be used for @sync=full mode.
>
> Clusters initially dirty in the bitmap as well as new
Hi Daniel,
> Please describe it in terms of a QAPI definition, as that's what we're
> striving for with all QEMU public interfaces. Once the QAPI design is
> agreed, then the -object mapping is trivial, as -object's JSON format
> supports arbitrary QAPI structures.
Thank you for your guidance!
I
Normally discard requests are stored in the queue attached to BDRVQcow2State
to be processed later at once. Currently discard-no-unref option handling
causes these requests to be processed straight away. Let's fix that.
Note that when doing regular discards qcow2_free_any_cluster() would check
f
We basically fill 2 images with identical data and perform discard
operations with and without 'discard-no-unref' enabled. Then we check
that images still read identically, that their disk usage is the same
(i.e. fallocate(FALLOC_FL_PUNCH_HOLE|FALLOC_FL_KEEP_SIZE) is called for
both) and that with
v1: https://lists.nongnu.org/archive/html/qemu-devel/2023-10/msg07223.html
Andrey Drobyshev (11):
qcow2: make function update_refcount_discard() global
qcow2: simplify L2 entries accounting for discard-no-unref
qcow2: put discard requests in the common queue when discard-no-unref
enabled
Add a bunch of test cases covering new subclusters behaviour: unmap of
last allocated subclusters; unmap of subclusters within unallocated
cluster; discard of unallocated subclusters within a cluster; regular discard
of subclusters within a cluster; discard of last allocated subclusters.
Also make
This helper simply obtains the l2 table parameters of the cluster which
contains the given subclusters range. Right now this info is being
obtained and used by zero_l2_subclusters(). As we're about to introduce
the subclusters discard operation, this helper would let us avoid code
duplication.
A
Move the definition from iotests/250 to common.rc. This is used to
detect real disk usage of sparse files. In particular, we want to use
it for checking subclusters-based discards.
Signed-off-by: Andrey Drobyshev
---
tests/qemu-iotests/250 | 5 -
tests/qemu-iotests/common.rc | 6
This commit makes the discard operation work on the subcluster level
rather than cluster level. It introduces discard_l2_subclusters()
function and makes use of it in qcow2 discard implementation, much like
it's done with zero_in_l2_slice() / zero_l2_subclusters(). It also
changes the qcow2 drive
Commits 42a2890a and b2b10904 introduce handling of discard-no-unref
option in discard_in_l2_slice() and zero_in_l2_slice(). They add even
more if's when chosing the right l2 entry. What we really need for this
option is the new entry simply to contain the same host cluster offset,
no matter whet
This would ease debugging of write zeroes and discard operations.
Signed-off-by: Andrey Drobyshev
---
block/file-posix.c | 1 +
block/trace-events | 1 +
2 files changed, 2 insertions(+)
diff --git a/block/file-posix.c b/block/file-posix.c
index 35684f7e21..45134f0eef 100644
--- a/block/file-po
When zeroizing subclusters within single cluster, detect usage of the
BDRV_REQ_MAY_UNMAP flag and fall through to the subcluster-based discard
operation, much like it's done with the cluster-based discards. That
way subcluster-aligned operations "qemu-io -c 'write -z -u ...'" will
lead to actual u
We are going to need it for discarding separate subclusters. The
function itself doesn't do anything with the refcount tables, it simply
adds a discard request to the queue, so rename it to qcow2_queue_discard().
Signed-off-by: Andrey Drobyshev
Reviewed-by: Hanna Czenczek
---
block/qcow2-refco
When zeroizing the last non-zero subclusters within single cluster, it
makes sense to go zeroize the entire cluster and go down zero_in_l2_slice()
path right away. That way we'd also update the corresponding refcount
table.
Signed-off-by: Andrey Drobyshev
Reviewed-by: Hanna Czenczek
---
block/
On Mon, May 13, 2024 at 01:55:50PM +1000, Alistair Francis wrote:
> On Tue, May 7, 2024 at 3:24 PM Sia Jee Heng
> wrote:
>
> Can you describe why you are doing this and that it will be reverted
> in the commit message?
>
> Alistair
What motivation are you asking? This follows the normal acpi te
On Mon, May 06, 2024 at 10:22:11PM -0700, Sia Jee Heng wrote:
> Update the SPCR table to accommodate the SPCR Table version 4 [1].
> The SPCR table has been modified to adhere to the version 4 format [2].
>
> [1]:
> https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-c
Phil,
Did you accidentally miss this in your pull request [1] or did you
leave it out intentionally?
It's still missing the Reviewed bit after the atomic cmpxchg change
prompted by the size_t switch, so that might be the reason - I'm just
trying to figure out what the next step is for this patch.
On Sat, May 11, 2024 at 6:07 AM Jason Wang wrote:
>
> On Fri, May 10, 2024 at 3:16 PM Eugenio Perez Martin
> wrote:
> >
> > On Fri, May 10, 2024 at 6:29 AM Jason Wang wrote:
> > >
> > > On Thu, May 9, 2024 at 3:10 PM Eugenio Perez Martin
> > > wrote:
> > > >
> > > > On Thu, May 9, 2024 at 8:27
On 5/12/24 18:08, Sven Schnelle wrote:
Philippe Mathieu-Daudé writes:
Cc'ing Helge & Sven as I'm going to skip this series.
Suggestion:
-- >8 --
diff --git a/MAINTAINERS b/MAINTAINERS
index 1b79767d61..be7535b55e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -254,6 +254,8 @@ F: target/hexago
On 5/10/24 16:14, Nicholas Piggin wrote:
One of the functions of the ADU is indirect memory access engines that
send and receive data via ADU registers.
This implements the ADU LPC memory access functionality sufficiently
for IBM proprietary firmware to access the UART and print characters
to th
On 5/10/24 16:14, Nicholas Piggin wrote:
This implements a framework for an ADU unit model.
The ADU unit actually implements XSCOM, which is the bridge between MMIO
and PIB. However it also includes control and status registers and other
functions that are exposed as PIB (xscom) registers.
To k
Hi Sia Jee Heng,
On Mon, May 06, 2024 at 10:22:11PM -0700, Sia Jee Heng wrote:
> Update the SPCR table to accommodate the SPCR Table version 4 [1].
> The SPCR table has been modified to adhere to the version 4 format [2].
>
> [1]:
> https://learn.microsoft.com/en-us/windows-hardware/drivers/serp
On Tue, May 7, 2024 at 3:24 PM Sia Jee Heng
wrote:
>
> Update the SPCR table to accommodate the SPCR Table version 4 [1].
> The SPCR table has been modified to adhere to the version 4 format [2].
>
> [1]:
> https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-re
On Fri, May 3, 2024 at 5:17 PM Michael Tokarev wrote:
>
> Revert "gitlab-ci: Disable the riscv64-debian-cross-container by default"
> This reverts commit f51f90c65ed7706c3c4f7a889ce3d6b7ab75ef6a.
>
> riscv64 in debian has been non-functioning for almost a year, after the
> architecture has been pr
On Tue, May 7, 2024 at 3:24 PM Sia Jee Heng
wrote:
Can you describe why you are doing this and that it will be reverted
in the commit message?
Alistair
>
> Signed-off-by: Sia Jee Heng
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git
Add constants for the NVMe persistent command protocol.
The constants include the reservation command opcode and
reservation type values defined in section 7 of the NVMe
2.0 specification.
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
include/block/nvme.h | 55
This commit introduces two helper functions
that facilitate the conversion between the
persistent reservation types used in the SCSI
protocol and those used in the block layer.
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
include/scsi/utils.h | 8 +
scsi/utils.c | 77 +++
This commit enables the rescap function in the
namespace by detecting the supported reservation
function in the backend driver.
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
hw/nvme/ns.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/nvme/ns.c b/hw/nvme/ns.c
index ea8db
Add persistent reservation in/out operations
at the block level. The following operations
are included:
- read_keys:retrieves the list of registered keys.
- read_reservation: retrieves the current reservation status.
- register: registers a new reservation key.
- reserve:
This commit enables ONCS to support the reservation
function at the controller level. It also lays the
groundwork for detecting and enabling the reservation
function on a per-namespace basis in RESCAP.
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
hw/nvme/ctrl.c | 3 ++-
1 file change
Add reservation acquire, reservation register,
reservation release and reservation report commands
in the nvme device layer.
By introducing these commands, this enables the nvme
device to perform reservation-related tasks, including
querying keys, querying reservation status, registering
reservati
Add persistent reservation in/out operations for iscsi driver.
The following methods are implemented: bdrv_co_pr_read_keys,
bdrv_co_pr_read_reservation, bdrv_co_pr_register, bdrv_co_pr_reserve,
bdrv_co_pr_release, bdrv_co_pr_clear and bdrv_co_pr_preempt.
Signed-off-by: Changqi Lu
Signed-off-by: z
Add persistent reservation in/out operations in the
SCSI device layer. By introducing the persistent
reservation in/out api, this enables the SCSI device
to perform reservation-related tasks, including querying
keys, querying reservation status, registering reservation
keys, initiating and releasin
Add constants for the persistent reservation in/out protocol
in the scsi/constant module. The constants include the persistent
reservation command, type, and scope values defined in sections
6.13 and 6.14 of the SCSI Primary Commands-4 (SPC-4) specification.
Signed-off-by: Changqi Lu
Signed-off-b
Hi Stefan;
Thanks for your advices! The existing PRManager only works with
local scsi devices. This series will completely decouple devices
and drivers. The device can not only be scsi, but also other
devices such as nvme. The same is true for the driver,
which is completely unrestricted. And bloc
This commit introduces two helper functions
that facilitate the conversion between the
reservation types used in the NVME protocol
and those used in the block layer.
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Changqi Lu
Signed-off-by: zhenwei pi
---
hw/nvme/nvme.h | 40 +++
Add persistent reservation in/out operations for raw driver.
The following methods are implemented: bdrv_co_pr_read_keys,
bdrv_co_pr_read_reservation, bdrv_co_pr_register, bdrv_co_pr_reserve,
bdrv_co_pr_release, bdrv_co_pr_clear and bdrv_co_pr_preempt.
Reviewed-by: Stefan Hajnoczi
Signed-off-by:
On Sat, May 11, 2024 at 9:28 PM Yangyu Chen wrote:
>
> This code has a typo that writes zvkb to zvkg, causing users can't
> enable zvkb through the config. This patch gets this fixed.
>
> Signed-off-by: Yangyu Chen
> Fixes: ea61ef7097d0 ("target/riscv: Move vector crypto extensions to
> riscv_cp
On Sat, May 11, 2024 at 9:28 PM Yangyu Chen wrote:
>
> This code has a typo that writes zvkb to zvkg, causing users can't
> enable zvkb through the config. This patch gets this fixed.
>
> Signed-off-by: Yangyu Chen
> Fixes: ea61ef7097d0 ("target/riscv: Move vector crypto extensions to
> riscv_cp
On 2024/5/10 14:58, Fea.Wang wrote:
From: Jim Shu
Public the conversion function of priv_spec and string in cpu.h, so that
tcg-cpu.c could also use it.
Signed-off-by: Jim Shu
Signed-off-by: Fea.Wang
Reviewed-by: Frank Chang
---
target/riscv/cpu.c | 4 ++--
target/riscv/cpu.h
On 2024/5/10 14:58, Fea.Wang wrote:
Add RISC-V privilege 1.13 support.
Signed-off-by: Fea.Wang
Reviewed-by: Frank Chang
Reviewed-by: LIU Zhiwei
Zhiwei
---
target/riscv/cpu.c | 6 +-
target/riscv/cpu.h | 4 +++-
target/riscv/cpu_cfg.h | 1 +
target/riscv/tcg
On 2024/5/10 14:58, Fea.Wang wrote:
Based on privilege 1.13 spec, there should be a bit56 for 'P1P13' in
SMSTATEEN0 that controls access to the hedeleg.
Signed-off-by: Fea.Wang
Reviewed-by: Frank Chang
---
target/riscv/cpu_bits.h | 1 +
target/riscv/csr.c | 10 ++
2 files c
On 2024/5/10 14:58, Fea.Wang wrote:
Based on privileged spec 1.13, the RV32 needs to implement MEDELEGH
and HEDELEGH for exception codes 32-47 for reserving and exception codes
48-63 for custom use. Add the CSR number though the implementation is
just reading zero and writing ignore. Besides, f
On 2024/5/10 14:58, Fea.Wang wrote:
Based on the priv-1.13.0, add the exception codes for Software-check and
Hardware-error.
Signed-off-by: Fea.Wang
Reviewed-by: Frank Chang
---
target/riscv/cpu_bits.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu_bits.h b/target/
Return hash value via a parameter and remove it from mmu_ctx.t.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 07c127d673..ccacc70ba6 100644
The mmask local variable is a less descriptive local name for a
constant. Drop it and use the constant directly in the two places it
is needed.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/ppc/mmu_common
Introduce ppc_booke_xlate() to handle BookE and BookE 2.06 cases to
reduce ppc_jumbo_xlate() further.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 146 ++--
1 file changed, 96 insertions(+), 50 deletions(-)
diff --
In get_physical_address_wtlb() the real_mode flag depends on either
the MSR[IR] or MSR[DR] bit depending on access_type. Extract just the
needed bit in a more straight forward way instead of doing unnecessary
computation.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc
mmu40x_get_physical_address() only uses the raddr and prot fields from
mmu_ctx_t. Pass these directly instead of using a ctx struct.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 37 +++--
1 file changed, 15 insertions(+
The ptem variable in ppc6xx_tlb_pte_check() is used only once,
simplify by removing it as the value is already clear itself without
adding a local name for it.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/
Fix several qemu_log_mask() calls that are misindented.
Signed-off-by: BALATON Zoltan
Acked-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 42 -
1 file changed, 20 insertions(+), 22 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_co
In mmubooke_check_tlb() and mmubooke206_check_tlb() we can assign the
value of prot2 directly to the destination, no need to have a separate
local variable for it.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 30 +-
1 file
Introduce ppc_40x_xlate() to split off 40x handlning leaving only 6xx
in ppc_jumbo_xlate() now.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 150 +---
1 file changed, 93 insertions(+), 57 deletions(-)
diff --git a/target/ppc/mmu_common.c b/targ
Pass raddr and prot in function parameters instead
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index ba54c40048..6d588b6795 100644
--- a/target/pp
The value is only used once so no need to introduce a local variable
for it.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu-radix64.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
index
Rename parameter of get_bat_6xx_tlb() from virtual to eaddr to match
other functions.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 1137ec197
In mmu6xx_get_physical_address() the switch handles all cases so the
default is never reached and can be dropped. Also group together cases
which just return -4.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 19 ---
1 file changed, 4 insertions(+), 15 deletions(-)
Checking if a page protection bit is set for a given access type is a
common operation. Add a function to avoid repeating the same check at
multiple places. As this relies on access type and page protection bit
values having certain relation also add an assert to ensure that this
assumption holds.
In mmu6xx_get_physical_address() the cpu variable is only used for
debug logging which is normally disabled. Inline the value and remove
local variable to avoid computing it when not needed.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 4 ++--
1 file changed, 2 insertions(+), 2 de
Replace some BAT related constants with defines from mmu-hash32.h
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index fd8767879d..bfd3787
In mmubooke_check_tlb() and mmubooke206_check_tlb() prot2 is
calculated first but only used after an unrelated check that can
return before tha value is used. Move the calculation after the check,
closer to where it is used, to keep them together and avoid computing
it when not needed.
Signed-off-
There is already a hash32_bat_prot() function that does most if this
and the rest can be inlined. Export hash32_bat_prot() and rename it to
ppc_hash32_bat_prot() to match other functions and use it in
get_bat_6xx_tlb().
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu-hash32.c | 18 +
The "2" in booke206_update_mas_tlb_miss() call corresponds to
MMU_INST_FETCH which is the value of access_type in this branch;
mmubooke206_esr() only checks for MMU_DATA_STORE and it's called from
code access so using MMU_DATA_LOAD here seems wrong so replace it with
access_type here as well that y
Add a function to get key bit from SR and use it instead of open coded
version.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu-hash32.c | 9 ++---
target/ppc/mmu-hash32.h | 5 +
target/ppc/mmu_common.c | 3 +--
3 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/target/ppc/
This is used only once and can be inlined.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu-hash32.c | 19 ---
1 file changed, 4 insertions(+), 15 deletions(-)
diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c
index 8e5e83f46a..9de42713b3 100644
--- a/target/ppc/mmu
Pass it as a function argument and remove it from mmu_ctx_t.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 26 ++
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index ccc1c76a06..331e00b71c 1
Completely get rid of mmu_ctx_t after converting the remaining
functions to pass raddr and prot without the context struct.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 25 +++--
1 file changed, 7 insertions(+), 18 deletions(-)
diff --git a/target/ppc/mmu_comm
Merge the code fetch and data access cases in a common switch.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 52 -
1 file changed, 20 insertions(+), 32 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/
Instead of passing around ptem in context use it once in the same
function so it can be removed from mmu_ctx_t.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 23 ++-
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/
The real mode handling is identical in the remaining switch cases.
Split off these common real mode cases into a separate conditional to
leave only the else branches in the switch that are different.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 34 +++
The ptev variable in ppc6xx_tlb_pte_check() is used only once and just
obfuscates an otherwise clear value. Get rid of it.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_c
In mmu6xx_get_physical_address() we have a large if block with a two
line else branch that effectively returns. Invert the condition and
move the else there to allow deindenting the large if block to make
the flow easier to follow.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
In mmu6xx_get_physical_address() tagtet_page_bits local is declared
only to use TARGET_PAGE_BITS once. Drop the unneeded variable.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc
In ppc6xx_tlb_pte_check() the pteh variable is used only once to
compare to the h parameter of the function. Inline its value and use
pteh name for the function parameter which is more descriptive.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 7 +++
1 file changed, 3 insertion
mmubooke206_get_physical_address() only uses the raddr and prot fields
from mmu_ctx_t. Pass these directly instead of using a ctx struct.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 32 ++--
1 file changed, 10 insertions(+
Pass it as a parameter instead. Also use named constants instead of
hex values when extracting bits from SR.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/p
Add a new mmu-booke.c file for BookE and related MMU bits from
mmu_common.c.
Signed-off-by: BALATON Zoltan
Acked-by: Nicholas Piggin
---
target/ppc/cpu.h| 4 -
target/ppc/meson.build | 1 +
target/ppc/mmu-booke.c | 531
target/ppc/mmu-booke
This flag for split instruction/data TLBs is only set for 6xx soft TLB
MMU model and not used otherwise so no need to have a separate flag
for that.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
hw/ppc/pegasos2.c| 2 +-
target/ppc/cpu.h | 5 -
target/ppc/c
The eaddr field of mmu_ctx_t is set once but never used so can be
removed.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 564fcc7cfb..07c127d673 100644
--- a/target/ppc/mmu_com
This function just does two assignments and and unnecessary check that
is always true so inline it in the only caller left and remove it.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 26 +++---
1 file changed, 3 insertions(+), 23 d
In mmu6xx_get_physical_address() ds is used as bool, declare it as
such. Also use named constant instead of hex value.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_comm
This series does some further clean up mostly around BookE MMU to
untangle it from other MMU models. It also contains some other changes
that I've come up with while working on this. The Simplify
ppc_booke_xlate() part 1 and part 2 patches could be squashed together
but left them separate for easie
BookE does not have real mode so split off and handle it first in
get_physical_address_wtlb() before checking for real mode for other
MMU models.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 14 +++---
1 file changed, 7 insertions(+), 7 deleti
Instead of using a local ret variable return directly and remove the
local.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 0c7cbab2bc..a035cefcad 1006
Instead of putting a large block of code in an if, invert the
condition and return early to be able to deindent the code block.
Signed-off-by: BALATON Zoltan
Acked-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 319
1 file changed, 159 insertions(+),
Several 4xx CPUs and e200 share the same TLB settings enclosed in an
ifdef. Split it off in a common function to reduce code duplication
and the number of ifdefs.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/cpu_init.c | 46 --
The ppc6xx_tlb_check() relies on the caller to initialise raddr field
in ctx. Move this init from the only caller into the function.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/
Drop MPC8xx cases from get_physical_address_wtlb() and ppc_jumbo_xlate().
The default case would still catch this and abort the same way and
there is still a warning about it in ppc_tlb_invalidate_all() which is
called in ppc_cpu_reset_hold() so likely we never get here but to make
sure add a case
This function is only called once and we can make the caller simpler
by inlining it.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 71 +
1 file changed, 22 insertions(+), 49 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_
Remove mmu_ctx_t definition from internal.h as this type is only used
within mmu_common.c.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/internal.h | 12
target/ppc/mmu_common.c | 11 +++
2 files changed, 11 insertions(+), 12 deletions(-)
diff
In ppc_hash32_xlate() the value of need_prop is checked in two places
but precalculating it does not help because when we reach the first
check we always return and not reach the second place so the value
will only be used once. We can drop the local variable and calculate
it when needed, which mak
Invert conditions to avoid deep nested ifs and return early instead.
Remove some obvious comments that don't add more clarity.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 44 ++---
1 file changed, 19 insertions(+), 25 deletions(-)
diff --git a
Move the debug logging within ppc6xx_tlb_check() from after its only
call to simplify the caller.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 54 ++---
1 file changed, 24 insertions(+), 30 deletions(-)
diff --git
mmubooke_get_physical_address() only uses the raddr and prot fields
from mmu_ctx_t. Pass these directly instead of using a ctx struct.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 30 ++
1 file changed, 10 insertions(+), 20
In ppc6xx_tlb_pte_check() the pp variable is used only once to pass it
to a function parameter with the same name. Remove the local and
inline the value. Also use named constant for the hex value to make it
clearer.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 6 +++---
1 file cha
This function is used only once, its return value is ignored and one
of its parameter is a return value from a previous call. It is better
to inline it in the caller and remove it.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 41 +
1 file ch
Return directly, which is simpler than dragging a return value through
multpile if and else blocks.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 84 +++--
1 file changed, 39 insertions(+), 45 deletions(-)
diff --gi
Pass raddr and prot in function parameters instead.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 331e00b71c..1137ec197b 100644
---
Repurpose get_segment_6xx_tlb() to do the whole address translation
for POWERPC_MMU_SOFT_6xx MMU model by moving the BAT check there and
renaming it to match other similar functions. These are only called
once together so no need to keep these separate functions and
combining them simplifies the ca
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