From: Bibo Mao
Add boot-serial-test and filter test cases support on LoongArch system.
Signed-off-by: Bibo Mao
Message-ID: <20240509084745.2514607-1-maob...@loongson.cn>
Signed-off-by: Thomas Huth
---
tests/qtest/boot-serial-test.c | 10 ++
tests/qtest/meson.build| 3 +++
2 f
From: Collin Walling
Add the CONSTRAINT_TRANSACTIONAL_EXE (cte) and TRANSACTIONAL_EXE (te)
to the list of deprecated features.
Signed-off-by: Collin Walling
Reviewed-by: David Hildenbrand
Message-ID: <20240429191059.11806-3-wall...@linux.ibm.com>
Signed-off-by: Thomas Huth
---
target/s390x/c
The sclpconsole currently does not have a proper parent in the QOM
tree, so it shows up under /machine/unattached - which is somewhat
ugly. We should rather attach it to /machine/sclp/s390-sclp-event-facility
where the other devices of type TYPE_SCLP_EVENT already reside.
Message-ID: <202404301908
From: Cédric Le Goater
get_sclp_device() scans the whole machine to find a TYPE_SCLP object.
Now that the SCLPDevice instance is available under the machine state,
use it to simplify the lookup. While at it, remove the inline to let
the compiler decide on how to optimize.
Signed-off-by: Cédric L
The old "-runas" option has the disadvantage that it is not visible
in the QAPI schema, so it is not available via the normal introspection
mechanisms. We've recently introduced the "-run-with" option for exactly
this purpose, which is meant to handle the options that affect the
runtime behavior. T
The following changes since commit 36fa7c686e9eac490002ffc439c4affaa352c17c:
gitlab: Update msys2-64bit runner tags (2024-05-09 05:46:21 +0200)
are available in the Git repository at:
https://gitlab.com/thuth/qemu.git tags/pull-request-2024-05-10
for you to fetch changes up to 0d497106a71a3
From: Collin Walling
Retain a list of deprecated features disjoint from any particular
CPU model. A query-cpu-model-expansion reply will now provide a list of
properties (i.e. features) that are flagged as deprecated. Example:
{
"return": {
"model": {
"name": "z14.2-b
From: Cédric Le Goater
Initialize directly SCLPDevice from the machine init handler and
remove s390_sclp_init(). We will use the SCLPDevice pointer later to
create the consoles.
Signed-off-by: Cédric Le Goater
Message-ID: <20240502131533.377719-2-...@redhat.com>
Reviewed-by: Thomas Huth
Signed
From: Cédric Le Goater
sclp_get_event_facility_bus() scans the whole machine to find a
TYPE_SCLP_EVENTS_BUS object. The SCLPDevice instance is now available
under the machine state, use it to simplify the lookup and adjust the
creation of the consoles.
Signed-off-by: Cédric Le Goater
Message-ID
On 08/05/2024 09.44, Stefano Garzarella wrote:
`memory-backend-shm` can be used with vhost-user devices, so let's
add a new test case for it.
Signed-off-by: Stefano Garzarella
---
tests/qtest/vhost-user-test.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/tests
On 08/05/2024 09.44, Stefano Garzarella wrote:
`memory-backend-memfd` is available only on Linux while the new
`memory-backend-shm` can be used on any POSIX-compliant operating
system. Let's use it so we can run the test in multiple environments.
Signed-off-by: Stefano Garzarella
---
tests/qt
On 09/05/2024 19.00, Paolo Bonzini wrote:
ARM/aarch64 are easy to fix because they already have to pass a machine
type by hand. Just guard the tests with a check that the machine actually
exists.
Signed-off-by: Paolo Bonzini
---
tests/qtest/arm-cpu-features.c | 4
tests/qtest/migration
On 09/05/2024 19.00, Paolo Bonzini wrote:
The CSS subsystem uses global variables, just face the truth and use
a variable also for whether the CSS vmstate is in use; remove the
indirection of fetching it from the machine type, which makes the
TCG code depend unnecessarily on the virtio-ccw machin
g/qemu.git tags/pull-loongarch-20240509
for you to fetch changes up to 5872966db7abaa7f8753541b7a9f242df9752b50:
target/loongarch: Put cpucfg operation before CSR register (2024-05-09
15:19:22 +0800)
pull-loongarch-20240509
On 5/9/24 01:35, Fabiano Rosas wrote:
The following changes since commit 4e66a08546a2588a4667766a1edab9caccf24ce3:
Merge tag 'for-upstream' ofhttps://gitlab.com/bonzini/qemu into staging
(2024-05-07 09:26:30 -0700)
are available in the Git repository at:
https://gitlab.com/farosas/qemu
On 09/05/2024 19.00, Paolo Bonzini wrote:
Do the bare minimum to ensure that at least a vanilla
--without-default-devices build works for all targets except i386,
x86_64 and ppc64. In particular this fixes s390x-softmmu; i386 and
x86_64 have about a dozen failing tests that do not pass -M and th
On 09/05/2024 19.00, Paolo Bonzini wrote:
Signed-off-by: Paolo Bonzini
---
.gitlab-ci.d/buildtest.yml | 4 ++--
target/s390x/Kconfig | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/.gitlab-ci.d/buildtest.yml b/.gitlab-ci.d/buildtest.yml
index 13afd0df1f0..f850290
On 09/05/2024 19.00, Paolo Bonzini wrote:
Instead of mucking with css_migration_enabled(), add a property specific to
the FLIC device, similar to what is done for TYPE_S390_STATTRIB.
Signed-off-by: Paolo Bonzini
---
include/hw/s390x/s390_flic.h | 1 +
hw/intc/s390_flic.c | 6 +-
On 09/05/2024 19.00, Paolo Bonzini wrote:
This function has no dependency on the virtio-ccw machine type, though it
assumes that the CPU address corresponds to the core_id and the index.
If there is any need of something different or more fancy (unlikely)
S390 can include a MachineClass subclass
On 09/05/2024 10.47, Bibo Mao wrote:
Add boot-serial-test and filter test cases support on LoongArch system.
Signed-off-by: Bibo Mao
---
v1 ... v2:
1. Refresh the changelog, adding filter test case support also.
2. Adjust order of loongarch qtest in alphabetical order.
---
Reviewed-by: T
On Thu, May 9, 2024 at 3:10 PM Eugenio Perez Martin wrote:
>
> On Thu, May 9, 2024 at 8:27 AM Jason Wang wrote:
> >
> > On Thu, May 9, 2024 at 1:16 AM Eugenio Perez Martin
> > wrote:
> > >
> > > On Wed, May 8, 2024 at 4:29 AM Jason Wang wrote:
> > > >
> > > > On Tue, May 7, 2024 at 6:57 PM Eug
---
target/riscv/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index eb1a2e7d6d..13cd34adbd 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1535,7 +1535,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
On Thu, May 09, 2024 at 05:39:52PM +0200, Paolo Bonzini wrote:
> Date: Thu, 9 May 2024 17:39:52 +0200
> From: Paolo Bonzini
> Subject: [PATCH] target/i386: add feature dependency for XSAVE
> X-Mailer: git-send-email 2.45.0
>
> The XSAVEOPT, XSAVEC, XGETBV1, XSAVES features make no sense if you
>
On Thu, May 09, 2024 at 05:39:50PM +0200, Paolo Bonzini wrote:
> Date: Thu, 9 May 2024 17:39:50 +0200
> From: Paolo Bonzini
> Subject: [PATCH] target/i386: fix feature dependency for WAITPKG
> X-Mailer: git-send-email 2.45.0
>
> The VMX feature bit depends on general availability of WAITPKG,
> n
On 5/10/24 02:22, Stefan Hajnoczi wrote:
On Wed, May 08, 2024 at 05:36:21PM +0800, Changqi Lu wrote:
[SNIP]
+
+/**
+ * Persist Through Power Loss(PTPL) is considered as required in QEMU
+ * block layer, the block driver need always enable PTPL.
+ */
What is the reasoning
>-Original Message-
>From: Shivaprasad G Bhat
>Subject: [PATCH] vfio: container: Fix missing allocation of
>VFIOSpaprContainer
>
>The commit 6ad359ec29 "(vfio/spapr: Move prereg_listener into
>spapr container)" began to use the newly introduced VFIOSpaprContainer
>structure.
>
>After sev
On Thu, 9 May 2024, Cord Amfmgm wrote:
On Thu, May 9, 2024 at 12:48 PM Peter Maydell
wrote:
On Wed, 8 May 2024 at 16:29, Cord Amfmgm wrote:
On Wed, May 8, 2024 at 3:45 AM Thomas Huth wrote:
Your Signed-off-by line does not match the From: line ... could you
please
fix this? (see
https
Remove mmu_ctx_t definition from internal.h as this type is only used
within mmu_common.c.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/internal.h | 12
target/ppc/mmu_common.c | 11 +++
2 files changed, 11 insertions(+), 12 deletions(-)
diff
mmubooke_get_physical_address() only uses the raddr and prot fields
from mmu_ctx_t. Pass these directly instead of using a ctx struct.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 30 ++
1 file changed, 10 insertions(+), 20
mmu40x_get_physical_address() only uses the raddr and prot fields from
mmu_ctx_t. Pass these directly instead of using a ctx struct.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 37 +++--
1 file changed, 15 insertions(+
As BookE never returns -4 we can drop BookE from the direct store case
in ppc_jumbo_xlate().
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_
Several 4xx CPUs and e200 share the same TLB settings enclosed in an
ifdef. Split it off in a common function to reduce code duplication
and the number of ifdefs.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/cpu_init.c | 46 --
Move the debug logging within ppc6xx_tlb_check() from after its only
call to simplify the caller.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 54 ++---
1 file changed, 24 insertions(+), 30 deletions(-)
diff --git
Now that some functions are external again the warnings don't appear
any more so the work around added earlier can be removed again.
Signed-off-by: BALATON Zoltan
---
target/ppc/mmu_common.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
in
Repurpose get_segment_6xx_tlb() to do the whole address translation
for POWERPC_MMU_SOFT_6xx MMU model by moving the BAT check there and
renaming it to match other similar functions. These are only called
once together so no need to keep these separate functions and
combining them simplifies the ca
Move setting error_code that appears in every case out in front and
hoist the common fall through case for BOOKE206 as well which allows
removing the nested switches.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 41
Fix several qemu_log_mask() calls that are misindented.
Signed-off-by: BALATON Zoltan
Acked-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 42 -
1 file changed, 20 insertions(+), 22 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_co
Merge the code fetch and data access cases in a common switch.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 52 -
1 file changed, 20 insertions(+), 32 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/
This flag for split instruction/data TLBs is only set for 6xx soft TLB
MMU model and not used otherwise so no need to have a separate flag
for that.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
hw/ppc/pegasos2.c| 2 +-
target/ppc/cpu.h | 5 -
target/ppc/c
The value is only used once so no need to introduce a local variable
for it.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu-radix64.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
index
The ppc_hash32_pp_prot() function in mmu-hash32.c is the same as
pp_check() in mmu_common.c, merge these to remove duplicated code.
Define the common function in internal.h as static lnline otherwise
exporting the function from mmu-hash32.c would stop the compiler
inlining it which results in sligh
Introduce ppc_booke_xlate() to handle BookE and BookE 2.06 cases to
reduce ppc_jumbo_xlate() further.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 148 ++--
1 file changed, 98 insertions(+), 50 deletions(-)
diff --
The "2" in booke206_update_mas_tlb_miss() call corresponds to
MMU_INST_FETCH which is the value of access_type in this branch;
mmubooke206_esr() only checks for MMU_DATA_STORE and it's called from
code access so using MMU_DATA_LOAD here seems wrong so replace it with
access_type here as well that y
The real mode handling is identical in the remaining switch cases.
Split off these common real mode cases into a separate conditional to
leave only the else branches in the switch that are different.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 34 +++
Drop MPC8xx cases from get_physical_address_wtlb() and ppc_jumbo_xlate().
The default case would still catch this and abort the same way and
there is still a warning about it in ppc_tlb_invalidate_all() which is
called in ppc_cpu_reset_hold() so likely we never get here but to make
sure add a case
In mmubooke_check_tlb() and mmubooke206_check_tlb() we can assign the
value of prot2 directly to the destination, no need to have a separate
local variable for it.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 30 +-
1 file
In mmu6xx_get_physical_address() we have a large if block with a two
line else branch that effectively returns. Invert the condition and
move the else there to allow deindenting the large if block to make
the flow easier to follow.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
mmubooke206_get_physical_address() only uses the raddr and prot fields
from mmu_ctx_t. Pass these directly instead of using a ctx struct.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 32 ++--
1 file changed, 10 insertions(+
BookE does not have real mode so split off and handle it first in
get_physical_address_wtlb() before checking for real mode for other
MMU models.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 14 +++---
1 file changed, 7 insertions(+), 7 deleti
This function just does two assignments and and unnecessary check that
is always true so inline it in the only caller left and remove it.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 26 +++---
1 file changed, 3 insertions(+), 23 d
Checking if a page protection bit is set for a given access type is a
common operation. Add a function to avoid repeating the same check at
multiple places. As this relies on access type and page protection bit
values having certain relation also add an assert to ensure that this
assumption holds.
On Thu, May 2, 2024 at 5:39 AM Andrew Jones wrote:
>
> On Tue, Apr 30, 2024 at 03:00:45PM GMT, Daniel Henrique Barboza wrote:
> >
> >
> > On 4/29/24 16:28, Atish Patra wrote:
> > > Currently, if a counter monitoring cycle/instret is stopped via
> > > mcountinhibit we just update the state while th
Inline get_physical_address_wtlb() in its only caller and remove it.
Signed-off-by: BALATON Zoltan
---
target/ppc/internal.h | 5 +---
target/ppc/mmu_common.c | 66 +
2 files changed, 28 insertions(+), 43 deletions(-)
diff --git a/target/ppc/internal.h
In ppc_hash32_xlate() the value of need_prop is checked in two places
but precalculating it does not help because when we reach the first
check we always return and not reach the second place so the value
will only be used once. We can drop the local variable and calculate
it when needed, which mak
Instead of putting a large block of code in an if, invert the
condition and return early to be able to deindent the code block.
Signed-off-by: BALATON Zoltan
Acked-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 319
1 file changed, 159 insertions(+),
Add a new mmu-booke.c file for BookE and related MMU bits from
mmu_common.c.
Signed-off-by: BALATON Zoltan
Acked-by: Nicholas Piggin
---
target/ppc/cpu.h| 4 -
target/ppc/meson.build | 1 +
target/ppc/mmu-booke.c | 531
target/ppc/mmu-booke
The helper_rac function is defined but not used, remove it.
Fixes: 005b69fdcc (target/ppc: Remove PowerPC 601 CPUs)
Signed-off-by: BALATON Zoltan
Reviwed-by: Nicholas Piggin
---
target/ppc/helper.h | 2 --
target/ppc/mmu_helper.c | 24
2 files changed, 26 deletions
In mmubooke_check_tlb() and mmubooke206_check_tlb() prot2 is
calculated first but only used after an unrelated check that can
return before tha value is used. Move the calculation after the check,
closer to where it is used, to keep them together and avoid computing
it when not needed.
Signed-off-
In get_physical_address_wtlb() the real_mode flag depends on either
the MSR[IR] or MSR[DR] bit depending on access_type. Extract just the
needed bit in a more straight forward way instead of doing unnecessary
computation.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc
This series does some further clean up mostly around BookE MMU to
untangle it from other MMU models. It also contains some other changes
that I've come up with while working on this. The Simplify
ppc_booke_xlate() part 1 and part 2 patches could be squashed together
but left them separate for easie
Return directly, which is simpler than dragging a return value through
multpile if and else blocks.
Signed-off-by: BALATON Zoltan
Reviewed-by: Nicholas Piggin
---
target/ppc/mmu_common.c | 84 +++--
1 file changed, 39 insertions(+), 45 deletions(-)
diff --gi
On Wed, May 08, 2024 at 09:44:44AM +0200, Stefano Garzarella wrote:
> v1: https://patchew.org/QEMU/20240228114759.44758-1-sgarz...@redhat.com/
> v2: https://patchew.org/QEMU/20240326133936.125332-1-sgarz...@redhat.com/
> v3: https://patchew.org/QEMU/20240404122330.92710-1-sgarz...@redhat.com/
> v4:
Steve Sistare writes:
> Add the only-migratable-modes option as a generalization of only-migratable.
> Only devices that support all requested modes are allowed.
>
> Signed-off-by: Steve Sistare
> ---
> include/migration/misc.h | 3 +++
> include/sysemu/sysemu.h| 1 -
> migratio
The commit 6ad359ec29 "(vfio/spapr: Move prereg_listener into
spapr container)" began to use the newly introduced VFIOSpaprContainer
structure.
After several refactors, today the container_of(container,
VFIOSpaprContainer, ABC) is used when VFIOSpaprContainer is actually
not allocated. On PPC64 sy
On Wed, May 08, 2024 at 05:36:25PM +0800, Changqi Lu wrote:
> Add persistent reservation in/out operations in the
> SCSI device layer. By introducing the persistent
> reservation in/out api, this enables the SCSI device
> to perform reservation-related tasks, including querying
> keys, querying res
On Wed, May 08, 2024 at 05:36:20PM +0800, Changqi Lu wrote:
> Hi,
>
> I am going to introduce persistent reservation for QEMU block.
> There are three parts in this series:
>
> Firstly, at the block layer, the commit abstracts seven APIs related to
> the persistent reservation command. These APIs
On Wed, May 08, 2024 at 05:36:27PM +0800, Changqi Lu wrote:
> This commit introduces two helper functions
> that facilitate the conversion between the
> reservation types used in the NVME protocol
> and those used in the block layer.
>
> Signed-off-by: Changqi Lu
> Signed-off-by: zhenwei pi
> --
On Wed, May 08, 2024 at 05:36:26PM +0800, Changqi Lu wrote:
> Add constants for the NVMe persistent command protocol.
> The constants include the reservation command opcode and
> reservation type values defined in section 7 of the NVMe
> 2.0 specification.
>
> Signed-off-by: Changqi Lu
> Signed-o
On Wed, May 08, 2024 at 05:36:25PM +0800, Changqi Lu wrote:
> Add persistent reservation in/out operations in the
> SCSI device layer. By introducing the persistent
> reservation in/out api, this enables the SCSI device
> to perform reservation-related tasks, including querying
> keys, querying res
Steve Sistare writes:
> For cpr-exec mode, ramblock_is_ignored is always true, and the address of
> each migrated memory region must match the address of the statically
> initialized region on the target. However, for a PCI rom block, the region
> address is set when the guest writes to a BAR on
On Wed, May 08, 2024 at 05:36:24PM +0800, Changqi Lu wrote:
> This commit introduces two helper functions
> that facilitate the conversion between the
> persistent reservation types used in the SCSI
> protocol and those used in the block layer.
>
> Signed-off-by: Changqi Lu
> Signed-off-by: zhenw
On Wed, May 08, 2024 at 05:36:23PM +0800, Changqi Lu wrote:
> Add constants for the persistent reservation in/out protocol
> in the scsi/constant module. The constants include the persistent
> reservation command, type, and scope values defined in sections
> 6.13 and 6.14 of the SCSI Primary Comman
On Wed, May 08, 2024 at 05:36:22PM +0800, Changqi Lu wrote:
> Add persistent reservation in/out operations for raw driver.
> The following methods are implemented: bdrv_co_pr_read_keys,
> bdrv_co_pr_read_reservation, bdrv_co_pr_register, bdrv_co_pr_reserve,
> bdrv_co_pr_release, bdrv_co_pr_clear an
On Wed, May 08, 2024 at 05:36:21PM +0800, Changqi Lu wrote:
> Add persistent reservation in/out operations
> at the block level. The following operations
> are included:
>
> - read_keys:retrieves the list of registered keys.
> - read_reservation: retrieves the current reservation status.
>
On Thu, May 9, 2024 at 12:48 PM Peter Maydell
wrote:
> On Wed, 8 May 2024 at 16:29, Cord Amfmgm wrote:
> > On Wed, May 8, 2024 at 3:45 AM Thomas Huth wrote:
> >>
> >> Your Signed-off-by line does not match the From: line ... could you
> please
> >> fix this? (see
> >>
> https://www.qemu.org/doc
Steve Sistare writes:
> cpr-exec mode needs permission to exec. Block it if permission is denied.
>
> Signed-off-by: Steve Sistare
Reviewed-by: Fabiano Rosas
Steve Sistare writes:
> Add blockers for cpr-exec migration mode for devices and options that do
> not support it.
>
> Signed-off-by: Steve Sistare
Reviewed-by: Fabiano Rosas
Steve Sistare writes:
> Unlike cpr-reboot mode, cpr-exec mode cannot save volatile ram blocks in the
> migration stream file and recreate them later, because the physical memory for
> the blocks is pinned and registered for vfio. Add an exec-mode blocker for
> volatile ram blocks.
>
> Also add a
On Wed, 8 May 2024 at 16:29, Cord Amfmgm wrote:
> On Wed, May 8, 2024 at 3:45 AM Thomas Huth wrote:
>>
>> Your Signed-off-by line does not match the From: line ... could you please
>> fix this? (see
>> https://www.qemu.org/docs/master/devel/submitting-a-patch.html#patch-emails-must-include-a-sign
Steve Sistare writes:
> Define a convenience function to add a migration blocker for a single mode.
>
> Signed-off-by: Steve Sistare
Reviewed-by: Fabiano Rosas
From: "Edgar E. Iglesias"
For xen, when checking for the first RAM (xen_memory), use
xen_mr_is_memory() rather than checking for a RAMBlock with
offset 0.
All Xen machines create xen_memory first so this has no
functional change for existing machines.
Signed-off-by: Edgar E. Iglesias
---
syst
From: "Edgar E. Iglesias"
Pass the ram_addr offset to xen_map_cache.
This is in preparation for adding grant mappings that need
to compute the address within the RAMBlock.
No functional changes.
Signed-off-by: Edgar E. Iglesias
---
hw/xen/xen-mapcache.c | 16 +++-
include/
From: "Edgar E. Iglesias"
When invalidating memory ranges, if we happen to hit the first
entry in a bucket we were never unmapping it. This was harmless
for foreign mappings but now that we're looking to reuse the
mapcache for transient grant mappings, we must unmap entries
when invalidated.
Sig
From: "Edgar E. Iglesias"
Add a second mapcache for grant mappings. The mapcache for
grants needs to work with XC_PAGE_SIZE granularity since
we can't map larger ranges than what has been granted to us.
Like with foreign mappings (xen_memory), machines using grants
are expected to initialize the
From: "Edgar E. Iglesias"
Add xen_mr_is_memory() to abstract away tests for the
xen_memory MR.
No functional changes.
Signed-off-by: Edgar E. Iglesias
Reviewed-by: Stefano Stabellini
Acked-by: David Hildenbrand
---
hw/xen/xen-hvm-common.c | 10 --
include/sysemu/xen.h| 8 ++
From: "Edgar E. Iglesias"
Hi,
Grant mappings are a mechanism in Xen for guests to grant each other
permissions to map and share pages. These grants can be temporary
so both map and unmaps must be respected. See here for more info:
https://github.com/xen-project/xen/blob/master/docs/misc/grant-ta
From: "Edgar E. Iglesias"
Always pass address with offset to xen_map_cache().
This is in preparation for support for grant mappings.
Since this is within a block that checks for offset == 0,
this has no functional changes.
Signed-off-by: Edgar E. Iglesias
---
system/physmem.c | 3 ++-
1 file
From: "Edgar E. Iglesias"
Make MCACHE_BUCKET_SHIFT runtime configurable per cache instance.
Signed-off-by: Edgar E. Iglesias
Reviewed-by: Stefano Stabellini
---
hw/xen/xen-mapcache.c | 54 ++-
1 file changed, 33 insertions(+), 21 deletions(-)
diff --gi
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
Reviewed-by: Stefano Stabellini
---
hw/arm/xen_arm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/arm/xen_arm.c b/hw/arm/xen_arm.c
index 15fa7dfa84..6fad829ede 100644
--- a/hw/arm/xen_arm.c
+++ b/hw/arm/xen_arm.c
@@ -125
On 5/8/24 08:22, Andrew Jones wrote:
On Tue, May 07, 2024 at 11:27:21AM GMT, Rob Bradford wrote:
This extension has now been ratified:
https://jira.riscv.org/browse/RVS-2006 so the "x-" prefix can be
removed.
Signed-off-by: Rob Bradford
---
target/riscv/cpu.c | 2 +-
1 file changed, 1 in
ARM/aarch64 are easy to fix because they already have to pass a machine
type by hand. Just guard the tests with a check that the machine actually
exists.
Signed-off-by: Paolo Bonzini
---
tests/qtest/arm-cpu-features.c | 4
tests/qtest/migration-test.c | 6 ++
tests/qtest/numa-test.c
This function has no dependency on the virtio-ccw machine type, though it
assumes that the CPU address corresponds to the core_id and the index.
If there is any need of something different or more fancy (unlikely)
S390 can include a MachineClass subclass and implement it there. For
now, move it t
fw_cfg.c and vapic.c are currently included unconditionally but
depend on other components. vapic.c depends on the local APIC,
while fw_cfg.c includes a piece of AML builder code that depends
on CONFIG_ACPI.
Signed-off-by: Paolo Bonzini
---
hw/i386/fw_cfg.c| 2 ++
hw/i386/meson.build | 2 +-
The local APIC is a part of the CPU and has callbacks that are invoked
from multiple accelerators.
The IOAPIC on the other hand is optional, but ioapic_eoi_broadcast is
used by common x86 code to implement the IOAPIC's implicit EOI mode.
Add a stub in case the IOAPIC device is not included but the
It is okay to register legacy backends in the middle of xen_bus_init().
All that the registration does is record the existence of the backend
in xenstore.
This makes it possible to remove them from the build without introducing
undefined symbols in xen_be_init(). It also removes the need for the
Instead of mucking with css_migration_enabled(), add a property specific to
the FLIC device, similar to what is done for TYPE_S390_STATTRIB.
Signed-off-by: Paolo Bonzini
---
include/hw/s390x/s390_flic.h | 1 +
hw/intc/s390_flic.c | 6 +-
hw/s390x/s390-virtio-ccw.c | 1 +
3 files c
The CSS subsystem uses global variables, just face the truth and use
a variable also for whether the CSS vmstate is in use; remove the
indirection of fetching it from the machine type, which makes the
TCG code depend unnecessarily on the virtio-ccw machine.
Signed-off-by: Paolo Bonzini
---
inclu
Prepare for moving the calls to xen_be_register() under the
control of xen_bus_init(), using the normal xen_backend_init()
method that is used by the "modern" backends.
This requires the xenstore global variable to be initialized,
which is done by xen_be_init(). To ensure that everything is
ready
The recent change to make boards "default y" made them go away from
a --without-default-devices build, because the boards are not anymore
enabled explicitly in configs/devices/.
This is a problem for some targets that were not fully ready for this
and have generic target code that needs symbols fr
Do the bare minimum to ensure that at least a vanilla
--without-default-devices build works for all targets except i386,
x86_64 and ppc64. In particular this fixes s390x-softmmu; i386 and
x86_64 have about a dozen failing tests that do not pass -M and therefore
require a default machine type; ppc6
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