Re: [PATCH 07/24] exec: Un-inline tlb_vaddr_to_host() and declare it in 'exec/cputlb.h'

On 18/04/24, Philippe Mathieu-Daudé wrote: > Declare tlb_vaddr_to_host() in "exec/cputlb.h" with the CPU TLB > API. Un-inline the user emulation definition to avoid including > "exec/cpu_ldst.h" (which declares g2h) in "exec/cputlb.h". > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/ex

Re: [PATCH v2 1/3] cpu-models: add "disable-deprecated-feats" option to cpu model expansion

Collin Walling writes: > On 4/24/24 02:19, Markus Armbruster wrote: >> Collin Walling writes: >> >>> This optional parameter for query-cpu-model-expansion enables CPU >>> model features flagged as deprecated to appear in the resulting >>> list of properties. >>> >>> This commit does not add sup

Re: [PATCH v3] hw/audio/virtio-snd: Use device endianness instead of target one

On Wed, 24 Apr 2024 at 13:31, Mark Cave-Ayland wrote: > > On 23/04/2024 12:05, Philippe Mathieu-Daudé wrote: > > > On 23/4/24 11:18, Manos Pitsidianakis wrote: > >> On Tue, 23 Apr 2024 at 11:47, Manos Pitsidianakis > >> wrote: > >>> > >>> On Tue, 23 Apr 2024 at 00:11, Michael S. Tsirkin wrote: >

Re: [PATCH 02/24] exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header

On 18/04/24, Philippe Mathieu-Daudé wrote: > On 18/4/24 21:25, Philippe Mathieu-Daudé wrote: > > The CPUBreakpoint and CPUWatchpoint structures are declared > > in "hw/core/cpu.h", which contains declarations related to > > CPUState and CPUClass. Some source files only require the > > BP/WP definit

Re: [PATCH v5 09/13] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents

fan writes: > On Wed, Apr 24, 2024 at 03:09:52PM +0200, Markus Armbruster wrote: >> nifan@gmail.com writes: >> >> > From: Fan Ni >> > >> > Since fabric manager emulation is not supported yet, the change implements >> > the functions to add/release dynamic capacity extents as QMP interfaces.

Re: [PULL 00/17] CI job updates, header cleanups and other misc patches

On 24/04/2024 18.21, Richard Henderson wrote: On 4/24/24 00:57, Thomas Huth wrote: The following changes since commit 13b1e9667737132440f4d500c31cb69320c6b15a:    Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2024-04-23 17:35:57 -0700) are available in the Git rep

Re: [PULL 12/17] tests: Update our CI to use CentOS Stream 9 instead of 8

On 24/04/2024 18.19, Richard Henderson wrote: On 4/24/24 00:57, Thomas Huth wrote: RHEL 9 (and thus also the derivatives) have been available since two years now, so according to QEMU's support policy, we can drop the active support for the previous major version 8 now. Another reason for doing

[PATCH v2 0/7] s390x/cpu_models: Misc cleanup on returned error code and local @err variables

Hi list, This series is the followup of Thomas' suggestion in previous ERRP_GUARD() cleanup[1]. And based on Thomas' thoughts, I tried to clean up as many of the other related places (in s390x/cpu_models.c). [1]: https://lore.kernel.org/qemu-devel/6e7eff95-cfd3-46f9-9937-7597b2e4f...@redhat.com/

[PATCH v2 4/7] target/s390x/cpu_models: Make kvm_s390_get_host_cpu_model() return boolean

As error.h suggested, the best practice for callee is to return something to indicate success / failure. So make kvm_s390_get_host_cpu_model() return boolean and check the returned boolean in get_max_cpu_model() instead of accessing @err. Signed-off-by: Zhao Liu --- target/s390x/cpu_models.c |

[PATCH v2 6/7] target/s390x/cpu_models: Make kvm_s390_apply_cpu_model() return boolean

As error.h suggested, the best practice for callee is to return something to indicate success / failure. So make kvm_s390_apply_cpu_model() return boolean and check the returned boolean in apply_cpu_model() instead of accessing @err. Signed-off-by: Zhao Liu Reviewed-by: Thomas Huth --- target/

[PATCH v2 1/7] target/s390x/cpu_model: Make check_compatibility() return boolean

As error.h suggested, the best practice for callee is to return something to indicate success / failure. With returned boolean, there's no need to check @err. Suggested-by: Thomas Huth Signed-off-by: Zhao Liu Reviewed-by: Thomas Huth --- target/s390x/cpu_models.c | 14 +++--- 1 file c

[PATCH v2 7/7] target/s390x/cpu_models_sysemu: Drop local @err in apply_cpu_model()

Use @errp to fetch error information directly and drop the local variable @err. Signed-off-by: Zhao Liu Reviewed-by: Thomas Huth --- target/s390x/cpu_models_sysemu.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/target/s390x/cpu_models_sysemu.c b/target/s390x/cpu_models

[PATCH v2 5/7] target/s390x/cpu_models: Drop local @err in get_max_cpu_model()

Use @errp to fetch error information directly and drop the local variable @err. Signed-off-by: Zhao Liu Reviewed-by: Thomas Huth --- target/s390x/cpu_models.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index a0e4a

[PATCH v2 2/7] target/s390x/cpu_model: Drop local @err in s390_realize_cpu_model()

Use @errp to fetch error information directly and drop the local variable @err. Suggested-by: Thomas Huth Signed-off-by: Zhao Liu Reviewed-by: Thomas Huth --- target/s390x/cpu_models.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/target/s390x/cpu_models.c b/target/s39

[PATCH v2 3/7] target/s390x: Remove KVM stubs in cpu_models.h

From: Philippe Mathieu-Daudé Since the calls are elided when KVM is not available, we can remove the stubs (which are never compiled). Inspired-by: Thomas Huth > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Signed-off-by: Zhao Liu --- target/s390x/cpu_models.h | 15 ---

Re: [PULL 0/9] tcg + linux-user patch queue

On 4/24/24 15:51, Richard Henderson wrote: The following changes since commit 85b597413d4370cb168f711192eaef2eb70535ac: Merge tag 'housekeeping-20240424' ofhttps://github.com/philmd/qemu into staging (2024-04-24 11:49:57 -0700) are available in the Git repository at:

[PATCH v4 09/14] migration/multifd: Prepare to introduce DSA acceleration on the multifd path.

1. Refactor multifd_send_thread function. 2. Introduce the batch task structure in MultiFDSendParams. Signed-off-by: Hao Xiang --- include/qemu/dsa.h | 51 +++-- migration/multifd.c | 5 + migration/multifd.h | 2 ++ util/dsa.c | 51 +++

[PATCH v4 07/14] util/dsa: Implement DSA task asynchronous submission and wait for completion.

* Add a DSA task completion callback. * DSA completion thread will call the tasks's completion callback on every task/batch task completion. * DSA submission path to wait for completion. * Implement CPU fallback if DSA is not able to complete the task. Signed-off-by: Hao Xiang Signed-off-by: Brya

[PATCH v4 10/14] migration/multifd: Enable DSA offloading in multifd sender path.

Multifd sender path gets an array of pages queued by the migration thread. It performs zero page checking on every page in the array. The pages are classfied as either a zero page or a normal page. This change uses Intel DSA to offload the zero page checking from CPU to the DSA accelerator. The sen

[PATCH v4 04/14] util/dsa: Implement DSA task enqueue and dequeue.

* Use a safe thread queue for DSA task enqueue/dequeue. * Implement DSA task submission. * Implement DSA batch task submission. Signed-off-by: Hao Xiang --- include/qemu/dsa.h | 28 +++ util/dsa.c | 201 + 2 files changed, 229 insertions(+

[PATCH v4 03/14] util/dsa: Implement DSA device start and stop logic.

* DSA device open and close. * DSA group contains multiple DSA devices. * DSA group configure/start/stop/clean. Signed-off-by: Hao Xiang Signed-off-by: Bryan Zhang --- include/qemu/dsa.h | 72 +++ util/dsa.c | 316 + util/meson.build

[PATCH v4 00/14] Use Intel DSA accelerator to offload zero page checking in multifd live migration.

v4 * Rebase on top of 85b597413d4370cb168f711192eaef2eb70535ac. * A separate "multifd zero page checking" patchset was split from this patchset's v3 and got merged into master. v4 re-applied the rest of all commits on top of that patchset, re-factored and re-tested. https://lore.kernel.org/all/2024

[PATCH v4 11/14] migration/multifd: Add migration option set packet size.

The current multifd packet size is 128 * 4kb. This change adds an option to set the packet size. Both sender and receiver needs to set the same packet size for things to work. Signed-off-by: Hao Xiang --- migration/options.c | 36 migration/options.h | 1 +

[PATCH v4 02/14] util/dsa: Add dependency idxd.

Idxd is the device driver for DSA (Intel Data Streaming Accelerator). The driver is fully functioning since Linux kernel 5.19. This change adds the driver's header file used for userspace development. Signed-off-by: Hao Xiang --- linux-headers/linux/idxd.h | 356 +

[PATCH v4 08/14] migration/multifd: Add new migration option for multifd DSA offloading.

Intel DSA offloading is an optional feature that turns on if proper hardware and software stack is available. To turn on DSA offloading in multifd live migration: multifd-dsa-accel="[dsa_dev_path1] [dsa_dev_path2] ... [dsa_dev_pathX]" This feature is turned off by default. Signed-off-by: Hao Xia

[PATCH v4 12/14] migration/multifd: Enable set packet size migration option.

During live migration, if the latency between sender and receiver is high and bandwidth is also high (a long and fat pipe), using a bigger packet size can help reduce migration total time. In addition, Intel DSA offloading performs better with a large batch task. Providing an option to set the pack

[PATCH v4 14/14] migration/multifd: Add integration tests for multifd with Intel DSA offloading.

* Add test case to start and complete multifd live migration with DSA offloading enabled. * Add test case to start and cancel multifd live migration with DSA offloading enabled. Signed-off-by: Bryan Zhang Signed-off-by: Hao Xiang --- tests/qtest/migration-test.c | 77 +++

[PATCH v4 05/14] util/dsa: Implement DSA task asynchronous completion thread model.

* Create a dedicated thread for DSA task completion. * DSA completion thread runs a loop and poll for completed tasks. * Start and stop DSA completion thread during DSA device start stop. User space application can directly submit task to Intel DSA accelerator by writing to DSA's device memory (ma

[PATCH v4 13/14] util/dsa: Add unit test coverage for Intel DSA task submission and completion.

* Test DSA start and stop path. * Test DSA configure and cleanup path. * Test DSA task submission and completion path. Signed-off-by: Bryan Zhang Signed-off-by: Hao Xiang --- tests/unit/meson.build | 6 + tests/unit/test-dsa.c | 499 + 2 files changed,

[PATCH v4 01/14] meson: Introduce new instruction set enqcmd to the build system.

Enable instruction set enqcmd in build. Signed-off-by: Hao Xiang --- meson.build | 14 ++ meson_options.txt | 2 ++ scripts/meson-buildoptions.sh | 3 +++ 3 files changed, 19 insertions(+) diff --git a/meson.build b/meson.build index 95cee7046e..9e008

[PATCH v4 06/14] util/dsa: Implement zero page checking in DSA task.

Create DSA task with operation code DSA_OPCODE_COMPVAL. Here we create two types of DSA tasks, a single DSA task and a batch DSA task. Batch DSA task reduces task submission overhead and hence should be the default option. However, due to the way DSA hardware works, a DSA batch task must contain at

[PATCH v12 4/6] ui/console: Use qemu_dmabuf_set_..() helpers instead

From: Dongwon Kim This commit updates all occurrences where these fields were set directly have been updated to utilize helper functions. v7: removed prefix, "dpy_gl_" from all helpers v8: Introduction of helpers was removed as those were already added by the previous commit Suggested-by:

[PATCH v12 2/6] ui/console: new dmabuf.h and dmabuf.c for QemuDmaBuf struct and helpers

From: Dongwon Kim New header and source files are added for containing QemuDmaBuf struct definition and newly introduced helpers for creating/freeing the struct and accessing its data. v10: Change the license type for both dmabuf.h and dmabuf.c from MIT to GPL to be in line with QEMU's defa

[PATCH v12 5/6] ui/console: Use qemu_dmabuf_new() and free() helpers instead

From: Dongwon Kim This commit introduces utility functions for the creation and deallocation of QemuDmaBuf instances. Additionally, it updates all relevant sections of the codebase to utilize these new utility functions. v7: remove prefix, "dpy_gl_" from all helpers qemu_dmabuf_free() return

[PATCH v12 6/6] ui/console: move QemuDmaBuf struct def to dmabuf.c

From: Dongwon Kim To complete privatizing process of QemuDmaBuf, QemuDmaBuf struct def is moved to dmabuf.c Suggested-by: Marc-André Lureau Cc: Philippe Mathieu-Daudé Cc: Daniel P. Berrangé Cc: Vivek Kasireddy Signed-off-by: Dongwon Kim --- include/ui/dmabuf.h | 19 +-- ui/

[PATCH v12 0/6] ui/console: Private QemuDmaBuf struct

From: Dongwon Kim This series introduces privacy enhancements to the QemuDmaBuf struct and its contained data to bolster security. it accomplishes this by introducing of helper functions for allocating, deallocating, and accessing individual fields within the struct and replacing all direct refer

[PATCH v12 3/6] ui/console: Use qemu_dmabuf_get_..() helpers instead

From: Dongwon Kim This commit updates all instances where fields within the QemuDmaBuf struct are directly accessed, replacing them with calls to these new helper functions. v6: fix typos in helper names in ui/spice-display.c v7: removed prefix, "dpy_gl_" from all helpers v8: Introduction of h

[PATCH v12 1/6] ui/gtk: Check if fence_fd is equal to or greater than 0

From: Dongwon Kim 'fence_fd' needs to be validated always before being referenced And the passing condition should include '== 0' as 0 is a valid value for the file descriptor. Suggested-by: Marc-André Lureau Reviewed-by: Daniel P. Berrangé Cc: Philippe Mathieu-Daudé Cc: Daniel P. Berrangé C

[PATCH 07/45] target/hppa: Add install_iaq_entries

Instead of two separate cpu_iaoq_entry calls, use one call to update both IAQ_Front and IAQ_Back. Simplify with an argument combination that automatically handles a simple increment from Front to Back. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 64 +--

[PATCH 36/45] target/hppa: Manage PSW_X and PSW_B in translator

PSW_X is cleared after every instruction, and only set by RFI. PSW_B is cleared after every non-branch, or branch not taken, and only set by taken branches. We can clear both bits with a single store, at most once per TB. Taken branches set PSW_B, at most once per TB. Signed-off-by: Richard Hend

[PATCH 29/45] target/hppa: Use delay_excp for conditional traps

Signed-off-by: Richard Henderson --- target/hppa/helper.h | 1 - target/hppa/int_helper.c | 2 +- target/hppa/op_helper.c | 7 --- target/hppa/translate.c | 41 ++-- 4 files changed, 32 insertions(+), 19 deletions(-) diff --git a/target/hppa/helpe

[PATCH 38/45] target/hppa: Implement PSW_X

Use PAGE_WRITE_INV to temporarily enable write permission on for a given page, driven by PSW_X being set. Signed-off-by: Richard Henderson --- target/hppa/mem_helper.c | 46 +++- 1 file changed, 27 insertions(+), 19 deletions(-) diff --git a/target/hppa/mem_h

[PATCH 45/45] target/hppa: Log cpu state on return-from-interrupt

Inverse of the logging on taking an interrupt. Signed-off-by: Richard Henderson --- target/hppa/sys_helper.c | 12 1 file changed, 12 insertions(+) diff --git a/target/hppa/sys_helper.c b/target/hppa/sys_helper.c index 22d6c89964..9b43b556fd 100644 --- a/target/hppa/sys_helper.c ++

[PATCH 28/45] target/hppa: Introduce DisasDelayException

Allow an exception to be emitted at the end of the TranslationBlock, leaving only the conditional branch inline. Use it for simple exception instructions like break, which happen to be nullified. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 60 +

[PATCH 14/45] target/hppa: Add space argument to do_ibranch

This allows unification of BE, BLR, BV, BVE with a common helper. Since we can now track space with IAQ_Next, we can now let the TranslationBlock continue across the delay slot with BE, BVE. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 76 ++-

[PATCH 05/45] target/hppa: Allow prior nullification in do_ibranch

Simplify the function by not attempting a conditional move on the branch destination -- just use nullify_over normally. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 73 +++-- 1 file changed, 20 insertions(+), 53 deletions(-) diff --git a/tar

[PATCH 35/45] target/hppa: Split PSW X and B into their own field

Generally, both of these bits are cleared at the end of each instruction. By separating these, we will be able to clear both with a single insn, instead of 2 or 3. Signed-off-by: Richard Henderson --- target/hppa/cpu.h| 3 ++- target/hppa/helper.c | 6 +++--- 2 files changed, 5 insertions(+

[PATCH 43/45] target/hppa: Implement PSW_H, PSW_L

Signed-off-by: Richard Henderson --- target/hppa/cpu.c | 4 +-- target/hppa/translate.c | 68 + 2 files changed, 64 insertions(+), 8 deletions(-) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 42c413211a..5adbe0fe9c 100644 --- a/target/hpp

[PATCH 11/45] target/hppa: Simplify TB end

Minimize the amount of code in hppa_tr_translate_insn advancing the insn queue for the next insn. Move the goto_tb path to hppa_tr_tb_stop. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 109 +--- 1 file changed, 57 insertions(+), 52 deletions

[PATCH 41/45] target/hppa: Implement CF_PCREL

Now that the groundwork has been laid, enabling CF_PCREL within the translator proper is a simple matter of updating copy_iaoq_entry and install_iaq_entries. We also need to modify the unwind info, since we no longer have absolute addresses to install. As expected, this reduces the runtime overhe

[PATCH 04/45] target/hppa: Pass displacement to do_dbranch

Pass a displacement instead of an absolute value. In trans_be, remove the user-only do_dbranch case. The branch we are attempting to optimize is to the zero page, which is perforce on a different page than the code currently executing, which means that we will *not* use a goto_tb. Use a plain in

[PATCH 10/45] target/hppa: Skip nullified insns in unconditional dbranch path

Signed-off-by: Richard Henderson --- target/hppa/translate.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index ac181180a6..6a73b1d409 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -1804,11

[PATCH 08/45] target/hppa: Add install_link

Add a common routine for writing the return address. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 54 +++-- 1 file changed, 31 insertions(+), 23 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index cad33e7aa6..19

[PATCH 15/45] target/hppa: Use umax in do_ibranch_priv

Signed-off-by: Richard Henderson --- target/hppa/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 2ddaefde21..7e01c21141 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -1980,7 +1980,7 @@

[PATCH 37/45] target/hppa: Implement PSW_B

PSW_B causes B,GATE to trap as an illegal instruction, removing the sequential execution test that was merely an approximation. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 25 ++--- 1 file changed, 6 insertions(+), 19 deletions(-) diff --git a/target/hppa/

[PATCH 26/45] target/hppa: Use TCG_COND_TST* in trans_ftest

Signed-off-by: Richard Henderson --- target/hppa/translate.c | 22 ++ 1 file changed, 6 insertions(+), 16 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 4b9092b1cf..b1311e7688 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.

[PATCH 25/45] target/hppa: Use registerfields.h for FPSR

Define all of the context dependent field definitions. Use FIELD_EX32 and FIELD_DP32 with named fields instead of extract32 and deposit32 with raw constants. Signed-off-by: Richard Henderson --- target/hppa/cpu.h| 25 + target/hppa/fpu_helper.c | 26 +-

[PATCH 01/45] target/hppa: Move cpu_get_tb_cpu_state out of line

Signed-off-by: Richard Henderson --- target/hppa/cpu.h | 43 ++- target/hppa/cpu.c | 42 ++ 2 files changed, 44 insertions(+), 41 deletions(-) diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index a072d0bb63..01dc

[PATCH 30/45] target/hppa: Use delay_excp for conditional trap on overflow

Signed-off-by: Richard Henderson --- target/hppa/helper.h | 1 - target/hppa/int_helper.c | 2 +- target/hppa/op_helper.c | 7 --- target/hppa/translate.c | 21 + 4 files changed, 14 insertions(+), 17 deletions(-) diff --git a/target/hppa/helper.h b/target/hppa/h

[PATCH 44/45] target/hppa: Log cpu state at interrupt

This contains all of the information logged before, plus more. Signed-off-by: Richard Henderson --- target/hppa/int_helper.c | 27 ++- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c index b82f32fd12..391

[PATCH 42/45] target/hppa: Implement PSW_T

PSW_T enables a trap on taken branches, at the very end of the execution of the branch instruction. Signed-off-by: Richard Henderson --- target/hppa/cpu.c | 4 +-- target/hppa/translate.c | 55 +++-- 2 files changed, 44 insertions(+), 15 deletions(-) d

[PATCH 23/45] target/hppa: Use TCG_COND_TST* in do_unit_addsub

Signed-off-by: Richard Henderson --- target/hppa/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index de510fddb1..38697ddfbd 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -1418,8 +1418,8

[PATCH 32/45] target/hppa: Store full iaoq_f and page bits of iaoq_d in TB

In preparation for CF_PCREL. store the iaoq_f in 3 parts: high bits in cs_base, middle bits in pc, and low bits in priv. For iaoq_b, set a bit for either of space or page differing, else the page offset. Install iaq entries before goto_tb. The change to not record the full direct branch difference

[PATCH 22/45] target/hppa: Use TCG_COND_TST* in do_unit_zero_cond

Signed-off-by: Richard Henderson --- target/hppa/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 1e772bef4d..de510fddb1 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -1004,9 +1004,8 @

[PATCH 06/45] target/hppa: Use CF_BP_PAGE instead of cpu_breakpoint_test

The generic tcg driver will have already checked for breakpoints. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index ceba7a98e5..dfdcb3e23c 100644 --- a/targ

[PATCH 40/45] target/hppa: Adjust priv for B,GATE at runtime

Do not compile in the priv change based on the first translation; look up the PTE at execution time. Signed-off-by: Richard Henderson --- target/hppa/cpu.h| 1 - target/hppa/helper.h | 1 + target/hppa/mem_helper.c | 34 +++--- target/hppa/translate.c |

[PATCH 18/45] target/hppa: Use displacements in DisasIAQE

This is a first step in enabling CF_PCREL, but for now we regenerate the absolute address before writeback. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 43 ++--- 1 file changed, 23 insertions(+), 20 deletions(-) diff --git a/target/hppa/tra

[PATCH 33/45] target/hppa: Do not mask in copy_iaoq_entry

As with loads and stores, code offsets are kept intact until the full gva is formed. In qemu, this is in cpu_get_tb_cpu_state. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/target/hppa/translate.c b/target/

[PATCH 21/45] target/hppa: Use TCG_COND_TST* in do_log_cond

We can directly test bits of a 32-bit comparison without zero or sign-extending an intermediate result. We can directly test bit 0 for odd/even. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 78 ++--- 1 file changed, 27 insertions(+), 51 delet

[PATCH 34/45] target/hppa: Improve hppa_cpu_dump_state

Print both raw IAQ_Front and IAQ_Back as well as the GVAs. Print control registers in system mode. Print floating point register if CPU_DUMP_FPU. Signed-off-by: Richard Henderson --- target/hppa/helper.c | 60 +++- 1 file changed, 54 insertions(+), 6 delet

[PATCH 19/45] target/hppa: Rename cond_make_* helpers

Use 'v' for a variable that needs copying, 't' for a temp that doesn't need copying, and 'i' for an immediate, and use this naming for both arguments of the comparison. So: cond_make_tmp -> cond_make_tt cond_make_0_tmp -> cond_make_ti cond_make_0 -> cond_make_vi cond_make -> cond_make

[PATCH 24/45] target/hppa: Use TCG_COND_TST* in trans_bb_imm

Signed-off-by: Richard Henderson --- target/hppa/translate.c | 12 +++- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 38697ddfbd..c996eb9823 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -3514,

[PATCH 27/45] target/hppa: Remove cond_free

Now that we do not need to free tcg temporaries, the only thing cond_free does is reset the condition to never. Instead, simply write a new condition over the old, which may be simply cond_make_f() for the never condition. The do_*_cond functions do the right thing with c or cf == 0, so there's no

[PATCH 39/45] target/hppa: Drop tlb_entry return from hppa_get_physical_address

The return-by-reference is never used. Signed-off-by: Richard Henderson --- target/hppa/cpu.h| 3 +-- target/hppa/int_helper.c | 2 +- target/hppa/mem_helper.c | 19 --- target/hppa/op_helper.c | 3 +-- 4 files changed, 7 insertions(+), 20 deletions(-) diff --git a/t

[PATCH 31/45] linux-user/hppa: Force all code addresses to PRIV_USER

The kernel does this along the return path to user mode. Signed-off-by: Richard Henderson --- linux-user/hppa/target_cpu.h | 4 ++-- target/hppa/cpu.h| 3 +++ linux-user/elfload.c | 4 ++-- linux-user/hppa/cpu_loop.c | 14 +++--- linux-user/hppa/signal.c | 6

[PATCH 12/45] target/hppa: Add IASQ entries to DisasContext

Add variable to track space changes to IAQ. So far, no such changes are introduced, but the new checks vs ctx->iasq_b may eliminate an unnecessary copy to cpu_iasq_f with e.g. BLR. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 39 ++- 1 file

[PATCH 09/45] target/hppa: Delay computation of IAQ_Next

We no longer have to allocate a temp and perform an addition before translation of the rest of the insn. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 26 ++ 1 file changed, 10 insertions(+), 16 deletions(-) diff --git a/target/hppa/translate.c b/target/

[PATCH 17/45] target/hppa: Introduce and use DisasIAQE for branch management

Wrap offset and space together in one structure, ensuring that they're copied together as required. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 378 +--- 1 file changed, 198 insertions(+), 180 deletions(-) diff --git a/target/hppa/translate

[PATCH 03/45] target/hppa: Move constant destination check into use_goto_tb

Share this check between gen_goto_tb and hppa_tr_translate_insn. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 42fa480950..cb874e1c1e

[PATCH 13/45] target/hppa: Add space arguments to install_iaq_entries

Move space assighments to a central location. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 58 +++-- 1 file changed, 27 insertions(+), 31 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 43a74dafcf..6b3b29867

[PATCH 20/45] target/hppa: Use TCG_COND_TST* in do_cond

We can directly test bits of a 32-bit comparison without zero or sign-extending an intermediate result. We can directly test bit 0 for odd/even. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 64 ++--- 1 file changed, 28 insertions(+), 36 delet

[PATCH 00/45] target/hppa: Misc improvements

Most of the patches lead up to implementing CF_PCREL. Along the way there is a grab bag of code updates (TCG_COND_TST*), bug fixes (space changes during branch-in-branch-delay-slot), and implementation of features (PSW bits B, X, T, H, L). Sven reported that PSW L tripped up HP/UX, so possibly the

[PATCH 16/45] target/hppa: Always make a copy in do_ibranch_priv

This simplifies callers, which might otherwise have to make another copy. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 7e01c21141..dd5193cb6a 100644

[PATCH 02/45] target/hppa: Use hppa_form_gva_psw in hppa_cpu_get_pc

This function is for log_pc(), which needs to produce a similar result to cpu_get_tb_cpu_state(). Signed-off-by: Richard Henderson --- target/hppa/cpu.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 1d5f5086bf..7315567910

[PATCH 2/5] target/alpha: Hoist branch shift to initial decode

Signed-off-by: Richard Henderson --- target/alpha/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index a97cd54f0c..52c2e6248b 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -432,7 +

[PATCH 1/5] target/alpha: Use cpu_env in preference to ALPHA_CPU

ALPHA_CPU has a dynamic object type assert, which is unnecessary considering that these are all class hooks. Signed-off-by: Richard Henderson --- target/alpha/cpu.c| 15 ++- target/alpha/helper.c | 8 2 files changed, 10 insertions(+), 13 deletions(-) diff --git a/targ

[PATCH 0/5] target/alpha: Implement CF_PCREL

Implement pc-relative tcg code generation. r~ Richard Henderson (5): target/alpha: Use cpu_env in preference to ALPHA_CPU target/alpha: Hoist branch shift to initial decode target/alpha: Split out gen_goto_tb target/alpha: Split out gen_pc_disp target/alpha: Implement CF_PCREL target/

[PATCH 5/5] target/alpha: Implement CF_PCREL

Signed-off-by: Richard Henderson --- target/alpha/cpu.c | 23 ++- target/alpha/translate.c | 29 + 2 files changed, 47 insertions(+), 5 deletions(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index f98d022671..0e2fbcb397 100644 ---

[PATCH 4/5] target/alpha: Split out gen_pc_disp

Prepare for pcrel by not modifying cpu_pc before use, in the case of JSR. Signed-off-by: Richard Henderson --- target/alpha/translate.c | 41 ++-- 1 file changed, 23 insertions(+), 18 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate

[PATCH 3/5] target/alpha: Split out gen_goto_tb

Signed-off-by: Richard Henderson --- target/alpha/translate.c | 61 ++-- 1 file changed, 21 insertions(+), 40 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 52c2e6248b..c1a55e5153 100644 --- a/target/alpha/translate.c +++ b

[PATCH v2 13/33] plugins: Use DisasContextBase for qemu_plugin_insn_haddr

We can delay the computation of haddr until the plugin actually requests it. Signed-off-by: Richard Henderson --- include/qemu/plugin.h | 4 accel/tcg/plugin-gen.c | 20 plugins/api.c | 25 - 3 files changed, 24 insertions(+), 25 delet

[PATCH v2 07/33] accel/tcg: Record when translator_fake_ldb is used

Signed-off-by: Richard Henderson --- include/exec/translator.h | 3 ++- accel/tcg/translator.c| 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/include/exec/translator.h b/include/exec/translator.h index 974cc4f9c4..e92dfba035 100644 --- a/include/exec/translator.h +++ b/i

[PATCH v2 18/33] disas: Split disas.c

The routines in disas-common.c are also used from disas-mon.c. Otherwise the rest of disassembly is only used from tcg. While we're at it, put host and target code into separate files. Signed-off-by: Richard Henderson --- disas/disas-internal.h | 4 + include/disas/disas.h | 4 + disas/disa

[PATCH v2 02/33] accel/tcg: Hide in_same_page outside of a target-specific context

While there are other methods that could be used to replace TARGET_PAGE_MASK, the function is not really required outside the context of target-specific translation. This makes the header usable by target independent code. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson ---

[PATCH v2 11/33] plugins: Use translator_st for qemu_plugin_insn_data

Use the bytes that we record for the entire TB, rather than a per-insn GByteArray. Record the length of the insn in plugin_gen_insn_end rather than infering from the length of the array. Signed-off-by: Richard Henderson --- include/qemu/plugin.h | 14 +- accel/tcg/plugin-gen.c | 7

[PATCH v2 06/33] accel/tcg: Record mmio bytes during translation

This will be able to replace plugin_insn_append, and will be usable for disassembly. Signed-off-by: Richard Henderson --- include/exec/translator.h | 12 accel/tcg/translator.c| 41 +++ 2 files changed, 53 insertions(+) diff --git a/include/e

[PATCH v2 09/33] plugins: Copy memory in qemu_plugin_insn_data

Instead of returning a host pointer, copy the data into storage provided by the caller. Signed-off-by: Richard Henderson --- include/qemu/qemu-plugin.h | 15 +++ contrib/plugins/execlog.c | 5 +++-- contrib/plugins/howvec.c | 4 ++-- plugins/api.c | 7 +-- 4 fi

[PATCH v2 29/33] target/riscv: Use translator_ld* for everything

Signed-off-by: Richard Henderson --- target/riscv/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index c999e942e1..2c27fd4ce1 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -20,7 +2

[PATCH v2 28/33] target/cris: Use cris_fetch in translate_v10.c.inc

Reviewed-by: Edgar E. Iglesias Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/cris/translate.c | 1 - target/cris/translate_v10.c.inc | 30 +- 2 files changed, 9 insertions(+), 22 deletions(-) diff --git a/target/cris/transl

[PATCH v2 00/33] accel/tcg: Improve disassembly for target and plugin

Based-on: 20240424230224.941028-1-richard.hender...@linaro.org ("[PATCH v3 00/20] Rewrite plugin code generation") Rebase only. Reviews required for: 04-accel-tcg-Reorg-translator_ld.patch 06-accel-tcg-Record-mmio-bytes-during-translation.patch 07-accel-tcg-Record-when-translator_fake_ldb-i

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