Hi all,
Sorry to late for V6, I was occupied by other stuff last two months, and
right now resume the submission.
Antonio Caggiano made the venus with QEMU on KVM platform last
September[1]. This series are inherited from his original work to support
the features of context init, hostmem, resourc
From: Robert Beckett
This relies on a virglrenderer change to include the dmabuf fd when
returning resource info.
Signed-off-by: Robert Beckett
Signed-off-by: Huang Rui
---
Changes in v6:
- Add scanout_blob function for virtio-gpu-virgl.
- Update for new virgl_gpu_resource.
hw/display/virti
From: Antonio Caggiano
Request Venus when initializing VirGL.
Signed-off-by: Antonio Caggiano
Signed-off-by: Huang Rui
---
Changes in v6:
- Remove the unstable API flags check because virglrenderer is already 1.0.
- Squash the render server flag support into "Initialize Venus".
hw/display/v
From: Antonio Caggiano
Enable resource UUID feature and implement command resource assign UUID.
This is done by introducing a hash table to map resource IDs to their
UUIDs.
Signed-off-by: Antonio Caggiano
Signed-off-by: Huang Rui
---
Changes in v6:
- Set resource uuid as option.
- Implement o
From: Xenia Ragiadakou
When the memory region has a different life-cycle from that of her parent,
could be automatically released, once has been unparent and once all of her
references have gone away, via the object's free callback.
However, currently, the address space subsystem keeps reference
From: Antonio Caggiano
Support BLOB resources creation, mapping and unmapping by calling the
new stable virglrenderer 0.10 interface. Only enabled when available and
via the blob config. E.g. -device virtio-vga-gl,blob=true
Signed-off-by: Antonio Caggiano
Signed-off-by: Dmitry Osipenko
Signed-
From: Antonio Caggiano
Add support for the Venus capset, which enables Vulkan support through
the Venus Vulkan driver for virtio-gpu.
Signed-off-by: Antonio Caggiano
Signed-off-by: Huang Rui
---
No change in v6.
hw/display/virtio-gpu-virgl.c | 21 +
1 file changed, 17 in
From: Dmitry Osipenko
The udmabuf usage is mandatory when virgl is disabled and blobs feature
enabled in the Qemu machine configuration. If virgl and blobs are enabled,
then udmabuf requirement is optional. Since udmabuf isn't widely supported
by a popular Linux distros today, let's relax the udm
Introduce a new virgl_gpu_resource data structure and helper functions
for virgl. It's used to add new member which is specific for virgl in
following patches of blob memory support.
Signed-off-by: Huang Rui
---
New patch:
- Introduce new struct virgl_gpu_resource to store virgl specific members
Patch "virtio-gpu: CONTEXT_INIT feature" has added the context_init
feature flags.
We would like to enable the feature with virglrenderer, so add to create
virgl renderer context with flags using context_id when valid.
Originally-by: Antonio Caggiano
Signed-off-by: Huang Rui
---
Changes in v6:
Configure a new feature flag (context_create_with_flags) for
virglrenderer.
Originally-by: Antonio Caggiano
Signed-off-by: Huang Rui
---
Changes in v6:
- Move macros configurations under virgl.found() and rename
HAVE_VIRGL_CONTEXT_CREATE_WITH_FLAGS.
meson.build | 4
1 file changed, 4 i
Sync up kernel headers to update venus macro till they are merged into
mainline.
Signed-off-by: Huang Rui
---
Changes in v6:
- Venus capset is applied in kernel, so update it in qemu for future use.
https://lore.kernel.org/lkml/b79dcf75-c9e8-490e-644f-3b97d95f7...@collabora.com/
https://cgit.fr
Stefan Hajnoczi writes:
> On Mon, Dec 11, 2023 at 04:32:06PM +0100, Markus Armbruster wrote:
>> Kevin Wolf writes:
>>
>> > Am 18.09.2023 um 18:16 hat Stefan Hajnoczi geschrieben:
>> >> virtio-blk and virtio-scsi devices will need a way to specify the
>> >> mapping between IOThreads and virtqueu
Convert the legacy VFIOIOMMUOps struct to the new VFIOIOMMU QOM
interface. The set of of operations for this backend can be referenced
with a literal typename instead of a C struct. This will simplify
support of multiple backends.
Reviewed-by: Zhenzhong Duan
Signed-off-by: Cédric Le Goater
---
Hello,
The VFIO object hierarchy has some constraints because each VFIO type
has a dual nature: a VFIO nature for passthrough support and a bus
nature (PCI, AP, CCW, Platform) for its initial presentation. It
seemed the best approach made because multi-inheritance is not
feasible with QOM and both
Move vfio_spapr_container_setup() to a VFIOIOMMUClass::setup handler
and convert the sPAPR VFIOIOMMUOps struct to a QOM interface. The
sPAPR QOM interface inherits from the legacy QOM interface because
because both have the same basic needs. The sPAPR interface is then
extended with the handlers sp
This allows to abstract a bit more the sPAPR IOMMU support in the
legacy IOMMU backend.
Reviewed-by: Zhenzhong Duan
Signed-off-by: Cédric Le Goater
---
include/hw/vfio/vfio-container-base.h | 1 +
hw/vfio/container.c | 10 +++-
hw/vfio/spapr.c | 35 +
This will help subsequent patches to unify the initialization of type1
and sPAPR IOMMU backends.
Reviewed-by: Zhenzhong Duan
Signed-off-by: Cédric Le Goater
---
hw/vfio/container.c | 63 +
1 file changed, 35 insertions(+), 28 deletions(-)
diff --git
sPAPR IOMMU support is only needed for pseries machines. Compile out
support when CONFIG_PSERIES is not set. This saves ~7K of text.
Reviewed-by: Zhenzhong Duan
Signed-off-by: Cédric Le Goater
---
hw/vfio/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/vfio/me
VFIOContainerBase was not introduced as an abstract QOM object because
it felt unnecessary to expose all the IOMMU backends to the QEMU
machine and human interface. However, we can still abstract the IOMMU
backend handlers using a QOM interface class. This provides more
flexibility when referencing
Availability of the IOMMUFD backend can now be fully determined at
runtime and the ifdef check was a build time protection (for PPC not
supporting it mostly).
Reviewed-by: Zhenzhong Duan
Signed-off-by: Cédric Le Goater
---
hw/vfio/common.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/h
This will help in converting the sPAPR IOMMU backend to a QOM interface.
Reviewed-by: Zhenzhong Duan
Signed-off-by: Cédric Le Goater
---
include/hw/vfio/vfio-container-base.h | 1 +
hw/vfio/container.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/hw/vfio/vfio-
As previously done for the sPAPR and legacy IOMMU backends, convert
the VFIOIOMMUOps struct to a QOM interface. The set of of operations
for this backend can be referenced with a literal typename instead of
a C struct.
Reviewed-by: Zhenzhong Duan
Signed-off-by: Cédric Le Goater
---
v2: - Remove
vfio_init_container() already defines the IOMMU type of the container.
Do the same for the VFIOIOMMUOps struct. This prepares ground for the
following patches that will deduce the associated VFIOIOMMUOps struct
from the IOMMU type.
Reviewed-by: Zhenzhong Duan
Signed-off-by: Cédric Le Goater
---
On Mon, Dec 11, 2023 at 1:28 PM Fabiano Rosas wrote:
>
> Hao Xiang writes:
>
> > * DSA device open and close.
> > * DSA group contains multiple DSA devices.
> > * DSA group configure/start/stop/clean.
> >
> > Signed-off-by: Hao Xiang
> > Signed-off-by: Bryan Zhang
> > ---
> > include/qemu/dsa.
On Mon, Dec 18, 2023 at 5:34 PM Wang, Lei wrote:
>
> On 12/19/2023 2:57, Hao Xiang wrote:> On Sun, Dec 17, 2023 at 7:11 PM Wang,
> Lei
> wrote:
> >>
> >> On 11/14/2023 13:40, Hao Xiang wrote:> * Create a dedicated thread for DSA
> >> task
> >> completion.
> >>> * DSA completion thread runs a lo
I would be grateful if you would any comments on my patch.
ping,
Tomoyuki HIROSE
On Mon, Dec 11, 2023 at 4:12 PM Tomoyuki HIROSE
wrote:
>
> According to xHCI spec rev 1.2, unaligned access to xHCI Host
> Controller Capability Registers are not prohibited. But current
> implementation does not s
On 12/19/2023 2:57, Hao Xiang wrote:> On Sun, Dec 17, 2023 at 7:11 PM Wang, Lei
wrote:
>>
>> On 11/14/2023 13:40, Hao Xiang wrote:> * Create a dedicated thread for DSA
>> task
>> completion.
>>> * DSA completion thread runs a loop and poll for completed tasks.
>>> * Start and stop DSA completion
On Mon, 18 Dec 2023, Bernhard Beschow wrote:
The VIA south bridges are able to relocate and toggle (enable or disable) their
SuperI/O functions. So far this is hardcoded such that all functions are always
enabled and are located at fixed addresses.
Some PC BIOSes seem to probe for I/O occupancy
On Mon, 18 Dec 2023, Bernhard Beschow wrote:
This is a preparation for implementing relocation and toggling of SuperI/O
functions in the VT8231 device model. Upon reset, all SuperI/O functions will be
deactivated, so in case if no -bios is given, let the machine configure those
functions the same
On Mon, 18 Dec 2023, Bernhard Beschow wrote:
Implement isa_fdc_set_{enabled,iobase} in order to implement relocation and
toggling of SuperI/O functions in the VIA south bridges without breaking
encapsulation.
You may want to revise these commit messages. What toggling means is only
defined in
On Mon, 18 Dec 2023, Bernhard Beschow wrote:
Some SuperI/O devices such as the VIA south bridges or the PC87312 controller
are able to relocate their SuperI/O functions. Add a convenience function for
implementing this in the VIA south bridges.
This convenience function relies on previous simpli
On Mon, 18 Dec 2023, Bernhard Beschow wrote:
ParallelState::portio_list isn't used inside ParallelState context but only
inside ISAParallelState context, so more it there.
Same comments as for patch 1 otherwise
Reviewed-by: BALATON Zoltan
Signed-off-by: Bernhard Beschow
---
include/hw/char
On Mon, 18 Dec 2023, Bernhard Beschow wrote:
SerialState::io isn't used within TYPE_SERIAL directly. Push it to its users to
make them the owner of the MemoryRegion.
I'm not sure this patch is needed. The users already own the SerialState
so can use its memory region so they don't need their o
On Mon, 18 Dec 2023, Bernhard Beschow wrote:
FDCtrl::iomem isn't used inside FDCtrl context but only inside FDCtrlSysBus
context, so more it there.
Same comments as for patch 1 otherwise
Reviewed-by: BALATON Zoltan
Signed-off-by: Bernhard Beschow
---
hw/block/fdc-internal.h | 2 --
hw/block
On Mon, 18 Dec 2023, Bernhard Beschow wrote:
FDCtrl::portio_list isn't used inside FDCtrl context but only inside
FDCtrlISABus context, so more it there.
"more" -> "move", you have the same typo in several other commit messages.
Not sure I like the C++ism FDCtrl::portio_list and would write ou
On Mon, 18 Dec 2023, Bernhard Beschow wrote:
Am 18. Dezember 2023 10:54:56 UTC schrieb BALATON Zoltan :
On Sun, 17 Dec 2023, Bernhard Beschow wrote:
Am 17. Dezember 2023 15:47:33 UTC schrieb BALATON Zoltan :
On Sun, 17 Dec 2023, Bernhard Beschow wrote:
Exposing the internal header allows for
On 12/18/23 18:35, Michael Tokarev wrote:
18.12.2023 20:20, Daniel Henrique Barboza wrote:
On 12/18/23 13:22, Natanael Copa wrote:
strerrorname_np is non-portable and breaks building with musl libc.
Use strerror(errno) instead, like we do other places.
Cc: qemu-sta...@nongnu.org
Fixes: c
On 12/18/23 06:05, Yong-Xuan Wang wrote:
The emulated AIA within the Linux kernel restores the HART index
of the IMSICs according to the configured AIA settings. During
this process, the group setting is used only when the machine
partitions harts into groups. It's unnecessary to set the group
18.12.2023 20:20, Daniel Henrique Barboza wrote:
On 12/18/23 13:22, Natanael Copa wrote:
strerrorname_np is non-portable and breaks building with musl libc.
Use strerror(errno) instead, like we do other places.
Cc: qemu-sta...@nongnu.org
Fixes: commit 082e9e4a58ba (target/riscv/kvm: improve
On 12/18/23 06:05, Yong-Xuan Wang wrote:
The interrupts-extended property of PLIC only has 2 * hart number
fields when KVM enabled, copy 4 * hart number fields to fdt will
expose some uninitialized value.
In this patch, I also refactor the code about the setting of
interrupts-extended propert
On 12/18/23 13:22, Natanael Copa wrote:
strerrorname_np is non-portable and breaks building with musl libc.
Use strerror(errno) instead, like we do other places.
Cc: qemu-sta...@nongnu.org
Fixes: commit 082e9e4a58ba (target/riscv/kvm: improve 'init_multiext_cfg' error
msg)
Resolves: https:/
We'll add a new RISC-V linux-header file, but first let's update all
headers.
Headers for 'asm-loongarch' were added in this update.
Signed-off-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
---
include/standard-headers/drm/drm_fourcc.h | 2 +
include/standard-headers/linux/pci_r
Hi,
This version was rebased on top of Alistair's riscv-to-apply.next. A
small tweak was needed in patch 4 due to changes in the branch.
I took the chance to update linux-headers to 6.7-rc5, although the
differences from the rc3 headers from v1 were minimal.
All patches acked.
Changes from v1:
KVM vector support for RISC-V requires the linux-header ptrace.h.
Signed-off-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
---
linux-headers/asm-riscv/ptrace.h | 132 +++
scripts/update-linux-headers.sh | 3 +
2 files changed, 135 insertions(+)
create mo
Linux RISC-V vector documentation (Document/arch/riscv/vector.rst)
mandates a prctl() in order to allow an userspace thread to use the
Vector extension from the host.
This is something to be done in realize() time, after init(), when we
already decided whether we're using RVV or not. We don't have
Add support for RVV and Vector CSR KVM regs vstart, vl and vtype.
Support for vregs[] requires KVM side changes and an extra reg (vlenb)
and will be added later.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
---
target/riscv/kvm/kvm-cpu.c | 74 +++
Hi. I wanted to follow up with information to test/reproduce this BUG/issue.
Steps to reproduce:
1. Use the following options with QEMU (configured with OVMF):
-S -smp 2,maxcpus=260,sockets=2,cores=65,threads=2
2. Start QEMU and when QEMU reaches the paused state (due to -S),
issue t
On Sun, Dec 17, 2023 at 7:11 PM Wang, Lei wrote:
>
> On 11/14/2023 13:40, Hao Xiang wrote:> * Create a dedicated thread for DSA
> task
> completion.
> > * DSA completion thread runs a loop and poll for completed tasks.
> > * Start and stop DSA completion thread during DSA device start stop.
> >
>
Am 18. Dezember 2023 10:54:56 UTC schrieb BALATON Zoltan :
>On Sun, 17 Dec 2023, Bernhard Beschow wrote:
>> Am 17. Dezember 2023 15:47:33 UTC schrieb BALATON Zoltan
>> :
>>> On Sun, 17 Dec 2023, Bernhard Beschow wrote:
Exposing the internal header allows for exposing struct FDCtrlISABus wh
Implement isa_parallel_set_{enabled,iobase} in order to implement relocation and
toggling of SuperI/O functions in the VIA south bridges without breaking
encapsulation.
Signed-off-by: Bernhard Beschow
---
include/hw/char/parallel-isa.h | 3 +++
hw/char/parallel-isa.c | 14 ++
Implement isa_serial_set_{enabled,iobase} in order to implement relocation and
toggling of SuperI/O functions in the VIA south bridges without breaking
encapsulation.
Signed-off-by: Bernhard Beschow
---
include/hw/char/serial.h | 2 ++
hw/char/serial-isa.c | 14 ++
2 files chang
SerialState::io isn't used within TYPE_SERIAL directly. Push it to its users to
make them the owner of the MemoryRegion.
Signed-off-by: Bernhard Beschow
---
include/hw/char/serial.h | 2 +-
hw/char/serial-isa.c | 7 +--
hw/char/serial-pci-multi.c | 7 ---
hw/char/serial-pci.c
Some SuperI/O devices such as the VIA south bridges or the PC87312 controller
allow to enable or disable their SuperI/O functions. Add a convenience function
for implementing this in the VIA south bridges.
The naming of the functions is inspired by its memory_region_set_enabled()
pendant.
Signed-
This is a preparation for implementing relocation and toggling of SuperI/O
functions in the VT8231 device model. Upon reset, all SuperI/O functions will be
deactivated, so in case if no -bios is given, let the machine configure those
functions the same way pegasos2.rom would do. For now the meantim
The VIA south bridges are able to relocate and toggle (enable or disable) their
SuperI/O functions. So far this is hardcoded such that all functions are always
enabled and are located at fixed addresses.
Some PC BIOSes seem to probe for I/O occupancy before activating such a function
and issue an
FDCtrl::portio_list isn't used inside FDCtrl context but only inside
FDCtrlISABus context, so more it there.
Signed-off-by: Bernhard Beschow
---
hw/block/fdc-internal.h | 2 --
hw/block/fdc-isa.c | 4 +++-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/block/fdc-internal.
Implement isa_fdc_set_{enabled,iobase} in order to implement relocation and
toggling of SuperI/O functions in the VIA south bridges without breaking
encapsulation.
Signed-off-by: Bernhard Beschow
---
include/hw/block/fdc.h | 3 +++
hw/block/fdc-isa.c | 14 ++
2 files changed, 17
FDCtrl::iomem isn't used inside FDCtrl context but only inside FDCtrlSysBus
context, so more it there.
Signed-off-by: Bernhard Beschow
---
hw/block/fdc-internal.h | 2 --
hw/block/fdc-sysbus.c | 6 --
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/block/fdc-internal.h b/
ParallelState::portio_list isn't used inside ParallelState context but only
inside ISAParallelState context, so more it there.
Signed-off-by: Bernhard Beschow
---
include/hw/char/parallel-isa.h | 2 ++
include/hw/char/parallel.h | 2 --
hw/char/parallel.c | 2 +-
3 files changed,
portio_list_add_1() creates a MemoryRegionPortioList instance which holds a
MemoryRegion `mr` and an array of MemoryRegionPortio elements named `ports`.
Each element in the array gets assigned the same value for its .base attribute.
The same value also ends up as the .addr attribute of `mr` due to
Some SuperI/O devices such as the VIA south bridges or the PC87312 controller
are able to relocate their SuperI/O functions. Add a convenience function for
implementing this in the VIA south bridges.
This convenience function relies on previous simplifications in exec/ioport
which avoids some dupl
This series implements relocation of the SuperI/O functions of the VIA south
bridges which resolves some FIXME's. It is part of my via-apollo-pro-133t
branch [1] which is an extension of bringing the VIA south bridges to the PC
machine [2]. This branch is able to run some real-world X86 BIOSes in t
On Mon, Dec 11, 2023 at 11:44 AM Fabiano Rosas wrote:
>
> Hao Xiang writes:
>
> > Intel DSA offloading is an optional feature that turns on if
> > proper hardware and software stack is available. To turn on
> > DSA offloading in multifd live migration:
> >
> > multifd-dsa-accel="[dsa_dev_path1] ]
On 12/18/23 14:53, Peter Maydell wrote:
On Mon, 18 Dec 2023 at 17:22, Daniel Henrique Barboza
wrote:
On 12/18/23 13:22, Natanael Copa wrote:
strerrorname_np is non-portable and breaks building with musl libc.
Use strerror(errno) instead, like we do other places.
Cc: qemu-sta...@nongnu.
On Mon, 18 Dec 2023 at 17:22, Daniel Henrique Barboza
wrote:
>
>
>
> On 12/18/23 13:22, Natanael Copa wrote:
> > strerrorname_np is non-portable and breaks building with musl libc.
> >
> > Use strerror(errno) instead, like we do other places.
> >
> > Cc: qemu-sta...@nongnu.org
> > Fixes: commit 08
On 12/18/23 13:22, Natanael Copa wrote:
strerrorname_np is non-portable and breaks building with musl libc.
Use strerror(errno) instead, like we do other places.
Cc: qemu-sta...@nongnu.org
Fixes: commit 082e9e4a58ba (target/riscv/kvm: improve 'init_multiext_cfg' error
msg)
Resolves: https:/
Hi Alistair,
Thanks for the lightning fast reply!
Could you please tell who should bump those numbers and to what values?
Do you think I could submit this patch series for the review?
Thanks
пн, 18 дек. 2023 г. в 06:11, Alistair Francis :
> On Sat, Dec 16, 2023 at 11:52 PM Alexey Baturo
> wrot
On Mon, 4 Dec 2023 at 00:27, Sergey Kambalin wrote:
>
> Signed-off-by: Sergey Kambalin
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Fri, 8 Dec 2023 at 02:33, Sergey Kambalin wrote:
>
> Signed-off-by: Sergey Kambalin
> ---
> hw/arm/bcm2838_peripherals.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/bcm2838_peripherals.c b/hw/arm/bcm2838_peripherals.c
> index c147b6e453..196fb890a2 100644
>
On Fri, 8 Dec 2023 at 02:37, Sergey Kambalin wrote:
>
> Signed-off-by: Sergey Kambalin
> ---
> hw/arm/bcm2838_peripherals.c | 140 +++
> include/hw/arm/bcm2838_peripherals.h | 9 ++
> 2 files changed, 149 insertions(+)
> @@ -42,6 +73,115 @@ static void bcm2838
On Fri, 8 Dec 2023 at 02:33, Sergey Kambalin wrote:
>
> Signed-off-by: Sergey Kambalin
> ---
> hw/gpio/bcm2838_gpio.c | 59 +++---
> include/hw/gpio/bcm2838_gpio.h | 5 +++
> 2 files changed, 60 insertions(+), 4 deletions(-)
>
> diff --git a/hw/gpio/bcm2838_g
On Fri, 8 Dec 2023 at 02:33, Sergey Kambalin wrote:
>
> Signed-off-by: Sergey Kambalin
> ---
> hw/gpio/bcm2838_gpio.c | 192 -
> 1 file changed, 189 insertions(+), 3 deletions(-)
> static uint64_t bcm2838_gpio_read(void *opaque, hwaddr offset, unsigned s
On Fri, 8 Dec 2023 at 02:39, Sergey Kambalin wrote:
>
> Signed-off-by: Sergey Kambalin
> ---
> hw/arm/bcm2838.c | 4 +-
> hw/gpio/bcm2838_gpio.c | 152 +++
> hw/gpio/meson.build | 5 +-
> include/hw/arm/bcm2838_periph
strerrorname_np is non-portable and breaks building with musl libc.
Use strerror(errno) instead, like we do other places.
Cc: qemu-sta...@nongnu.org
Fixes: commit 082e9e4a58ba (target/riscv/kvm: improve 'init_multiext_cfg' error
msg)
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2041
B
On Fri, 8 Dec 2023 at 02:32, Sergey Kambalin wrote:
>
> Signed-off-by: Sergey Kambalin
> ---
> hw/arm/bcm2838.c | 167 +++
> hw/arm/trace-events | 2 +
> include/hw/arm/bcm2838.h | 2 +
> include/hw/arm/bcm2838_peripher
On Fri, 8 Dec 2023 at 02:33, Sergey Kambalin wrote:
>
> Signed-off-by: Sergey Kambalin
> ---
> hw/arm/bcm2838.c | 100 +++
> hw/arm/bcm2838_peripherals.c | 72 +++
> hw/arm/meson.build | 2 +
> include/hw/ar
On Fri, 8 Dec 2023 at 02:36, Sergey Kambalin wrote:
>
> Pre-setup for raspberry pi 4 introduction
>
> Signed-off-by: Sergey Kambalin
Reviewed-by: Peter Maydell
thanks
-- PMM
On Fri, 8 Dec 2023 at 02:32, Sergey Kambalin wrote:
>
> Pre setup for BCM2838 introduction
>
> Signed-off-by: Sergey Kambalin
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Fri, 8 Dec 2023 at 02:40, Sergey Kambalin wrote:
>
> Pre-setup for BCM2838 introduction
>
> Signed-off-by: Sergey Kambalin
Reviewed-by: Peter Maydell
thanks
-- PMM
On Mon, 4 Dec 2023 at 00:28, Sergey Kambalin wrote:
>
> Pre setup for BCM2838 introduction
>
> Signed-off-by: Sergey Kambalin
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Mon, 18 Dec 2023 at 15:57, Peter Maydell wrote:
>
> On Mon, 4 Dec 2023 at 00:28, Sergey Kambalin wrote:
> >
> > Pre setup for BCM2838 introduction
> >
> > Signed-off-by: Sergey Kambalin
> > ---
>
> Reviewed-by: Peter Maydell
Whoops, I meant to send this as a reply to the v4 patch.
-- PMM
Am 05.12.2023 um 19:20 hat Stefan Hajnoczi geschrieben:
> Delete these functions because nothing calls these functions anymore.
>
> I introduced these APIs in commit 98563fc3ec44 ("aio: add
> aio_context_acquire() and aio_context_release()") in 2014. It's with a
> sigh of relief that I delete thes
Am 05.12.2023 um 19:20 hat Stefan Hajnoczi geschrieben:
> The AioContext lock no longer has any effect. Remove it.
>
> Signed-off-by: Stefan Hajnoczi
> Reviewed-by: Eric Blake
Reviewed-by: Kevin Wolf
Am 05.12.2023 um 19:20 hat Stefan Hajnoczi geschrieben:
> Now that the AioContext lock no longer exists, AIO_WAIT_WHILE() and
> AIO_WAIT_WHILE_UNLOCKED() are equivalent.
>
> A future patch will get rid of AIO_WAIT_WHILE_UNLOCKED().
>
> Signed-off-by: Stefan Hajnoczi
> Reviewed-by: Eric Blake
R
Am 05.12.2023 um 19:20 hat Stefan Hajnoczi geschrieben:
> The bdrv_co_lock() and bdrv_co_unlock() functions are already no-ops.
> Remove them.
>
> Signed-off-by: Stefan Hajnoczi
Reviewed-by: Kevin Wolf
Am 05.12.2023 um 19:19 hat Stefan Hajnoczi geschrieben:
> Since the removal of AioContext locking, the correctness of the code
> relies on running requests from a single AioContext at any given time.
>
> Add assertions that verify that callbacks are invoked in the correct
> AioContext.
>
> Signed
On Sat, 16 Dec 2023 at 13:34, Nikita Ostrenkov wrote:
>
> Signed-off-by: Nikita Ostrenkov
> ---
> hw/misc/imx7_snvs.c | 93 ++---
> hw/misc/trace-events| 4 +-
> include/hw/misc/imx7_snvs.h | 7 ++-
> 3 files changed, 94 insertions(+), 10 deletio
On Fri, 15 Dec 2023 at 15:16, Jean-Philippe Brucker
wrote:
>
> MDCR_EL2.HPMN allows an hypervisor to limit the number of PMU counters
> available to EL1 and EL0 (to keep the others to itself). QEMU already
> implements this split correctly, except for PMCR_EL0.N reads: the number
> of counters rea
Add PLIC structures for each socket in the MADT when system is
configured with PLIC as the external interrupt controller.
Signed-off-by: Haibo Xu
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
--
Update the RINTC structure in MADT with AIA related fields.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
Reviewed-by: Andrew Jones
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt-acpi-build.c | 43 ++
1 file chang
Add APLIC structures for each socket in the MADT when system is configured
with APLIC as the external wired interrupt controller.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt-
MMU type information is available via MMU node in RHCT. Add this node in
RHCT.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt-acpi-build.c | 36 +
Add basic IO controllers and devices like PCI, VirtIO and UART in the
ACPI namespace.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/Kconfig | 1 +
hw/riscv/virt-acpi-build.c | 79 ++
Update the GPEX host bridge properties related to MMIO ranges with
values set for the virt machine.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt.c | 47 -
inclu
With common function to add virtio in DSDT created now, update microvm
code also to use it instead of duplicate code.
Suggested-by: Andrew Jones
Signed-off-by: Sunil V L
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/i386/acpi-microvm.c | 15 ++-
1 file changed, 2
ACPI DSDT generator needs information like ECAM range, PIO range, 32-bit
and 64-bit PCI MMIO range etc related to the PCI host bridge. Instead of
making these values machine specific, create properties for the GPEX
host bridge with default value 0. During initialization, the firmware
can initialize
Add IMSIC structure in MADT when IMSIC is configured.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
Acked-by: Alistair Francis
Acked-by: Michael S. Tsirkin
---
hw/riscv/virt-acpi-build.c | 35 +++
1 file changed, 35 in
RISC-V also needs to use the same code to create fw_cfg in DSDT. So,
avoid code duplication by moving the code in arm and riscv to a device
specific file.
Suggested-by: Igor Mammedov
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Reviewed-by: Andrew
When CMO related extensions like Zicboz, Zicbom and Zicbop are enabled, the
block size for those extensions need to be communicated via CMO node in
RHCT. Add CMO node in RHCT if any of those CMO extensions are detected.
Signed-off-by: Sunil V L
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: A
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