Re: [PATCH v2 1/2] ppc/pnv: Add an I2C controller model

On 10/16/23 22:55, Miles Glenn wrote: On Fri, 2023-10-13 at 10:58 +0200, Philippe Mathieu-Daudé wrote: Hi Glenn, Cédric, On 12/10/23 22:08, Glenn Miles wrote: From: Cédric Le Goater The more recent IBM power processors have an embedded I2C controller that is accessible by software via the XS

[PATCH 14/20] target/sparc: Merge advance_jump_uncond_{never, always} into advance_jump_cond

Handle these via TCG_COND_{ALWAYS,NEVER}. Allow dc->npc to be variable, using gen_mov_pc_npc. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 73 1 file changed, 29 insertions(+), 44 deletions(-) diff --git a/target/sparc/translate.c b/ta

[PATCH 20/20] target/sparc: Implement UDIV inline

Signed-off-by: Richard Henderson --- target/sparc/helper.h| 1 - target/sparc/helper.c| 29 +++--- target/sparc/translate.c | 52 +++- 3 files changed, 54 insertions(+), 28 deletions(-) diff --git a/target/sparc/helper.h b/target/sparc

[PATCH 12/20] target/sparc: Do flush_cond in advance_jump_cond

Do this here instead of in each caller. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index a75f75dfb9..74a0972bda 100644 --- a/target/sparc/translate.c

[PATCH 08/20] target/sparc: Remove CC_OP leftovers

All instructions have been converted to generate full condition codes explicitly. Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 21 --- target/sparc/helper.h | 2 - linux-user/sparc/cpu_loop.c | 5 -- target/sparc/cc_helper.c| 42 - target/spa

[PATCH 18/20] target/sparc: Discard cpu_cond at the end of each insn

If the insn raises no exceptions, there will be no path in which cpu_cond is used, and so the computation may be optimized away. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 27 +++ 1 file changed, 27 insertions(+) diff --git a/target/sparc/translate.c

[PATCH 05/20] target/sparc: Remove CC_OP_ADD, CC_OP_ADDX, CC_OP_TADD

These are all related and implementable with common code. Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 3 - target/sparc/cc_helper.c | 59 target/sparc/translate.c | 199 +++ 3 files changed, 95 insertions(+), 166 deletions(-

[PATCH 19/20] target/sparc: Implement UDIVX and SDIVX inline

Signed-off-by: Richard Henderson --- target/sparc/helper.h| 4 -- target/sparc/helper.c| 24 - target/sparc/translate.c | 109 ++- 3 files changed, 95 insertions(+), 42 deletions(-) diff --git a/target/sparc/helper.h b/target/sparc/helper.h

[PATCH 15/20] target/sparc: Use DISAS_EXIT in do_wrpsr

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 53a755874e..18546d3bd2 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -3207,10 +

[PATCH 17/20] target/sparc: Record entire jump condition in DisasContext

Use the original condition instead of consuming cpu_cond, which will now only be live along exception paths. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 27 --- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/target/sparc/translate.c b/

[PATCH 11/20] target/sparc: Always copy conditions into a new temporary

This will allow the condition to live across changes to the global cc variables. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 20 +++- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 32d29

[PATCH 07/20] target/sparc: Remove CC_OP_TADDTV, CC_OP_TSUBTV

Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 2 - target/sparc/cc_helper.c | 267 +-- target/sparc/helper.c| 40 -- target/sparc/translate.c | 4 +- 4 files changed, 32 insertions(+), 281 deletions(-) diff --git a/target/sparc/c

Re: [PATCH v3 0/3] Add emulation of AmigaOne XE board

On 10/17/23 00:25, BALATON Zoltan wrote: On Sat, 14 Oct 2023, BALATON Zoltan wrote: Changes in v3: - Update values, comment and commit message in patch 1 again Changes in v2: - Update comment and commit message in patch 1 (Mark) - Fix irq mapping in patch 2 (Volker) Regards, BALATON Zoltan BA

[PATCH 01/20] target/sparc: Introduce cpu_put_psr_icc

Isolate linux-user from changes to icc representation. Signed-off-by: Richard Henderson --- target/sparc/cpu.h| 1 + linux-user/sparc/signal.c | 2 +- target/sparc/win_helper.c | 7 ++- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/target/sparc/cpu.h b/target/sparc/c

[PATCH 10/20] target/sparc: Change DisasCompare.c2 to int

We don't require c2 to be variable, so emphasize that. We don't currently require c2 to be non-zero, but that will change. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 40 ++-- 1 file changed, 22 insertions(+), 18 deletions(-) diff --git a/

[PATCH 16/20] target/sparc: Merge gen_op_next_insn into only caller

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 9 ++--- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 18546d3bd2..8a92fa4a1a 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -953,

[PATCH 03/20] target/sparc: Remove CC_OP_DIV

Return both result and overflow from helper_[us]div. Compute all flags explicitly in gen_op_[us]divcc. Marginally improve the INT64_MIN special case in do_sdiv. Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 1 - target/sparc/helper.h| 4 +-- target/sparc/cc_helper.c | 26

[PATCH 09/20] target/sparc: Remove DisasCompare.is_bool

Since we're going to feed cpu_cond to another comparison, we don't reqire a boolean value -- anything non-zero is sufficient. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 22 +++--- 1 file changed, 7 insertions(+), 15 deletions(-) diff --git a/target/sparc/tra

[PATCH 06/20] target/sparc: Remove CC_OP_SUB, CC_OP_SUBX, CC_OP_TSUB

These are all related and implementable with common code. Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 3 - target/sparc/cc_helper.c | 59 -- target/sparc/translate.c | 226 ++- 3 files changed, 54 insertions(+), 234 deletions(-)

[PATCH 13/20] target/sparc: Merge gen_branch2 into advance_pc

The function had only one caller. Canonicalize the cpu_cond test to TCG_COND_NE, the "natural" sense of its value. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 28 ++-- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/target/sparc/transl

[PATCH 02/20] target/sparc: Split psr and xcc into components

Step in removing CC_OP: change the representation of CC_OP_FLAGS. The 8 bits are distributed between 6 variables, which should make it easy to keep up to date. The code within cc_helper.c is quite ugly but is only temporary. Signed-off-by: Richard Henderson --- linux-user/sparc/target_cpu.h |

[PATCH 04/20] target/sparc: Remove CC_OP_LOGIC

Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 1 - target/sparc/cc_helper.c | 19 target/sparc/translate.c | 97 +--- 3 files changed, 40 insertions(+), 77 deletions(-) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index df49

[PATCH 00/20] target/sparc: Cleanup condition codes etc

This was part of my guess for some of the performance problems. I saw compute_all_sub quite high in the profile at some point, and I believe that the test case has a partially rotated loop such that "cmp" is in a delay slot, and so the gen_compare fast path for CC_OP_SUB is not visible to the cond

Re: [PATCH v3 0/4] qapi/migration: Dedup migration parameter objects and fix tls-authz crash

Peter Xu writes: > On Mon, Oct 16, 2023 at 09:08:40AM +0200, Markus Armbruster wrote: >> Let me try to summarize our findings so far. > > Thanks. I'll reply here instead of all the rest places. > >> >> PATCH 1 has been merged. PATCH 2 has been queued, but not merged (not >> sure why, accident?

[PATCH v2 63/90] target/sparc: Move FMOVS, FNEGS, FABSS, FSRC*S, FNOT*S to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 13 ++ target/sparc/translate.c | 92 +-- 2 files changed, 62 insertions(+), 43 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 6f136e0602..d591efb0f9 1

[PATCH v2 60/90] target/sparc: Move ARRAY* to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 +++ target/sparc/translate.c | 54 --- 2 files changed, 37 insertions(+), 21 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index fb104e77d1..07a84b109c 1006

[PATCH v2 57/90] target/sparc: Move LDFSR, STFSR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 + target/sparc/translate.c | 152 +++--- 2 files changed, 64 insertions(+), 92 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index fa9c8d3d8b..42eb807e21 10064

[PATCH v2 53/90] target/sparc: Move PREFETCH, PREFETCHA to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 8 ++-- target/sparc/translate.c | 14 ++ 2 files changed, 16 insertions(+), 6 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 8e6a24e094..86108679eb 100644 --- a/target/sparc

[PATCH v2 61/90] target/sparc: Move ADDRALIGN* to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 +++ target/sparc/translate.c | 56 ++- 2 files changed, 34 insertions(+), 25 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 07a84b109c..8bd57f620a 1006

[PATCH v2 58/90] target/sparc: Merge LDFSR, LDXFSR implementations

Combine the helper to a single set_fsr(). Perform the mask and merge inline. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 3 +-- target/sparc/fop_helper.c | 17 ++-- target/sparc/translate.c | 42 --- 3 files changed, 16 inser

[PATCH v2 70/90] target/sparc: Move gen_fop_FF insns to decodetree

Move FSQRTs, FiTOs, FsTOi. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 +++ target/sparc/translate.c | 47 --- 2 files changed, 27 insertions(+), 23 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index

[PATCH v2 83/90] target/sparc: Move FdTOq, FxTOq to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 47 ++- 2 files changed, 28 insertions(+), 21 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 0b54384af7..0bb5b3fca6 10064

[PATCH v2 32/90] target/sparc: Move UMUL, SMUL to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 target/sparc/translate.c | 23 +-- 2 files changed, 9 insertions(+), 18 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index d9474d2a20..c114a13f1d 100644 --- a/target/

[PATCH v2 29/90] target/sparc: Move basic arithmetic to decodetree

Move ADD, AND, OR, XOR, SUB, ANDN, ORN, XORN. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 20 - target/sparc/translate.c | 183 +- 2 files changed, 99 insertions(+), 104 deletions(-) diff --git a/target/sparc/insns.decode b/target/s

[PATCH v2 88/90] target/sparc: Move FPACK16, FPACKFIX to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 55 --- 2 files changed, 42 insertions(+), 15 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 0a0c5b2505..c9fe45adff 10064

[PATCH v2 52/90] target/sparc: Move CASA, CASXA to decodetree

Remove gen_cas_asi, gen_casx_asi. Rename gen_cas_asi0 to gen_cas_asi. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 7 target/sparc/translate.c | 71 +++ 2 files changed, 35 insertions(+), 43 deletions(-) diff --git a/target/sparc/in

[PATCH v2 68/90] target/sparc: Move PDIST to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 41 +-- 2 files changed, 23 insertions(+), 19 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 197d6a0db3..64a7b3bd0b 100644

[PATCH v2 43/90] target/sparc: Move DONE, RETRY to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 ++ target/sparc/translate.c | 99 +++ 2 files changed, 40 insertions(+), 62 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 9c4c493630..dface4a9dd 10064

[PATCH v2 13/90] target/sparc: Move BPr to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 ++ target/sparc/translate.c | 70 --- 2 files changed, 32 insertions(+), 41 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 15cd975f4e..838f4cdb1d 10064

[PATCH v2 65/90] target/sparc: Use tcg_gen_vec_{add,sub}*

Replace the local helpers for the same integer operations. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 12 target/sparc/translate.c | 15 +- target/sparc/vis_helper.c | 59 --- 3 files changed, 7 insertions(+), 79 deletio

[PATCH v2 66/90] target/sparc: Move gen_ne_fop_FFF insns to decodetree

Move FANDNOT1s, FANDNOT2s, FANDs, FNANDs, FNORs, FORNOT1s, FORNOT2s, FORs, FPADD16s, FPADD32s, FPSUB16s, FPSUB32s, FXNORs, FXORs. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 16 ++ target/sparc/translate.c | 116 ++ 2 files changed,

[PATCH v2 14/90] target/sparc: Move FBPfcc and FBfcc to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 ++ target/sparc/translate.c | 105 +++--- 2 files changed, 46 insertions(+), 63 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 838f4cdb1d..9ab3f2eb82 1006

[PATCH v2 09/90] target/sparc: Add decodetree infrastructure

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 5 +++ target/sparc/translate.c | 69 ++- target/sparc/meson.build | 3 ++ 3 files changed, 55 insertions(+), 22 deletions(-) create mode 100644 target/sparc/insns.decode diff --git a/target

[PATCH v2 85/90] target/sparc: Move FMOVR, FMOVcc, FMOVfcc to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 12 +++ target/sparc/translate.c | 192 -- 2 files changed, 91 insertions(+), 113 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 23db453617..88d4b8529d 10

[PATCH v2 56/90] target/sparc: Move asi fp load/store to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 51 ++-- target/sparc/translate.c | 169 -- 2 files changed, 79 insertions(+), 141 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index ab311055da..fa9c

[PATCH v2 51/90] target/sparc: Move SWAP, SWAPA to decodetree

Remove gen_swap_asi. Rename gen_swap_asi0 to gen_swap_asi. Merge gen_swap into gen_swap_asi. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 +++ target/sparc/translate.c | 58 +-- 2 files changed, 29 insertions(+), 33 deletions(-) diff -

[PATCH v2 89/90] target/sparc: Convert FZERO, FONE to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 5 +++ target/sparc/translate.c | 69 +++ 2 files changed, 45 insertions(+), 29 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index c9fe45adff..22d7e7fc09 1006

[PATCH v2 25/90] target/sparc: Move WRASR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 33 +++- target/sparc/translate.c | 353 +- 2 files changed, 226 insertions(+), 160 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index c2d8b0dbbe..6acf0f9403

[PATCH v2 42/90] target/sparc: Move FLUSH, SAVE, RESTORE to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 target/sparc/translate.c | 35 +-- 2 files changed, 29 insertions(+), 10 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 060ee79db0..9c4c493630 100644

[PATCH v2 80/90] target/sparc: Move FqTOs, FqTOi to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 48 +-- 2 files changed, 28 insertions(+), 22 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 1965084fb8..d890d97f12 10064

[PATCH v2 11/90] target/sparc: Move CALL to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 33 - 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 5811a679db..a5f5d2681e 100644 --- a

[PATCH v2 81/90] target/sparc: Move FqTOd, FqTOx to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 49 +-- 2 files changed, 29 insertions(+), 22 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index d890d97f12..249f03a075 10064

[PATCH v2 90/90] target/sparc: Remove disas_sparc_legacy

All instructions are now converted. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 145 +-- 1 file changed, 1 insertion(+), 144 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index ba41cfda3d..c458de2103 100644

[PATCH v2 28/90] target/sparc: Move WRTBR, WRHPR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 9 target/sparc/translate.c | 110 +++--- 2 files changed, 65 insertions(+), 54 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 56c04f01a5..49270705c7 10

[PATCH v2 84/90] target/sparc: Move FMOVq, FNEGq, FABSq to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 + target/sparc/translate.c | 140 +- 2 files changed, 50 insertions(+), 93 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 0bb5b3fca6..23db453617 10064

[PATCH v2 74/90] target/sparc: Move gen_fop_DDD insns to decodetree

Move FADDd, FSUBd, FMULd, FDIVd. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 +++ target/sparc/translate.c | 55 --- 2 files changed, 32 insertions(+), 27 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode

[PATCH v2 86/90] target/sparc: Convert FCMP, FCMPE to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 7 ++ target/sparc/translate.c | 145 +++--- 2 files changed, 96 insertions(+), 56 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 88d4b8529d..3167797854 1006

[PATCH v2 47/90] target/sparc: Use tcg_gen_qemu_{ld, st}_i128 for GET_ASI_DTWINX

Perform one atomic 16-byte operation. The atomicity is required for the LDTXA instructions. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 48 +--- 1 file changed, 40 insertions(+), 8 deletions(-) diff --git a/target/sparc/translate.c b/targe

[PATCH v2 06/90] target/sparc: Define features via cpu-feature.h.inc

Manage feature bits automatically. Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 32 +--- target/sparc/cpu-feature.h.inc | 19 +++ 2 files changed, 32 insertions(+), 19 deletions(-) create mode 100644 target/sparc/cpu-feature.h

[PATCH v2 48/90] target/sparc: Move simple integer load/store to decodetree

Move LDUW, LDUB, LDUH, LDD, LDSW, LDSB, LDSH, LDX, STW, STB, STH, STD, STX. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 22 + target/sparc/translate.c | 196 +++--- 2 files changed, 142 insertions(+), 76 deletions(-) diff --git a/target

[PATCH v2 67/90] target/sparc: Move gen_ne_fop_DDD insns to decodetree

Move FMUL8x16, FMUL8x16AU, FMUL8x16AL, FMUL8SUx16, FMUL8ULx16, FMULD8SUx16, FMULD8ULx16, FPMERGE, FEXPAND, FANDNOT1d, FANDNOT2d, FANDd, FNANDd, FNORd, FORNOT1d, FORNOT2d, FORd, FPADD16d, FPADD32d, FPSUB16d, FPSUB32d, FXNORd, FXORd. Signed-off-by: Richard Henderson --- target/sparc/insns.decode |

[PATCH v2 24/90] target/sparc: Move RDTBR, FLUSHW to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 5 + target/sparc/translate.c | 23 +++ 2 files changed, 16 insertions(+), 12 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index bab80514ba..c2d8b0dbbe 100644 --- a/targe

[PATCH v2 79/90] target/sparc: Move FiTOd, FsTOd, FsTOx to decodetree

Note that gen_ne_fop_DF was incorrectly named and does pass env. The two sets of helpers should have been unified. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 ++ target/sparc/translate.c | 67 --- 2 files changed, 30 insertions(+), 40

[PATCH v2 54/90] target/sparc: Split out fp ldst functions with asi precomputed

Take the operation size from the MemOp instead of a separate parameter. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 136 ++- 1 file changed, 78 insertions(+), 58 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c

[PATCH v2 72/90] target/sparc: Move FSQRTq to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 39 +++ 2 files changed, 24 insertions(+), 16 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index fa95ca056a..7fdd8e37d1 100644

[PATCH v2 05/90] configs: Enable MTTCG for sparc, sparc64

This will be of small comfort to sparc64, because both sun4u and sun4v board models force max_cpus = 1. But it does enable actual smp for sparc32 sun4m. Signed-off-by: Richard Henderson --- configs/targets/sparc-softmmu.mak | 1 + configs/targets/sparc64-softmmu.mak | 1 + 2 files changed, 2 i

[PATCH v2 37/90] target/sparc: Move SLL, SRL, SRA to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 14 +++ target/sparc/translate.c | 182 -- 2 files changed, 92 insertions(+), 104 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 18e2372928..fe0eacd779 10

[PATCH v2 41/90] target/sparc: Move JMPL, RETT, RETURN to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 6 ++ target/sparc/translate.c | 126 -- 2 files changed, 87 insertions(+), 45 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index bdbf6d987c..060ee79db0 1006

[PATCH v2 55/90] target/sparc: Move simple fp load/store to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 19 target/sparc/translate.c | 194 ++ 2 files changed, 113 insertions(+), 100 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 86108679eb..ab311055da

[PATCH v2 03/90] target/sparc: Avoid helper_raise_exception in helper_st_asi

Always use cpu_raise_exception_ra with GETPC for unwind. Signed-off-by: Richard Henderson --- target/sparc/ldst_helper.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index 246de86c98..09066d5487 100644 ---

[PATCH v2 82/90] target/sparc: Move FiTOq, FsTOq to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 44 +-- 2 files changed, 26 insertions(+), 20 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 249f03a075..0b54384af7 10064

[PATCH v2 87/90] target/sparc: Move FPCMP* to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 9 target/sparc/translate.c | 94 +-- 2 files changed, 50 insertions(+), 53 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 3167797854..0a0c5b2505 100

[PATCH v2 44/90] target/sparc: Split out resolve_asi

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 25 + 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 784a019dcf..1d3bfb724e 100644 --- a/target/sparc/translate.c +++ b/target/sparc/tr

[PATCH v2 49/90] target/sparc: Move asi integer load/store to decodetree

Move LDDA, LDSBA, LDSHA, LDSWA, LDUBA, LDUHA, LDUWA, LDXA, STBA, STDA, STHA, STWA, STXA. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 31 + target/sparc/translate.c | 128 +- 2 files changed, 48 insertions(+), 111 deletions(-) di

[PATCH v2 59/90] target/sparc: Move EDGE* to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 22 ++- target/sparc/translate.c | 272 -- 2 files changed, 134 insertions(+), 160 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 42eb807e21..fb104e77d1 1

[PATCH v2 73/90] target/sparc: Move gen_fop_FFF insns to decodetree

Move FADDs, FSUBs, FMULs, FDIVs. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 +++ target/sparc/translate.c | 54 +++ 2 files changed, 31 insertions(+), 27 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode

[PATCH v2 45/90] target/sparc: Drop ifdef around get_asi and friends

Mark some of the functions as unused, temporarily. Fix up some tl vs i64 issues revealed in the process. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 187 +++ 1 file changed, 70 insertions(+), 117 deletions(-) diff --git a/target/sparc/tran

[PATCH v2 31/90] target/sparc: Move MULX to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 6 +- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index abcee27fd4..d9474d2a20 100644 --- a/target/sparc/insns.decode +++

[PATCH v2 50/90] target/sparc: Move LDSTUB, LDSTUBA to decodetree

Remove gen_ldstub_asi. Rename gen_ldstub_asi0 to gen_ldstub_asi. Merge gen_ldstub into gen_ldstub_asi. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 target/sparc/translate.c | 46 +++ 2 files changed, 26 insertions(+), 24 deletions

[PATCH v2 76/90] target/sparc: Move FSMULD to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 43 +-- 2 files changed, 24 insertions(+), 20 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 0f7d898071..96d9139d21 100644

[PATCH v2 21/90] target/sparc: Move RDASR, STBAR, MEMBAR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 22 +++ target/sparc/translate.c | 360 -- 2 files changed, 253 insertions(+), 129 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 4d09c102f1..b3291ea771 1

[PATCH v2 46/90] target/sparc: Split out ldst functions with asi pre-computed

As an intermediate step in decodetree conversion, create new functions passing in DisasASI and not insn. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 215 ++- 1 file changed, 123 insertions(+), 92 deletions(-) diff --git a/target/sparc/tran

[PATCH v2 40/90] target/sparc: Convert remaining v8 coproc insns to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 11 +++ target/sparc/translate.c | 32 ++-- 2 files changed, 17 insertions(+), 26 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 0c1517f024..bdbf6d987c 100

[PATCH v2 71/90] target/sparc: Move gen_fop_DD insns to decodetree

Move FSQRTd, FxTOd, FdTOx. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 +++ target/sparc/translate.c | 50 +-- 2 files changed, 30 insertions(+), 23 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index

[PATCH v2 75/90] target/sparc: Move gen_fop_QQQ insns to decodetree

Move FADDq, FSUBq, FMULq, FDIVq. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 +++ target/sparc/translate.c | 52 +++ 2 files changed, 30 insertions(+), 26 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode

[PATCH v2 77/90] target/sparc: Move FDMULQ to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 41 +-- 2 files changed, 23 insertions(+), 19 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 96d9139d21..a98b3b2bdd 100644

[PATCH v2 78/90] target/sparc: Move gen_fop_FD insns to decodetree

Move FdTOs, FdTOi, FxTOs. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 +++ target/sparc/translate.c | 51 +-- 2 files changed, 30 insertions(+), 24 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index

[PATCH v2 30/90] target/sparc: Move ADDC to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 41 +++ 2 files changed, 39 insertions(+), 4 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 4005ce3df7..abcee27fd4 100644

[PATCH v2 35/90] target/sparc: Move UDIV, SDIV to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 +++ target/sparc/translate.c | 66 ++- 2 files changed, 41 insertions(+), 29 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index a2512d8d47..7d1afb2a87 1006

[PATCH v2 39/90] target/sparc: Move POPC to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 1 + target/sparc/translate.c | 55 ++- 2 files changed, 9 insertions(+), 47 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index a61d10be5a..0c1517f024 100644

[PATCH v2 62/90] target/sparc: Move BMASK to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 2 ++ target/sparc/translate.c | 22 +- 2 files changed, 15 insertions(+), 9 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 8bd57f620a..6f136e0602 100644 --- a/target/spa

[PATCH v2 64/90] target/sparc: Move FMOVD, FNEGD, FABSD, FSRC*D, FNOT*D to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 7 +++ target/sparc/translate.c | 91 +-- 2 files changed, 56 insertions(+), 42 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index d591efb0f9..91988e2978 1006

[PATCH v2 26/90] target/sparc: Move WRPSR, SAVED, RESTORED to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 10 +++ target/sparc/translate.c | 61 ++- 2 files changed, 38 insertions(+), 33 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 6acf0f9403..850b5d58d0

[PATCH v2 27/90] target/sparc: Move WRWIM, WRPR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 21 +++ target/sparc/translate.c | 350 +++--- 2 files changed, 235 insertions(+), 136 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 850b5d58d0..56c04f01a5 1

[PATCH v2 69/90] target/sparc: Move gen_gsr_fop_DDD insns to decodetree

Move FPACK32, FALIGNDATA, BSHUFFLE. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 3 ++ target/sparc/translate.c | 101 -- 2 files changed, 55 insertions(+), 49 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.dec

[PATCH v2 01/90] target/sparc: Clear may_lookup for npc == DYNAMIC_PC

With pairs of jmp+rett, pc == DYNAMIC_PC_LOOKUP and npc == DYNAMIC_PC. Make sure that we exit for interrupts. Cc: qemu-sta...@nongnu.org Fixes: 633c42834c7 ("target/sparc: Introduce DYNAMIC_PC_LOOKUP") Tested-by: Mark Cave-Ayland Signed-off-by: Richard Henderson --- target/sparc/translate.c |

[PATCH v2 04/90] target/sparc: Set TCG_GUEST_DEFAULT_MO

Always use TSO, per the Oracle 2015 manual. This is slightly less restrictive than the TCG_MO_ALL default, and happens to match the i386 model, which will eliminate a few extra barriers on that host. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 2

[PATCH v2 23/90] target/sparc: Move RDWIM, RDPR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 22 +++ target/sparc/translate.c | 360 +++--- 2 files changed, 244 insertions(+), 138 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 8b05b9d8f1..bab80514ba 1

[PATCH v2 07/90] target/sparc: Use CPU_FEATURE_BIT_* for cpu properties

Use symbols not integer constants for the bit positions. Signed-off-by: Richard Henderson --- target/sparc/cpu.c | 42 -- 1 file changed, 28 insertions(+), 14 deletions(-) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 8ba96ae225..e4d1c552e5 1

[PATCH v2 22/90] target/sparc: Move RDPSR, RDHPR to decodetree

Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 10 target/sparc/translate.c | 112 -- 2 files changed, 80 insertions(+), 42 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index b3291ea771..8b05b9d8f1 10

  1   2   3   4   5   >