Re: [PATCH] target/loongarch: Split fcc register to fcc0-7 in gdbstub

Hi, Alex 在 2023/8/9 上午2:40, Alex Bennée 写道: bibo mao writes: I think that it is problem of loongarch gdb, rather qemu. If so, everytime when gdb changes register layout, qemu need modify. There should be compatible requirements between gdb client and gdb server. Tiezhu, what is your opitio

Re: [PATCH v9 6/9] gfxstream + rutabaga: add initial support for gfxstream

On 2023/08/19 10:12, Gurchetan Singh wrote: This adds initial support for gfxstream and cross-domain. Both features rely on virtio-gpu blob resources and context types, which are also implemented in this patch. gfxstream has a long and illustrious history in Android graphics paravirtualization.

Re: [PATCH v7 9/9] docs/system: add basic virtio-gpu documentation

On 2023/08/19 10:17, Gurchetan Singh wrote: On Fri, Aug 18, 2023 at 5:08 AM Akihiko Odaki > wrote: On 2023/08/18 8:47, Gurchetan Singh wrote: > > > On Wed, Aug 16, 2023 at 10:28 PM Akihiko Odaki mailto:akihiko.od...@gmail.com> >

Re: [PATCH v7 9/9] docs/system: add basic virtio-gpu documentation

On Fri, Aug 18, 2023 at 5:08 AM Akihiko Odaki wrote: > On 2023/08/18 8:47, Gurchetan Singh wrote: > > > > > > On Wed, Aug 16, 2023 at 10:28 PM Akihiko Odaki > > wrote: > > > > On 2023/08/17 11:23, Gurchetan Singh wrote: > > > From: Gurchetan Singh >

Re: [PATCH v7 8/9] gfxstream + rutabaga: enable rutabaga

On Fri, Aug 18, 2023 at 4:58 AM Akihiko Odaki wrote: > On 2023/08/17 11:23, Gurchetan Singh wrote: > > From: Gurchetan Singh > > > > This change enables rutabaga to receive virtio-gpu-3d hypercalls > > when it is active. > > > > Signed-off-by: Gurchetan Singh > > Tested-by: Alyssa Ross > > Tes

[PATCH v9 2/9] virtio-gpu: CONTEXT_INIT feature

From: Antonio Caggiano The feature can be enabled when a backend wants it. Signed-off-by: Antonio Caggiano Reviewed-by: Marc-André Lureau Signed-off-by: Gurchetan Singh Tested-by: Alyssa Ross Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Akihiko Odaki --- hw/display/virtio-gpu-base.c

[PATCH v9 5/9] gfxstream + rutabaga prep: added need defintions, fields, and options

This modifies the common virtio-gpu.h file have the fields and defintions needed by gfxstream/rutabaga, by VirtioGpuRutabaga. Signed-off-by: Gurchetan Singh Tested-by: Alyssa Ross Tested-by: Emmanouil Pitsidianakis Reviewed-by: Emmanouil Pitsidianakis --- v1: void *rutabaga --> struct rutabaga

[PATCH v9 6/9] gfxstream + rutabaga: add initial support for gfxstream

This adds initial support for gfxstream and cross-domain. Both features rely on virtio-gpu blob resources and context types, which are also implemented in this patch. gfxstream has a long and illustrious history in Android graphics paravirtualization. It has been powering graphics in the Android

[PATCH v9 8/9] gfxstream + rutabaga: enable rutabaga

This change enables rutabaga to receive virtio-gpu-3d hypercalls when it is active. Signed-off-by: Gurchetan Singh Tested-by: Alyssa Ross Tested-by: Emmanouil Pitsidianakis Reviewed-by: Emmanouil Pitsidianakis --- v3: Whitespace fix (Akihiko) v9: reorder virtio_gpu_have_udmabuf() after checkin

[PATCH v9 3/9] virtio-gpu: hostmem

From: Gerd Hoffmann Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu. Signed-off-by: Antonio Caggiano Tested-by: Alyssa Ross Acked-by: Michael S. Tsirkin --- hw/display/virtio-gpu-pci.c| 14 ++ hw/display/virtio-gpu.c| 1 + hw/display/virtio-vga.c| 33

[PATCH v9 7/9] gfxstream + rutabaga: meson support

- Add meson detection of rutabaga_gfx - Build virtio-gpu-rutabaga.c + associated vga/pci files when present Signed-off-by: Gurchetan Singh Tested-by: Alyssa Ross Tested-by: Emmanouil Pitsidianakis Reviewed-by: Emmanouil Pitsidianakis --- v3: Fix alignment issues (Akihiko) hw/display/meson.

[PATCH v9 4/9] virtio-gpu: blob prep

From: Antonio Caggiano This adds preparatory functions needed to: - decode blob cmds - tracking iovecs Signed-off-by: Antonio Caggiano Signed-off-by: Dmitry Osipenko Signed-off-by: Gurchetan Singh Tested-by: Alyssa Ross Tested-by: Emmanouil Pitsidianakis Reviewed-by: Emmanouil Pi

[PATCH v9 9/9] docs/system: add basic virtio-gpu documentation

This adds basic documentation for virtio-gpu. Suggested-by: Akihiko Odaki Signed-off-by: Gurchetan Singh Tested-by: Alyssa Ross Tested-by: Emmanouil Pitsidianakis Reviewed-by: Emmanouil Pitsidianakis --- v2: - Incorporated suggestions by Akihiko Odaki - Listed the currently supported caps

[PATCH v9 1/9] virtio: Add shared memory capability

From: "Dr. David Alan Gilbert" Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG' to allow defining shared memory regions with sizes and offsets of 2^32 and more. Multiple instances of the capability are allowed and distinguished by a device-specific 'id'. Signed-off-by: Dr. David A

[PATCH v2 15/18] target/s390x: Use clmul_64

Use the generic routine for 64-bit carry-less multiply. Remove our local version of galois_multiply64. Signed-off-by: Richard Henderson --- target/s390x/tcg/vec_int_helper.c | 58 +++ 1 file changed, 12 insertions(+), 46 deletions(-) diff --git a/target/s390x/tcg/vec

[PATCH v2 13/18] crypto: Add generic 64-bit carry-less multiply routine

Signed-off-by: Richard Henderson --- host/include/generic/host/crypto/clmul.h | 15 +++ include/crypto/clmul.h | 19 +++ crypto/clmul.c | 18 ++ 3 files changed, 52 insertions(+) create mode 100644 host/inclu

[PATCH v2 14/18] target/arm: Use clmul_64

Use generic routine for 64-bit carry-less multiply. Signed-off-by: Richard Henderson --- target/arm/tcg/vec_helper.c | 22 -- 1 file changed, 4 insertions(+), 18 deletions(-) diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c index ffb4b44ce4..1f93510b85

[PATCH v2 11/18] target/s390x: Use clmul_32* routines

Use generic routines for 32-bit carry-less multiply. Remove our local version of galois_multiply32. Signed-off-by: Richard Henderson --- target/s390x/tcg/vec_int_helper.c | 75 +-- 1 file changed, 22 insertions(+), 53 deletions(-) diff --git a/target/s390x/tcg/vec_in

[PATCH v2 08/18] target/ppc: Use clmul_16* routines

Use generic routines for 16-bit carry-less multiply. Signed-off-by: Richard Henderson --- target/ppc/int_helper.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 343874863a..10e19d8c9b 100644 --- a/target/ppc/int

[PATCH v2 07/18] target/s390x: Use clmul_16* routines

Use generic routines for 16-bit carry-less multiply. Remove our local version of galois_multiply16. Signed-off-by: Richard Henderson --- target/s390x/tcg/vec_int_helper.c | 27 --- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/target/s390x/tcg/vec_int_hel

[PATCH v2 12/18] target/ppc: Use clmul_32* routines

Use generic routines for 32-bit carry-less multiply. Signed-off-by: Richard Henderson --- target/ppc/int_helper.c | 26 ++ 1 file changed, 6 insertions(+), 20 deletions(-) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 10e19d8c9b..ce793cf163 100644

[PATCH v2 10/18] target/arm: Use clmul_32* routines

Use generic routines for 32-bit carry-less multiply. Remove our local version of pmull_d. Signed-off-by: Richard Henderson --- target/arm/tcg/vec_helper.c | 14 +- 1 file changed, 1 insertion(+), 13 deletions(-) diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c

[PATCH v2 09/18] crypto: Add generic 32-bit carry-less multiply routines

Signed-off-by: Richard Henderson --- include/crypto/clmul.h | 7 +++ crypto/clmul.c | 13 + 2 files changed, 20 insertions(+) diff --git a/include/crypto/clmul.h b/include/crypto/clmul.h index c7ad28aa85..0ea25a252c 100644 --- a/include/crypto/clmul.h +++ b/include/crypt

[PATCH v2 17/18] host/include/i386: Implement clmul.h

Detect PCLMUL in cpuinfo; implement the accel hook. Signed-off-by: Richard Henderson --- host/include/i386/host/cpuinfo.h| 1 + host/include/i386/host/crypto/clmul.h | 29 + host/include/x86_64/host/crypto/clmul.h | 1 + include/qemu/cpuid.h

[PATCH v2 02/18] target/arm: Use clmul_8* routines

Use generic routines for 8-bit carry-less multiply. Remove our local version of pmull_h. Signed-off-by: Richard Henderson --- target/arm/tcg/vec_internal.h | 5 target/arm/tcg/mve_helper.c | 8 ++ target/arm/tcg/vec_helper.c | 53 --- 3 files change

[PATCH v2 06/18] target/arm: Use clmul_16* routines

Use generic routines for 16-bit carry-less multiply. Remove our local version of pmull_w. Signed-off-by: Richard Henderson --- target/arm/tcg/vec_internal.h | 6 -- target/arm/tcg/mve_helper.c | 8 ++-- target/arm/tcg/vec_helper.c | 13 - 3 files changed, 2 insertions(+

[PATCH v2 04/18] target/ppc: Use clmul_8* routines

Use generic routines for 8-bit carry-less multiply. Signed-off-by: Richard Henderson --- target/ppc/int_helper.c | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 834da80fe3..343874863a 100644 --- a/target/p

[PATCH v2 18/18] host/include/aarch64: Implement clmul.h

Detect PMULL in cpuinfo; implement the accel hook. Signed-off-by: Richard Henderson --- host/include/aarch64/host/cpuinfo.h | 1 + host/include/aarch64/host/crypto/clmul.h | 41 util/cpuinfo-aarch64.c | 4 ++- 3 files changed, 45 insertions(+), 1

[PATCH v2 05/18] crypto: Add generic 16-bit carry-less multiply routines

Signed-off-by: Richard Henderson --- include/crypto/clmul.h | 16 crypto/clmul.c | 21 + 2 files changed, 37 insertions(+) diff --git a/include/crypto/clmul.h b/include/crypto/clmul.h index 153b5e3057..c7ad28aa85 100644 --- a/include/crypto/clmul.h ++

[PATCH v2 00/18] crypto: Provide clmul.h and host accel

Inspired by Ard Biesheuvel's RFC patches [1] for accelerating carry-less multiply under emulation. Changes for v2: * Only accelerate clmul_64; keep generic helpers for other sizes. * Drop most of the Int128 interfaces, except for clmul_64. * Use the same acceleration format as aes-round.h.

[PATCH v2 16/18] target/ppc: Use clmul_64

Use generic routine for 64-bit carry-less multiply. Signed-off-by: Richard Henderson --- target/ppc/int_helper.c | 17 +++-- 1 file changed, 3 insertions(+), 14 deletions(-) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index ce793cf163..432834c7d5 100644 --- a/targ

[PATCH v2 01/18] crypto: Add generic 8-bit carry-less multiply routines

Signed-off-by: Richard Henderson --- include/crypto/clmul.h | 41 + crypto/clmul.c | 60 ++ crypto/meson.build | 9 --- 3 files changed, 107 insertions(+), 3 deletions(-) create mode 100644 include/crypto/clmul.

[PATCH v2 03/18] target/s390x: Use clmul_8* routines

Use generic routines for 8-bit carry-less multiply. Remove our local version of galois_multiply8. Signed-off-by: Richard Henderson --- target/s390x/tcg/vec_int_helper.c | 32 --- 1 file changed, 29 insertions(+), 3 deletions(-) diff --git a/target/s390x/tcg/vec_int_h

[PATCH v2 04/23] target/arm: Use tcg_gen_negsetcond_*

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/tcg/translate-a64.c | 22 +- target/arm/tcg/translate.c | 12 2 files changed, 13 insertions(+), 21 deletions(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate

[PATCH v2 19/23] tcg/i386: Merge tcg_out_movcond{32,64}

Pass a rexw parameter instead of duplicating the functions. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 28 +++- 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target

[PATCH v2 12/23] tcg/aarch64: Implement negsetcond_*

Trivial, as aarch64 has an instruction for this: CSETM. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 4 ++-- tcg/aarch64/tcg-target.c.inc | 12 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/tcg/aarch64/tcg-target.

[PATCH v2 22/23] tcg/i386: Use shift in tcg_out_setcond

For LT/GE vs zero, shift down the sign bit. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 15 +++ 1 file changed, 15 insertions(+) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 3f3c114efd..16e830051d 100644 --

[PATCH v2 21/23] tcg/i386: Clear dest first in tcg_out_setcond if possible

Using XOR first is both smaller and more efficient, though cannot be applied if it clobbers an input. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/tcg/i386/tcg-targ

[PATCH v2 10/23] tcg/ppc: Implement negsetcond_*

In the general case we simply negate. However with isel we may load -1 instead of 1 with no extra effort. Consolidate EQ0 and NE0 logic. Replace the NE0 zero-extension with inversion+negation of EQ0, which is never worse and may eliminate one insn. Provide a special case for -EQ0. Reviewed-by:

[PATCH v2 20/23] tcg/i386: Use CMP+SBB in tcg_out_setcond

Use the carry bit to optimize some forms of setcond. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 50 +++ 1 file changed, 50 insertions(+) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index

[PATCH v2 18/23] tcg/i386: Merge tcg_out_setcond{32,64}

Pass a rexw parameter instead of duplicating the functions. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 24 +++- 1 file changed, 7 insertions(+), 17 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.i

[PATCH v2 15/23] tcg/s390x: Implement negsetcond_*

Signed-off-by: Richard Henderson --- Cc: Thomas Huth Cc: qemu-s3...@nongnu.org --- tcg/s390x/tcg-target.h | 4 +- tcg/s390x/tcg-target.c.inc | 78 +- 2 files changed, 54 insertions(+), 28 deletions(-) diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-t

[PATCH v2 14/23] tcg/riscv: Implement negsetcond_*

Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target.h | 4 ++-- tcg/riscv/tcg-target.c.inc | 45 ++ 2 files changed, 47 insertions(+), 2 deletions(-) diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h

[PATCH v2 16/23] tcg/sparc64: Implement negsetcond_*

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/sparc64/tcg-target.h | 4 ++-- tcg/sparc64/tcg-target.c.inc | 36 ++-- 2 files changed, 28 insertions(+), 12 deletions(-) diff --git a/tcg/sparc64/tcg-target.h b/tcg/sparc64/tcg-target.h ind

[PATCH v2 13/23] tcg/arm: Implement negsetcond_i32

Trivial, as we simply need to load a different constant in the conditional move. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.h | 2 +- tcg/arm/tcg-target.c.inc | 9 + 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/tcg/arm/tcg-ta

[PATCH v2 09/23] target/tricore: Replace gen_cond_w with tcg_gen_negsetcond_tl

Reviewed-by: Bastian Koppelmann Signed-off-by: Richard Henderson --- target/tricore/translate.c | 16 ++-- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 1947733870..6ae5ccbf72 100644 --- a/target/tricore/t

[PATCH v2 17/23] tcg/i386: Merge tcg_out_brcond{32,64}

Pass a rexw parameter instead of duplicating the functions. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 110 +- 1 file changed, 49 insertions(+), 61 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i38

[PATCH v2 00/23] tcg: Introduce negsetcond opcodes

Introduce two new setcond opcode variants which produce -1 instead of 1 when the condition. For most of our hosts, producing -1 is just as easy as 1, and avoid requiring a separate negate instruction. Use the new opcode in tcg/tcg-op-gvec.c for integral expansion of generic vector operations. I

[PATCH v2 07/23] target/ppc: Use tcg_gen_negsetcond_*

Tested-by: Nicholas Piggin Reviewed-by: Nicholas Piggin Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- target/ppc/translate/fixedpoint-impl.c.inc | 6 -- target/ppc/translate/vmx-impl.c.inc| 8 +++- 2 files changed, 7 insertions(+), 7 deletions(-) di

[PATCH v2 11/23] tcg/ppc: Use the Set Boolean Extension

The SETBC family of instructions requires exactly two insns for all comparisions, saving 0-3 insns per (neg)setcond. Tested-by: Nicholas Piggin Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 22 ++ 1 file changed, 22 ins

[PATCH v2 05/23] target/m68k: Use tcg_gen_negsetcond_*

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/m68k/translate.c | 24 ++-- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index d08e823b6c..15b3701b8f 100644 --- a/target/m68k/translate

[PATCH v2 02/23] tcg: Use tcg_gen_negsetcond_*

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/tcg-op-gvec.c | 6 ++ tcg/tcg-op.c | 6 ++ 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c index a062239804..e260a07c61 100644 --- a/tcg/tcg-op-gvec.c +++ b/tcg/t

[PATCH v2 01/23] tcg: Introduce negsetcond opcodes

Introduce a new opcode for negative setcond. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- docs/devel/tcg-ops.rst | 6 ++ include/tcg/tcg-op-common.h | 4 include/tcg/tcg-op.h | 2 ++ include/tcg/tcg-opc.h| 2 ++ include/tcg/tcg.h

[PATCH v2 23/23] tcg/i386: Implement negsetcond_*

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.h | 4 ++-- tcg/i386/tcg-target.c.inc | 27 +++ 2 files changed, 21 insertions(+), 10 deletions(-) diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index f3cdc6927a..efc5ff

[PATCH v2 06/23] target/openrisc: Use tcg_gen_negsetcond_*

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/openrisc/translate.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index a86360d4f5..7c6f80daf1 100644 --- a/target/openrisc/translate.c ++

[PATCH v2 03/23] target/alpha: Use tcg_gen_movcond_i64 in gen_fold_mzero

The setcond + neg + and sequence is a complex method of performing a conditional move. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/alpha/translate.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/tran

[PATCH v2 08/23] target/sparc: Use tcg_gen_movcond_i64 in gen_edge

The setcond + neg + or sequence is a complex method of performing a conditional move. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/sparc/translate.c | 17 - 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a/target/sparc/translate.c b/target

[PATCH] target/arm: Fix SME ST1Q

A typo, noted in the bug report, resulting in an incorrect write offset. Cc: qemu-sta...@nongnu.org Fixes: 7390e0e9ab8 ("target/arm: Implement SME LD1, ST1") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1833 Signed-off-by: Richard Henderson --- target/arm/tcg/sme_helper.c | 2 +- 1 fi

Re: [PATCH 3/3] bsd-user: Remove image_info.start_brk

On 8/18/23 11:22, Warner Losh wrote: Forgot on 1/3 to mention I'm planning on doing a pull request right after the release (subject to our release engineer's ok) and can include this there. Excellent, thanks. r~

Re: [PATCH 0/3] bsd-user: image_info cleanups

These all look good. Right now I'm planning on queueing them for the next pull request I have, which is all the reviewed changes from my GSoC student's work and one submission from another user in the bsd-user fork (I think, that one's up in the air). So next week sometime after the release (since

Re: [PATCH 3/3] bsd-user: Remove image_info.start_brk

On Fri, Aug 18, 2023 at 11:57 AM Richard Henderson < richard.hender...@linaro.org> wrote: > This has the same value is image_info.brk, which is also logged, > and is otherwise unused. > > Signed-off-by: Richard Henderson > Reviewed-by: Warner Losh Same comments as 1/3. Forgot on 1/3 to mentio

Re: [PATCH 2/3] bsd-user: Remove image_info.mmap

On Fri, Aug 18, 2023 at 11:57 AM Richard Henderson < richard.hender...@linaro.org> wrote: > This value is unused. > > Signed-off-by: Richard Henderson ] > Reviewed by: Warner Losh Same comments as patch 1/3. Warner > --- > bsd-user/qemu.h| 1 - > bsd-user/elfload.c | 1 - > 2 files chan

Re: [PATCH 1/3] bsd-user: Remove ELF_START_MMAP and image_info.start_mmap

On Fri, Aug 18, 2023 at 11:57 AM Richard Henderson < richard.hender...@linaro.org> wrote: > The start_mmap value is write-only. > Remove the field and the defines that populated it. > > Signed-off-by: Richard Henderson > Reviewed-by: Warner Losh This one won't interfere with anything, but unle

[PATCH 1/3] bsd-user: Remove ELF_START_MMAP and image_info.start_mmap

The start_mmap value is write-only. Remove the field and the defines that populated it. Signed-off-by: Richard Henderson --- bsd-user/arm/target_arch_elf.h| 1 - bsd-user/i386/target_arch_elf.h | 1 - bsd-user/qemu.h | 1 - bsd-user/x86_64/target_arch_elf.h | 1 - bsd-use

[PATCH 3/3] bsd-user: Remove image_info.start_brk

This has the same value is image_info.brk, which is also logged, and is otherwise unused. Signed-off-by: Richard Henderson --- bsd-user/qemu.h| 1 - bsd-user/elfload.c | 2 +- bsd-user/main.c| 2 -- 3 files changed, 1 insertion(+), 4 deletions(-) diff --git a/bsd-user/qemu.h b/bsd-user/

[PATCH 2/3] bsd-user: Remove image_info.mmap

This value is unused. Signed-off-by: Richard Henderson --- bsd-user/qemu.h| 1 - bsd-user/elfload.c | 1 - 2 files changed, 2 deletions(-) diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h index 178114b423..898fe3e8b3 100644 --- a/bsd-user/qemu.h +++ b/bsd-user/qemu.h @@ -52,7 +52,6 @@ struct

[PATCH 0/3] bsd-user: image_info cleanups

This mirrors some changes I've posted for linux-user, removing stuff from image_info which is unused. r~ Richard Henderson (3): bsd-user: Remove ELF_START_MMAP and image_info.start_mmap bsd-user: Remove image_info.mmap bsd-user: Remove image_info.start_brk bsd-user/arm/target_arch_elf.h

Re: [PATCH v2 4/8] target/loongarch: Introduce abstract TYPE_LOONGARCH64_CPU

On 8/18/23 10:20, Philippe Mathieu-Daudé wrote: In preparation of introducing TYPE_LOONGARCH32_CPU, introduce an abstract TYPE_LOONGARCH64_CPU. Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.h | 1 + target/loongarch/cpu.c | 12 +--- 2 files changed, 10 insertions(+)

Re: [PATCH v2 5/8] target/loongarch: Extract 64-bit specifics to loongarch64_cpu_class_init

On 8/18/23 10:20, Philippe Mathieu-Daudé wrote: Extract loongarch64 specific code from loongarch_cpu_class_init() to a new loongarch64_cpu_class_init(). In preparation of supporting loongarch32 cores, rename these functions using the '64' suffix. Signed-off-by: Philippe Mathieu-Daudé --- tar

Re: [PATCH v3 8/8] vdpa: Send cvq state load commands in parallel

On Wed, Jul 19, 2023 at 9:54 AM Hawkins Jiawei wrote: > > This patch enables sending CVQ state load commands > in parallel at device startup by following steps: > > * Refactor vhost_vdpa_net_load_cmd() to iterate through > the control commands shadow buffers. This allows different > CVQ state lo

[PATCH v2 7/8] target/loongarch: Add new object class for loongarch32 cpus

From: Jiajie Chen Add object class stub for future loongarch32 cpus. Signed-off-by: Jiajie Chen Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-ID: <20230817093121.1053890-3-gaos...@loongson.cn> [Rebased on TYPE_LOONGARCH64_CPU introduction] Signed-off-by: Philippe Mathieu-Daud

[PATCH v2 8/8] target/loongarch: Add GDB support for loongarch32 mode

From: Jiajie Chen GPRs and PC are 32-bit wide in loongarch32 mode. Signed-off-by: Jiajie Chen Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-ID: <20230817093121.1053890-4-gaos...@loongson.cn> [PMD: Rebased, set gdb_num_core_regs] Signed-off-by: Philippe Mathieu-Daudé --- con

[PATCH v2 3/8] target/loongarch: Fix loongarch_la464_initfn() misses setting LSPW

From: Song Gao Reviewed-by: Richard Henderson Signed-off-by: Song Gao Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20230817093121.1053890-11-gaos...@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/lo

[PATCH v2 5/8] target/loongarch: Extract 64-bit specifics to loongarch64_cpu_class_init

Extract loongarch64 specific code from loongarch_cpu_class_init() to a new loongarch64_cpu_class_init(). In preparation of supporting loongarch32 cores, rename these functions using the '64' suffix. Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.c | 27 +-

[PATCH v2 2/8] target/loongarch: Remove duplicated disas_set_info assignment

Commit 228021f05e ("target/loongarch: Add core definition") sets disas_set_info to loongarch_cpu_disas_set_info. Probably due to a failed git-rebase, commit ca61e75071 ("target/loongarch: Add gdb support") also sets it to the same value. Remove the duplication. Signed-off-by: Philippe Mathieu-Daud

[PATCH v2 6/8] target/loongarch: Add function to check current arch

From: Jiajie Chen Add is_la64 function to check if the current cpucfg[1].arch equals to 2(LA64). Signed-off-by: Jiajie Chen Co-authored-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-ID: <20230817093121.1053890-2-gaos...@loongson.cn> Signed-off-by: Phili

[PATCH v2 4/8] target/loongarch: Introduce abstract TYPE_LOONGARCH64_CPU

In preparation of introducing TYPE_LOONGARCH32_CPU, introduce an abstract TYPE_LOONGARCH64_CPU. Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.h | 1 + target/loongarch/cpu.c | 12 +--- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/target/loongarch/cpu.

[PATCH v2 0/8] target/loongarch: Cleanups in preparation of loongarch32 support

v2: - Do no rename loongarch_cpu_get/set_pc (rth) - Rebased Jiajie's patches for convenience - Added rth's R-b Jiajie, this series contains few notes I took while reviewing your series adding loongarch32 support [*]. If your series isn't merged, consider rebasing it on this one. Regards, Phil.

[PATCH v2 1/8] target/loongarch: Log I/O write accesses to CSR registers

Various CSR registers have Read/Write fields. We might want to see guest trying to change such registers. Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index ad93ecac92..71079

[PATCH v4 0/3] qmp, vhost-user: Remove virtio_list & update virtio introspection

These patches update a few things related to virtio introspection via. QMP/HMP commands. 1. Remove 'virtio_list' and instead query the QOM composition tree to find any active & realized virtio devices. The 'virtio_list' was duplicating information about virtio devices that was already available i

[PATCH v4 2/3] qmp: update virtio feature maps, vhost-user-gpio introspection

Add new vhost-user protocol feature to vhost-user protocol feature map and enumeration: - VHOST_USER_PROTOCOL_F_STATUS Add new virtio device features for several virtio devices to their respective feature mappings: virtio-blk: - VIRTIO_BLK_F_SECURE_ERASE virtio-net: - VIRTIO_NET_F_NOTF_COAL

[PATCH v4 3/3] vhost-user: move VhostUserProtocolFeature definition to header file

Move the definition of VhostUserProtocolFeature to include/hw/virtio/vhost-user.h. Remove previous definitions in hw/scsi/vhost-user-scsi.c, hw/virtio/vhost-user.c, and hw/virtio/virtio-qmp.c. Previously there were 3 separate definitions of this over 3 different files. Now only 1 definition of th

[PATCH v4 1/3] qmp: remove virtio_list, search QOM tree instead

The virtio_list duplicates information about virtio devices that already exist in the QOM composition tree. Instead of creating this list of realized virtio devices, search the QOM composition tree instead. This patch modifies the QMP command qmp_x_query_virtio to instead recursively search the QO

[PATCH 31/33] linux-user: Bound mmap_min_addr by host page size

Bizzarely, it is possible to set /proc/sys/vm/mmap_min_addr to a value below the host page size. Fix that. Signed-off-by: Richard Henderson --- linux-user/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-user/main.c b/linux-user/main.c index 2334d7cc67..1925c275e

[PATCH 23/33] linux-user: Split out mmap_h_gt_g

Signed-off-by: Richard Henderson --- linux-user/mmap.c | 288 ++ 1 file changed, 139 insertions(+), 149 deletions(-) diff --git a/linux-user/mmap.c b/linux-user/mmap.c index ed82b4bb75..6ab2f35e6f 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c

[PATCH 20/33] linux-user: Do early mmap placement only for reserved_va

For reserved_va, place all non-fixed maps then proceed as for MAP_FIXED. Signed-off-by: Richard Henderson --- linux-user/mmap.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/linux-user/mmap.c b/linux-user/mmap.c index caa76eb11a..7d482df06d 100644 --- a/linux-u

[PATCH 25/33] tests/tcg: Extend file in linux-madvise.c

When guest page size > host page size, this test can fail due to the SIGBUS protection hack. Avoid this by making sure that the file size is at least one guest page. Visible with alpha guest on x86_64 host. Signed-off-by: Richard Henderson --- tests/tcg/multiarch/linux/linux-madvise.c | 2 ++

[PATCH 22/33] linux-user: Split out mmap_h_lt_g

Work much harder to get alignment and mapping beyond the end of the file correct. Both of which are excercised by our test-mmap for alpha (8k pages) on any 4k page host. Signed-off-by: Richard Henderson --- linux-user/mmap.c | 156 +- 1 file changed,

[PATCH 18/33] linux-user: Fix sub-host-page mmap

We cannot skip over the_end1 to the_end, because we fail to record the validity of the guest page with the interval tree. Remove "the_end" and rename "the_end1" to "the_end". Signed-off-by: Richard Henderson --- linux-user/mmap.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff -

[PATCH 03/33] linux-user: Remove qemu_host_page_{size, mask} in probe_guest_base

The host SHMLBA is by definition a multiple of the host page size. Thus the remaining component of qemu_host_page_size is the target page size. Signed-off-by: Richard Henderson --- linux-user/elfload.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/linux-user/elfload.c b

[PATCH 13/33] softmmu/physmem: Remove qemu_host_page_size

Use qemu_real_host_page_size() instead. Signed-off-by: Richard Henderson --- softmmu/physmem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/softmmu/physmem.c b/softmmu/physmem.c index 3df73542e1..6881b2d8f8 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -3448,7

[PATCH 21/33] linux-user: Split out mmap_h_eq_g

Move the MAX_FIXED_NOREPLACE check for reserved_va earlier. Move the computation of host_prot earlier. Signed-off-by: Richard Henderson --- linux-user/mmap.c | 66 +-- 1 file changed, 53 insertions(+), 13 deletions(-) diff --git a/linux-user/mmap.c b/

[PATCH 24/33] tests/tcg: Remove run-test-mmap-*

These tests are confused, because -p does not change the guest page size, but the host page size. Signed-off-by: Richard Henderson --- tests/tcg/alpha/Makefile.target | 3 --- tests/tcg/arm/Makefile.target | 3 --- tests/tcg/hppa/Makefile.target | 3 --- tests/tcg/i386/Makefile

[PATCH 19/33] linux-user: Split out mmap_end

Use a subroutine instead of a goto within target_mmap__locked. Signed-off-by: Richard Henderson --- linux-user/mmap.c | 69 +++ 1 file changed, 40 insertions(+), 29 deletions(-) diff --git a/linux-user/mmap.c b/linux-user/mmap.c index e905b1b8f2..caa7

[PATCH 28/33] accel/tcg: Disconnect TargetPageDataNode from page size

Dynamically size the node for the runtime target page size. Signed-off-by: Richard Henderson --- accel/tcg/user-exec.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 4c1697500a..09dc85c851 100644 --- a/accel/t

[PATCH 06/33] linux-user/nios2: Remove qemu_host_page_size from init_guest_commpage

Use qemu_real_host_page_size. If !reserved_va, use MAP_FIXED_NOREPLACE. Signed-off-by: Richard Henderson --- linux-user/elfload.c | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 1da77f4f71..b3b9232955 100644 ---

[PATCH 26/33] linux-user: Deprecate and disable -p pagesize

This option controls the host page size. From the mis-usage in our own testsuite, this is easily confused with guest page size. The only thing that occurs when changing the host page size is that stuff breaks, because one cannot actually change the host page size. Therefore reject all but the no

[PATCH 09/33] linux-user: Remove REAL_HOST_PAGE_ALIGN from mmap.c

We already have qemu_real_host_page_size() in a local variable. Signed-off-by: Richard Henderson --- linux-user/mmap.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-user/mmap.c b/linux-user/mmap.c index fc23192a32..48a6ef0af9 100644 --- a/linux-user/mmap.c +++ b/linux

[PATCH 08/33] linux-user: Remove qemu_host_page_{size, mask} from mmap.c

Use qemu_real_host_page_size instead. Signed-off-by: Richard Henderson --- linux-user/mmap.c | 66 +++ 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/linux-user/mmap.c b/linux-user/mmap.c index 9aab48d4a3..fc23192a32 100644 --- a/linux

[PATCH 12/33] hw/tpm: Remove HOST_PAGE_ALIGN from tpm_ppi_init

The size of the allocation need not match the alignment. Signed-off-by: Richard Henderson --- hw/tpm/tpm_ppi.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/tpm/tpm_ppi.c b/hw/tpm/tpm_ppi.c index 7f74e26ec6..91eeafd53a 100644 --- a/hw/tpm/tpm_ppi.c +++ b/hw/tpm/tpm_ppi

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