Re: [PATCH v2 2/6] tests/tcg/cris: Correct the off-by-one error

2023-06-18 Thread Richard Henderson
On 6/16/23 17:27, Bin Meng wrote: sysconf(_SC_OPEN_MAX) returns the maximum number of files that a process can have open at any time, which means the fd should not be larger than or equal to the return value. Signed-off-by: Bin Meng --- (no changes since v1) tests/tcg/cris/libc/check_openpf5

Re: [RFC v3] linux-user/riscv: Add syscall riscv_hwprobe

2023-06-18 Thread Robbin Ehn
On Thu, 2023-06-15 at 10:12 -0700, Palmer Dabbelt wrote: > On Thu, 08 Jun 2023 00:55:22 PDT (-0700), r...@rivosinc.com wrote: > > This patch adds the new syscall for the > > "RISC-V Hardware Probing Interface" > > (https://docs.kernel.org/riscv/hwprobe.html). > > > > Signed-off-by: Robbin Ehn > >

Re: [PATCH v2 1/6] tests/tcg/cris: Fix the coding style

2023-06-18 Thread Richard Henderson
On 6/16/23 17:27, Bin Meng wrote: The code style does not conform with QEMU's. Correct it so that the upcoming commit does not trigger checkpatch warnings. Signed-off-by: Bin Meng --- (no changes since v1) tests/tcg/cris/libc/check_openpf5.c | 57 ++--- 1 file change

[PATCH] vhost-vdpa: do not cleanup the vdpa/vhost-net structures if peer nic is present

2023-06-18 Thread Ani Sinha
When a peer nic is still attached to the vdpa backend, it is too early to free up the vhost-net and vdpa structures. If these structures are freed here, then QEMU crashes when the guest is being shut down. The following call chain would result in an assertion failure since the pointer returned from

Re: [PATCH V2 1/4] qapi: strList_from_string

2023-06-18 Thread Markus Armbruster
Steven Sistare writes: > On 6/13/2023 8:33 AM, Markus Armbruster wrote: >> Steven Sistare writes: [...] >>> What design principle does strList_from_string contradict? Are you OK with >>> putting the simplified version shown above in qapi-util? >> >> The design principle is "use JSON to enco

[PATCH] vhost_net: add an assertion for TAP client backends

2023-06-18 Thread Ani Sinha
An assertion was missing for tap vhost backends that enforces a non-null reference from get_vhost_net(). Both vhost-net-user and vhost-net-vdpa enforces this. Enforce the same for tap. Unit tests pass with this change. Signed-off-by: Ani Sinha --- hw/net/vhost_net.c | 1 + 1 file changed, 1 inse

virtiofsd - removed in QEMU 8.0, replacement seems Linux-only

2023-06-18 Thread John Maline
The QEMU Removed Features page indicates that virtiofsd has been removed, replaced with https://gitlab.com/virtio-fs/virtiofsd, a rust-based implementation. https://qemu-project.gitlab.io/qemu/about/removed-features.html#virtiofsd-removed-in-8-0 Browsing and searching the qemu source, it sure l

[PATCH 1/2] target/i386: ignore ARCH_CAPABILITIES features in user mode emulation

2023-06-18 Thread Paolo Bonzini
ARCH_CAPABILITIES is only accessible through a read-only MSR, so it has no impact on any user-mode operation (user-mode cannot read the MSR). So do not bother printing warnings about it in user mode emulation. Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 7 +++ 1 file changed, 7 inse

[PATCH 2/2] target/i386: ignore CPL0-specific features in user mode emulation

2023-06-18 Thread Paolo Bonzini
Features such as PCID are only accessible through privileged operations, and therefore have no impact on any user-mode operation. Allow reporting them to programs running under user mode emulation, so that "-cpu" can be used with more named CPU models. XSAVES would be similar, but it doesn't make

[PATCH 0/2] target/i386: allow using named CPU modeles with user mode emulation

2023-06-18 Thread Paolo Bonzini
When running qemu-i386 even with -cpu Nehalem (aka x86_64-v2), it raises the warning TCG doesn't support requested feature: CPUID.8001H:EDX.lm [bit 29] Likewise using qemu-x86_64 with -cpu Haswell, it raises warnings for TCG doesn't support requested feature: CPUID.01H:ECX.pcid [bit 17]

[PATCH 5/7] target/i386: TCG supports XSAVEERPTR

2023-06-18 Thread Paolo Bonzini
XSAVEERPTR is actually a fix for an errata; TCG does not have the issue. Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index be16c66341d..8e12616db5e 100644 --- a/target/i386/cpu.c +

[PATCH 1/7] target/i386: fix INVD vmexit

2023-06-18 Thread Paolo Bonzini
Due to a typo or perhaps a brain fart, the INVD vmexit was never generated. Fix it (but not that fixing just the typo would break both INVD and WBINVD, due to a case of two wrongs making a right). Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 2 +- 1 file changed, 1 insertions(+

[PATCH 7/7] target/i386: implement WBNOINVD in TCG

2023-06-18 Thread Paolo Bonzini
WBNOINVD is the same as INVD or WBINVD as far as TCG is concerned, but it does not generate a vmexit if the processor supports it. If it does not, it is treated as WBINVD and generates a vmexit. Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 3 ++- target/i386/tcg/translate.c

[PATCH 3/7] target/i386: TCG supports RDSEED

2023-06-18 Thread Paolo Bonzini
TCG implements RDSEED, and in fact uses qcrypto_random_bytes which is secure enough to match hardware behavior. Expose it to guests. Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c

[PATCH 2/7] target/i386: TCG supports 3DNow! prefetch(w)

2023-06-18 Thread Paolo Bonzini
The AMD prefetch(w) instructions have not been deprecated together with the rest of 3DNow!, and in fact are even supported by newer Intel processor. Mark them as supported by TCG, as it supports all of 3DNow!. Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 3 ++- 1 file changed, 2 inserti

[PATCH 6/7] target/i386: implement RDPID in TCG

2023-06-18 Thread Paolo Bonzini
RDPID corresponds to a RDMSR(TSC_AUX); however, it is unprivileged so for user-mode emulation we must provide the value that the kernel places in the MSR. For Linux, it is a combination of the current CPU and the current NUMA node, both of which can be retrieved with getcpu(2). For BSD, just retur

[PATCH 0/7] target/i386: add a few simple features

2023-06-18 Thread Paolo Bonzini
TCG is not reporting a few features that are actually already implemented, or that are easy to implement. Add them. Paolo Paolo Bonzini (7): target/i386: fix INVD vmexit target/i386: TCG supports 3DNow! prefetch(w) target/i386: TCG supports RDSEED target/i386: TCG supports 32-bit SYSCALL

[PATCH 4/7] target/i386: TCG supports 32-bit SYSCALL

2023-06-18 Thread Paolo Bonzini
TCG supports both 32-bit and 64-bit SYSCALL, so expose it with "-cpu max" even for 32-bit emulators. Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index fc4246223d4..be16c66341d 100

Re: [PATCH v2] kvm: reuse per-vcpu stats fd to avoid vcpu interruption

2023-06-18 Thread Paolo Bonzini
On 6/18/23 01:00, Philippe Mathieu-Daudé wrote:   case STATS_TARGET_VCPU:   add_stats_entry(result, STATS_PROVIDER_KVM, -    current_cpu->parent_obj.canonical_path, +    cpu->parent_obj.canonical_path, Can we get a NULL deref here ...   

[PATCH] git-submodule.sh: allow running in validate mode without previous update

2023-06-18 Thread Paolo Bonzini
The call to git-submodule.sh done in configure may happen without a previous checkout of the roms/SLOF submodule, or even without a previous run of the script. So, handle creating a .git-submodule-status file even in validate mode. If git is absent, ensure that all passed directories exists (beca

Re: [PATCH v2 7/8] target/tricore: Honour privilege changes on PSW write

2023-06-18 Thread Richard Henderson
On 6/16/23 17:28, Bastian Koppelmann wrote: the CPU can change the privilege level by writing the corresponding bits in PSW. If this happens all instructions after this 'mtcr' in the TB are translated with the wrong privilege level. So we have to exit to the cpu_loop() and start translating again

Re: [PATCH v2 4/8] target/tricore: Indirect jump insns use tcg_gen_lookup_and_goto_ptr()

2023-06-18 Thread Richard Henderson
On 6/16/23 17:28, Bastian Koppelmann wrote: @@ -6075,7 +6076,7 @@ static void decode_rr_idirect(DisasContext *ctx) default: generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); } -ctx->base.is_jmp = DISAS_EXIT; +ctx->base.is_jmp = DISAS_JUMP; } Not quite correct, as ge

Re: [PATCH v2 3/8] target/tricore: ENABLE/DISABLE exit to main-loop

2023-06-18 Thread Richard Henderson
On 6/16/23 17:28, Bastian Koppelmann wrote: so we can recognize exceptions after re-enabling interrupts. Reported-by: Richard Henderson Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/target/tricore/translate.c b/ta

Re: [PATCH v2 2/8] target/tricore: Introduce DISAS_TARGET_EXIT

2023-06-18 Thread Richard Henderson
On 6/16/23 17:28, Bastian Koppelmann wrote: this replaces all calls to tcg_gen_exit_tb() and moves them to tricore_tb_stop(). Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 25 - 1 file changed, 12 insertions(+), 13 deletions(-) Reviewed-by: Richa

Re: [PATCH v2 1/8] target/tricore: Fix RR_JLI clobbering reg A[11]

2023-06-18 Thread Richard Henderson
On 6/16/23 17:28, Bastian Koppelmann wrote: if A[r1] == A[11], then we would overwrite the destination address of the jump with the return address. Reported-by: Richard Henderson Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletio

Re: [PATCH v3 07/14] target/ppd: Remove unused define

2023-06-18 Thread Bernhard Beschow
Typo: s/ppd/ppc/ in the header of the commit message. Best regards, Bernhard Am 15. Juni 2023 23:03:16 UTC schrieb BALATON Zoltan : >Commit 7a3fe174b12d removed usage of POWERPC_SYSCALL_VECTORED, drop >the unused define as well. > >Signed-off-by: BALATON Zoltan >Reviewed-by: Philippe Mathieu-Da

Re: [PATCH] Fix handling of AVR interrupts above 33.

2023-06-18 Thread Philippe Mathieu-Daudé
On 18/6/23 08:56, Michael Tokarev wrote: Applied to the trivial tree, thank you! Thanks. Do you mind updating the patch subject to: "target/avr: Fix handling of interrupts above 33"?

Re: [PATCH 4/4] ppc/spapr: Move spapr nested HV to a new file

2023-06-18 Thread Daniel Henrique Barboza
Nick, Do you plan to send a new version of this patch with a spapr_nested.h header included? Otherwise I'll pick this one as is. Thanks, Daniel On 6/8/23 06:13, Nicholas Piggin wrote: Create spapr_nested.c for most of the nested HV implementation. Signed-off-by: Nicholas Piggin --- hw/pp